In this episode of “Ask the Experts,” John Eble, Vice President of Product Marketing for Memory Interface Chips at Rambus, discusses advancements in DDR5 Server RDIMM memory modules. Eble highlights the four critical logic components of DDR5 RDIMMs, two of which are enhanced versions of chips used in DDR4 memory modules, and two are new.
The registering clock driver (RCD) has been upgraded for improved signal integrity to the DRAM, while the serial presence detect (SPD) IC now includes a temperature sensor and a bi-directional ability to buffer the system management bus. The two new components are a standalone temperature sensor and a power management integrated circuit (PMIC) for improved power integrity.
Eble also discusses the new Rambus family of server PMICs, designed to optimize power efficiency for different output currents. The Extreme Current PMIC (PMIC5020) from Rambus is an industry-leading device that will support high capacity RDIMMs and future server platforms operating at 7200 Megatransfers per second (MT/s) likely to launch in 2025.
These new servers are part of the unprecedented rate of new platform introductions driven by high-performance workloads with generative AI being the prime example. Rapid advancements in DDR5 memory will continue to provide the bandwidth and capacity needed by these compute-intensive applications.
Speakers
- John Eble, VP of Product Marketing for Memory Interface Chips, Rambus
Key Takeaways
- Advanced Chipset for DDR5 RDIMMs: DDR5 RDIMMs depend on four critical logic components, two of which are enhanced devices from DDR4 and two are brand new. These components, the Register Clock Driver, Signal Presence Detect Hub, Power Management IC and Temperature Sensor, enable the bandwidth and capacity of DDR5 while maintaining power with the same per module envelope.
- Power Management Integrated Circuit: The addition of the Power Management Integrated Circuit (PMIC) on the DIMM is a significant change in DDR5. It improves power integrity, eliminates concerns about IR drop, and allows fine grain control of voltage levels. This change follows the trend in microelectronic systems to optimize power by delivering as high a voltage as possible to the endpoint and then regulating into lower voltages with higher currents there.
- Rambus’ Server PMICs Family: Rambus has announced a new family of Server PMICs which support a broad range of use cases. The key difference among the three family members is the targeted output current of each. The PMIC 5010 targets a total current of 12 amps, the PMIC 5000 targets a current output of about 20 amps, and the PMIC 5020 supports the highest current levels of up to 30 amps.
- Extreme Current Needed: The PMIC 5020 is targeted towards the highest capacity RDIMMs and is expected to be used in platforms launching at speeds of 7200 MT/s, likely in 2025. There may be earlier opportunities for the 5020 addressing special high-bandwidth RDIMMs launching later this year.
- AI Driving the Pace: The unprecedented rate of change in DDR5-based server is being driven by advanced workloads data center, particularly generative AI. This is leading to an insatiable appetite for more bandwidth and capacity. As a result, new innovations are being built into each subsequent generation of DDR5 to hit the required speeds.
Key Quote
The addition of the PMIC on the DIMM is a significant change in DDR5, probably one of the bigger ones. It’s really following the trend of what’s going on in microelectronic systems that to optimize the power system, it’s best to deliver as high a voltage as possible to the endpoint and then do the regulation into the lower voltages with higher currents there. There’s both technical and economic reasons why this choice was made for DDR5. The technical reason is really increased power integrity which is needed to enable higher speeds.
Related Content
- Webinar: What’s Next for DDR5 Memory?
- Blog: DDR5 vs DDR4 DRAM – All the Advantages & Design Challenges
- Products: DDR5 Server Chipset
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