Abstract
In this paper, we present a series of scheduling approaches targeted for massively parallel architectures, which in combination allow a wider range of algorithms to be executed on modern graphics processors. At first, we describe a new processing model which enables the efficient execution of dynamic, irregular workloads. Then, we present the currently fastest queuing algorithm for graphics processors, the most efficient dynamic memory allocator for massively parallel architectures, and the only autonomous scheduler for graphics processing units that can dynamically support different granularities of parallelism. Finally, we show how these scheduling approaches help to advance the state-of-the-art in the rendering, visualization and procedural modeling.
About the author
Markus Steinberger graduated with an MSc in Computer Science (Telematics) from Graz University of Technology, Austria in 2010 with highest distinction. He finished his PhD within the field of GPU scheduling, visualization and geometric modeling in 2013 under the supervision of Prof. Dieter Schmalstieg at Graz University of Technology. He received the highest possible honor for achievement in Austria, the promotio sub auspiciis prasidentis rei publicae. In 2013 and 2014 he was with the mobile computer vision research group of Kari Pulli at NVIDIA, California. In 2014 he became the first Austrian to win the GI Dissertation Prize. His wide research interests are reflected by the numerous awards won by his papers, including ACM CHI, IEEE Infovis, Eurographics, ACM NPAR, EG/ACM HPG best paper and honorable mention awards. Since 2014 he is a senior researcher at the Institute for Computer Graphics and Vision at Graz University of Technology, leading the GPU and parallel computing group.
Graz University of Technology, Graz, Austria
©2015 Walter de Gruyter Berlin/Boston
