Leveraging Compiler-Based Translation to Evaluate a Diversity of Exascale Platforms
- Advanced Micro Devices (AMD)
- ORNL
- University of Oregon
Accelerator-based heterogeneous computing is the de facto standard in current and upcoming exascale machines. These heterogeneous resources empower computational scientists to select a machine or platform well-suited to their domain or applications. However, this diversity of machines also poses challenges related to programming model selection: inconsistent availability of programming models across different exascale systems, lack of performance portability for those programming models that do span several systems, and inconsistent performance between different models on a single platform. We explore these challenges on exascale-similar hardware, including AMD MI100 and NVIDIA A100 GPUs. By extending the sourceto-source compiler OpenARC, we demonstrate the power of automated translation of applications written in a single frontend programming model (OpenACC) into a variety of backend models (OpenMP, OpenCL, CUDA, HIP) that span the upcoming exascale environments. This translation enables us to compare performance within and across devices and to analyze programming model behavior with profiling tools.
- Research Organization:
- Oak Ridge National Laboratory (ORNL), Oak Ridge, TN (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- AC05-00OR22725
- OSTI ID:
- 2000271
- Resource Relation:
- Conference: 2022 IEEE/ACM International Workshop on Performance, Portability and Productivity in HPC (P3HPC) - Dallas, Texas, United States of America - 11/13/2022 10:00:00 AM-11/18/2022 5:00:00 AM
- Country of Publication:
- United States
- Language:
- English
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