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Analysis and Design of Direct Reference Feed-Forward Compensation for Fast-Settling All-Digital Phase-Locked Loop Win CHAIVIPAS Akira MATSUZAWA Publication IEICE TRANSACTIONS on Electronics Vol.E90-C No.4 pp.793-801 Publication Date: 2007/04/01 Online ISSN: 1745-1353 DOI: 10.1093/ietele/e90-c.4.793 Print ISSN: 0916-8516 Type of Manuscript: Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies) Category: Analog and Communications Keyword: all-digital phase locked loop, feed-forward, fast settling, frequency synthesizer, Full Text: PDF(1004KB)>>
Summary: A method for shortening of the settling time in all digital phase-locked loops is proposed. The method utilizes self monitoring to obtain the parameters necessary for feed-forward compensation. Analysis shows that by employing this technique both fast settling and good stability can be achieved simultaneously. Matlab and Verilog-AMS simulation shows that typical settling speed can be reduced to less than one tenth compared to a system without the feed-forward compensation, by merely employing the feed-forward compensation system. Further more a design example shows that this settling time can be decreased further to less than one fifteenth through design considerations when compared to a speed optimized phase-locked loop design system without direct reference feed-forward compensation. | |||||
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