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Energy-efficient computing-in-memory architecture for AI processor: device, circuit, architecture perspective

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Abstract

An artificial intelligence (AI) processor is a promising solution for energy-efficient data processing, including health monitoring and image/voice recognition. However, data movements between compute part and memory induce memory wall and power wall challenges to the conventional computing architecture. Recently, the memory-centric architecture has been revised to solve the data movement issue, where the memory is equipped with the compute-capable memory technique, namely, computing-in-memory (CIM). In this paper, we analyze the requirement of AI algorithms on the data movement and low power requirement of AI processors. In addition, we introduce the story of CIM and implementation methodologies of CIM architecture. Furthermore, we present several novel solutions beyond traditional analog-digital mixed static random-access memory (SRAM)-based CIM architecture. Finally, recent CIM tape-out studies are listed and discussed.

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Acknowledgements

This work was supported by National Key R&D Program of China (Grant No. 2019YFB2204500) and UESTC Research Start-up Funding (Grant No. Y030202059018052).

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  1. School of Information and Communication Engineering, University of Electronic Science and Technology of China, Chengdu, 611731, China

    Liang Chang, Chenglong Li, Zhaomin Zhang, Jianbiao Xiao, Qingsong Liu, Zhen Zhu, Weihang Li, Zixuan Zhu, Siqi Yang & Jun Zhou

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  1. Liang Chang
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Chang, L., Li, C., Zhang, Z. et al. Energy-efficient computing-in-memory architecture for AI processor: device, circuit, architecture perspective. Sci. China Inf. Sci. 64, 160403 (2021). https://doi.org/10.1007/s11432-021-3234-0

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