Abstract
Software defined radio (SDR) is a technology that allows a single terminal to support various kinds of wireless systems by changing its software to reconfigure itself. A general purpose processor (GPP) based SDR receiver platform named Sora has been recently developed by Microsoft. In the GPP based SDR receiver, timing synchronization of an OFDM signal consumes a significant amount of computational resources in the GPP. In this paper, a timing synchronization scheme which uses delayed correlation and matched filtering for the GPP based SDR platform is evaluated. The two stage timing synchronization scheme reduces the computational complexity by limiting the timing range of matched filtering. The proposed scheme reduces the amount of data transmission between the memory and the GPP of the SDR platform. It is shown through an experiment that the proposed scheme reduces the number of cycles for timing synchronization by up to 30 %.
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References
Mitola, J. (1995). The software radio architecture. IEEE Communicational Magazine, 33(5), 26–38.
Tsurumi, H., & Suzuki, Y. (1999). Broadband RF stage architecture for software-defined radio in handheld terminal applications. IEEE, Communications Magazine, 37(2), 90–95.
Cummings, M., & Haruyama, S. (Feb. 1999). FPGA in the software radio. IEEE, Communications Magazine, 37(2), 108–112.
Schmid, T., Sekkat, O., & Srivastava, M. B. (2007). An experimental study of network performance impact of increased latency in software defined radio. In WiNETCH’07 (pp. 59–66), January 2007.
Khurram, M. (2006). A general purpose processor based IEEE802.11a compatible OFDM receiver design. In IEEE, GCC conference (pp. 1–5), March 2006.
Bose, V., Ismert, M., Welborn, M., & Guttag, J. (1999). Virtual radios. IEEE Journal on Selected Areas in Communications, 17(4), 591–602.
Tan, K., Zhang, J., Fang, J., Liu, H., Ye, Y., Wang, S., et al. (2011). Sora: High performance software radio using general purpose multi-core processors. Communications of the Association for Computing Machinery, 54(1), 99–107.
Tan, K.,Liu, H., Fang, J., Wang, W., Zhang, J., Chen, M., & Voelker, G.M. (2009). Sora: High performance software radio using general purpose multi-core processors. In The 6th USENIX symposium on networked systems design and implementation, April 2009.
IEEE 802.11g-Part 11: Wireless LAN medium access control (MAC) and physical layer (PHY) specifications; high-speed physical layer in the 2.4GHZ band.
Yip, K.-W., Wu, Y.-C., & Ng, T.-S. (Feb. 2003). Design of multiplierless correlators for timing synchronization in IEEE 802.11a wireless LANs. IEEE, Transaction on Consumer Electronics, 49(1), 107–114.
Joint Technical Committee of Committee T1 R1P1.4 and TIA TR46.3.3/TR45.4.4 on Wireless Access. (1994). Draft final report on RF channel characterization. Paper no. JTC(AIR)/94.01.17-238R4, January 1994.
Tan, K., & Sora Core Team. (2011). The Sora manual version 1.5. No. MSR-TR-2011-14, September 2011.
Heiskala, J., & Terry, J. (2001). OFDM wireless LANs: A theoretical and practical guide. Indianapolis: Sams Publishing.
Acknowledgments
This work is supported in part by a Grant-in-Aid for Scientific Research (C) under Grant No.25426382 from the Ministry of Education, Culture, Sports, Science, and Technology of Japan.
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Tanaka, Y., Inamori, M. & Sanada, Y. Two Step Timing Synchronization Scheme for OFDM Signal in General Purpose Processor Based Software Defined Radio Receiver. Wireless Pers Commun 79, 363–374 (2014). https://doi.org/10.1007/s11277-014-1860-6
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DOI: https://doi.org/10.1007/s11277-014-1860-6