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Performance of CPU/GPU compiler directives on ISO/TTI kernels

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Abstract

GPUs are slowly becoming ubiquitous devices in High Performance Computing, as their capabilities to enhance the performance per watt of compute intensive algorithms as compared to multicore CPUs have been identified. The primary shortcoming of a GPU is usability, since vendor specific APIs are quite different from existing programming languages, and it requires a substantial knowledge of the device and programming interface to optimize applications. Hence, lately a growing number of higher level programming models are targeting GPUs to alleviate this problem. The ultimate goal for a high-level model is to expose an easy-to-use interface for the user to offload compute intensive portions of code (kernels) to the GPU, and tune the code according to the target accelerator to maximize overall performance with a reduced development effort. In this paper, we share our experiences of three of the notable high-level directive based GPU programming models—PGI, CAPS and OpenACC (from CAPS and PGI) on an Nvidia M2090 GPU. We analyze their performance and programmability against Isotropic (ISO)/Tilted Transversely Isotropic (TTI) finite difference kernels, which are primary components in the Reverse Time Migration (RTM) application used by oil and gas exploration for seismic imaging of the sub-surface. When ported to a single GPU using the mentioned directives, we observe an average 1.5–1.8x improvement in performance for both ISO and TTI kernels, when compared with optimized multi-threaded CPU implementations using OpenMP.

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Acknowledgments

We wish to thank Georges-Emmanuel Moulard of CAPS enterprise, Matthew Colgrove of PGI and, Philippe Thierry of Intel Corp., who helped us immensely by providing answers to our questions, and suggesting improvements. This work would not have been possible without their guidance. Finally, we would like to thank TOTAL for granting permission to publish this paper.

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Authors and Affiliations

  1. Department of Computer Science, University of Houston, Houston, TX, USA

    Sayan Ghosh & Barbara M. Chapman

  2. TOTAL E&P R&T USA, LLC, Houston, TX, USA

    Terrence Liao

  3. TOTAL E&P, Pau, France

    Henri Calandra

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  1. Sayan Ghosh
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  2. Terrence Liao
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  3. Henri Calandra
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  4. Barbara M. Chapman
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Correspondence to Sayan Ghosh.

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Ghosh, S., Liao, T., Calandra, H. et al. Performance of CPU/GPU compiler directives on ISO/TTI kernels. Computing 96, 1149–1162 (2014). https://doi.org/10.1007/s00607-013-0367-4

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  • DOI: https://doi.org/10.1007/s00607-013-0367-4

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