Abstract
For the exploration of system architecture dedicated to JPEG2000 coding, decoding and codec, a novel design framework is constructed. In order to utilize the scalability of JPEG2000 algorithm aggressively in system implementation, three types of modules are prepared for JPEG2000 coding/decoding/codec procedures, i.e. software, software accelerated with user-defined instructions, and dedicated hardware. Specifically, dedicated hardware modules for forward and inverse discrete wavelet transformation (shortly DWT), entropy coder, entropy decoder, and entropy codec as well as software acceleration of DWT procedure are devised to be used in the framework. Furthermore, a JPEG2000 encoder LSI, which consists of a configurable processor Xtensa, the DWT module, and the entropy coder, is fabricated to exemplify the system implementation designed through the use of proposed framework.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
ISO/IEC JTC1/SC29/WG1, Information technology – JPEG2000 image coding system: Core coding system (October 2002)
Tensilica, Inc., Xtensa Application Specific Microprocessor Solutions — Overview Handbook (September 2000)
Tensilica, Inc., Tensilica Instruction Extension (TIE) Language — User’s Guide (September 2000)
ISO/IEC JTC1/SC29/WG1, JPEG2000 verification model 9.1 (technical description) (June 2001)
ISO/IEC JTC1/SC29/WG1, Draft of FPDRAM-1 to 15444-1, (December 2000)
Chen, K.-F., Lian, C.-J., Chen, H.-H., Chen, L.-G.: Analysis and architecture design of EBCOT for JPEG-2000. In: Proc. of the 2001 IEEE International Symposium on Circuits and Systems (ISCAS 2001), March 2001, vol. 2, pp. 765–768 (2001)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2004 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Tsutsui, H. et al. (2004). Scalable Design Framework for JPEG2000 System Architecture. In: Yew, PC., Xue, J. (eds) Advances in Computer Systems Architecture. ACSAC 2004. Lecture Notes in Computer Science, vol 3189. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30102-8_25
Download citation
DOI: https://doi.org/10.1007/978-3-540-30102-8_25
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-23003-8
Online ISBN: 978-3-540-30102-8
eBook Packages: Springer Book Archive