Abstract
We report on a SystemC add-on library which extends every SystemC module with non-functional data regarding power consumption and physical layout and which accumulates and estimates dynamic energy usage. It supports both phase/mode power modelling and energy-per-transaction logging for TLM (transactional-level modelling). Wiring energy is computed by counting bit-level activity within the TLM generic payload. Each leaf component can also register its physical dimensions to facilitate a wire length estimator that traverses the SystemC model hierarchy using either full placement or Rent’s rule estimators. It also supports dynamic voltage islands and inter-chip wiring, where each transaction can consume energy according to the current supply voltage of the relevant islands and the nature of the interconnect. We report on basic performance from some SPLASH-2 benchmarks running on a modelled OpenRISC quad-core platform.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Similar content being viewed by others
Notes
- 1.
We use the word component to denote an sc_module that is so associated.) SystemC augments every sc_module (or other entity that inherits sc_object) with a key/value space where the values are void * pointers.
References
Benini, L., Bertozzi, D., Bogliolo, A., Menichelli, F., Olivieri, M.: Mparm: exploring the multi-processor SoC design space with SystemC. J. VLSI Signal Process. Syst. 41, 169–182 (2005)
Dhanwada, N.: A power estimation methodology for SystemC transaction level models. In: Proceedings of CODES-ISSS, Jersey City, pp. 142–147 (2005)
Ghenassia, F.: Transaction-Level Modeling with SystemC: TLM Concepts and Applications for Embedded Systems. Springer, Secaucus (2006)
Greenfield, D., Moore, S.W.: Fractal communication in software data dependency graphs. In: SPAA’08: Proceedings of the Twentieth Annual Symposium on Parallelism in Algorithms and Architectures, Munich, pp. 116–118. ACM, New York (2008)
Magnusson, P.S., Christensson, M., Eskilson, J., Forsgren, D., Hallberg, G., Hogberg, J., Larsson, F., Moestedt, A., Werner, B.: Simics: a full system simulation platform. Computer 35(2), 50–58 (2002)
Moy, M.: Mini power-aware TLM-platform. http://www-verimag.imag.fr/~moy/?Mini-Power-Aware-TLM-Platform (2010)
Pêcheux, F., El Abidine, K.Z., Greiner, A.: Early power estimation in heterogeneous designs using SoCLib and SystemC-AMS. In: Proceedings of the 20th International Conference on Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation, PATMOS’10, Grenoble, pp. 252–252. Springer, Berlin/Heidelberg (2011)
Piscitelli, R., Pimentel, A.D.: A signature-based power model for MPSoC on FPGA. VLSI Des. 2012, 6:6–6:6 (2012)
Rosenfeld, P., Cooper-Balis, E., Jacob, B.: Dramsim2: a cycle accurate memory system simulator. Comput. Archit. Lett. 10(1), 16–19 (2011)
Streubuhr, M., Rosales, R., Hasholzner, R., Haubelt, C., Teich, J.: ESL power and performance estimation for heterogeneous mpsocs using SystemC. In: Specification and Design Languages (FDL), 2011 Forum on, Oldenburg, pp. 1–8 (2011)
Tandon, J.: The openrisc processor: open hardware and linux. Linux J. 2011(212) (2011)
Thoziyoor, S., Ahn, J.H., Monchiero, M., Brockman, J.B., Jouppi, N.P.: A comprehensive memory modeling tool and its application to the design and analysis of future memory hierarchies. In: Proceedings of the 35th Annual International Symposium on Computer Architecture, ISCA’08, Beijing, pp. 51–62. IEEE Computer Society, Washington (2008)
Vece, G.B., Conti, M.: Power estimation in embedded systems within a SystemC-based design context: the PKtool environment. In: Seventh Workshop on Intelligent Solutions in Embedded Systems, Ancona, pp. 179–184 (2009)
Woo, S.C., Ohara, M., Torrie, E., Singh, J.P., Gupta, A.: The splash-2 programs: characterization and methodological considerations. SIGARCH Comput. Archit. News 23, 24–36 (1995)
Acknowledgements
We thank Matthieu Moy for providing the TLM POWER2 base platform.
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2014 Springer International Publishing Switzerland
About this paper
Cite this paper
Greaves, D., Yasin, M. (2014). TLM POWER3: Power Estimation Methodology for SystemC TLM 2.0. In: Haase, J. (eds) Models, Methods, and Tools for Complex Chip Design. Lecture Notes in Electrical Engineering, vol 265. Springer, Cham. https://doi.org/10.1007/978-3-319-01418-0_4
Download citation
DOI: https://doi.org/10.1007/978-3-319-01418-0_4
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-01417-3
Online ISBN: 978-3-319-01418-0
eBook Packages: EngineeringEngineering (R0)