Abstract
In this paper we demonstrate that declarative programming is a suitable vehicle for the programming of conventional distributed-memory multiprocessors. This is achieved by applying several transformations to the compiled declarative program to extract iteration-level parallelism. The transformations first group individual instructions into sequential light-weight processes, and then insert primitives to: (1) cause array allocation to be distributed over multiple processors, (2) cause computation to follow the data distribution by inserting an index filtering mechanism into a given loop and spawning a copy of it on all PEs; the filter causes each instance of that loop to operate on a different subrange of the index variable.
This work was supported by the NSF Grant CCR-8709817.
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Arvind, K. P. Gostelow, W. Plouffe: The Id Report: An Asynchronous Programming Language and Computing Machine. Technical Report #114, Department of Information and Computer Science, UCI (May 1978)
Arvind, R.S. Nikhil: Executing a Program on the MIT Tagged-Token Dataflow Architecture. Computation Structures Group Memo 271 (March 1987), Lab. for Computer Science, MIT, Cambridge, MA
Arvind, R. S. Nikhil, K. K. Pingali: ID Nouveau Reference Manual Part II: Operational Semantics. Technical Report (April 1987), Laboratory for Computer Science, MIT, Cambridge, MA
Arvind, R. S. Nikhil, K. K. Pingali: I-Structures: Data Structures for Parallel Computing. ACM TOPLAS, V11, n4, (1989), 598–632
L. Bic, M. D. Nagel, J. M. A. Roy: Automatic Data/Program Partitioning Using the Single Assignment Principle. Supercomputing '89 (1989), 551–556
W. P. Crowley, C. P. Henderson, T. E. Rudy: The SIMPLE Code. UCID 17715 (February 1978), Lawrence Livermore Laboratory.
D.E. Culler, et al: Fine-Grain Parallelism with Minimal Hardware Support: A Compiler-Controlled Threaded Abstract Machine. Proc. ASPLOS-IV (April 1991), Santa Clara, CA
J. L. Gaudiot, P. Evripidou: The USC Decoupled Multilevel Data-Flow Execution Model. In Advanced Topics in Data-Flow Computing, J-L. Gaudiot, L. Bic, Eds., Prentice-Hall, Inc., 1990.
G. R. Gao: A Flexible Architecture Model for Hybrid Dataflow and Control-Flow Evaluation. In Advanced Topics in Data-Flow Computing, J-L. Gaudiot, L. Bic, Eds., Prentice-Hall, Inc., 1990.
V.G. Grafe, G.S. Davidson, J.E. Hoch, V.P. Holmes: The Epsilon Dataflow Processor. Proc. 16th Annual Int'l Symp. on Computer Arch. (1989)
R. A. Iannucci: Toward a Dataflow/von Neumann Hybrid Architecture. Proc. 15th Int'l Symp. on Computer Architecture (1988)
P.J. Landin: A Correspondence Between ALGOL 60 and Church's Lambda-Notation: Part I. Comm. ACM, V8, n2 (1965), 89–101
R.S. Nikhil: ID Nouveau Reference Manual Part I: Syntax. MIT Technical Report (April 1987), Laboratory for Computer Science, MIT, Cambridge, MA
R.S. Nikhil: ID Reference Manual — Version 88.1. Computation Structures Group Memo 284 (August 1988), Laboratory for Computer Science, MIT, Cambridge, MA
R.S. Nikhil, Arvind: Can Dataflow Subsume von Neumann Computing? 16th Int'l Computer Architecture Conference, Jerusalem (1989)
K. Pingali, A. Rogers: Compiler Parallelization of SIMPLE for a Distributed Memory Machine. TR 90-1084 (January 1990), Department of Computer Science, Cornell University
A. Rogers, K. Pingali: Compiling Programs for Distributed Memory Architectures. 4th Hypercube Concurrent Computers and Applications Conference (1989), 529–542
S. Sakai, Y. Yamaguchi, K. Hiraki, Y. Kodama, T. Tuba: An Architecture of a Dataflow Chip Processor. Proc. 16th Annual Int'l Symp. on Computer Arch., Jerusalem, (June 1989)
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© 1992 Springer-Verlag Berlin Heidelberg
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Bic, L., Roy, J.M.A., Nagel, M. (1992). Declarative programming for conventional MIMD multiprocessors. In: Etiemble, D., Syre, JC. (eds) PARLE '92 Parallel Architectures and Languages Europe. PARLE 1992. Lecture Notes in Computer Science, vol 605. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-55599-4_111
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DOI: https://doi.org/10.1007/3-540-55599-4_111
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