Abstract
In this paper we address the L ∞ Voronoi diagram of polygonal objects and present applications in VLSI layout and manufacturing. We show that in L ∞ the Voronoi diagram of segments consists only of straight line segments and is thus much simpler to compute than its Euclidean counterpart. Moreover, it has a natural interpretation. In applications where Euclidean precision is not particularly important the L ∞ Voronoi diagram can provide a better alternative. Using the L ∞ Voronoi diagram of polygons we address the problem of calculating the critical area for shorts in a VLSI layout. The critical area computation is the main computational problem in VLSI yield prediction.
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Papadopoulou, E. (1998). L∞ Voronoi Diagrams and Applications to VLSI Layout and Manufacturing. In: Chwa, KY., Ibarra, O.H. (eds) Algorithms and Computation. ISAAC 1998. Lecture Notes in Computer Science, vol 1533. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-49381-6_3
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DOI: https://doi.org/10.1007/3-540-49381-6_3
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