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Information processing with associative processors

  • Architectural Aspects (Session 3.1)
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CONPAR 86 (CONPAR 1986)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 237))

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Abstract

Associative processors keep their data in content addressable memories (CAMs) accessing them by content, not address. Our interest concentrates on how associative processors can be used for inference processes.

We have developed the model of an associative processor based on the Deduction Plan theorem proving method. Our approach also includes a unification algorithm which provides information about all causes of unification conflicts (if any) and allows simple backtracking of the unification graph.

Project sponsored by the Deutsche Forschungsgemeinschaft (DFG) under grant number Ma 581/4-1

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6. References

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Author information

Authors and Affiliations

  1. Universität Kaiserslautern Fachbereich Informatik, D-6750, Kaiserslautern

    Hans-Albert Schneider

  2. FhG-IITB, Sebastian-Kneipp-Str. 12, D-7500, Karlsruhe

    Werner Dilger

Authors
  1. Hans-Albert Schneider
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  2. Werner Dilger
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Editor information

Wolfgang Händler Dieter Haupt Rolf Jeltsch Wilfried Juling Otto Lange

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© 1986 Springer-Verlag Berlin Heidelberg

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Schneider, HA., Dilger, W. (1986). Information processing with associative processors. In: Händler, W., Haupt, D., Jeltsch, R., Juling, W., Lange, O. (eds) CONPAR 86. CONPAR 1986. Lecture Notes in Computer Science, vol 237. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-16811-7_174

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  • DOI: https://doi.org/10.1007/3-540-16811-7_174

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-16811-9

  • Online ISBN: 978-3-540-44856-3

  • eBook Packages: Springer Book Archive

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