Acronyms
Commonly and not-so-commonly used acronyms.
Artificial Intelligence (AI)
Using machines to make decisions based upon stored knowledge and sensory input.
Automotive
Issues dealing with the development of automotive electronics.
Communications
The plumbing on chip, among chips and between devices, that sends bits of data and manages that data.
Data Analytics & Test
How semiconductors are sorted and tested before and after implementation of the chip in a system.
Integrated Circuits (ICs)
Integration of multiple devices onto a single piece of semiconductor
Intellectual Property (IP)
A design or verification unit that is pre-packed and available for licensing.
IoT & IIoT
Separate electronic devices using Internet or other connections to communicate among the devices. Usually sensors or actuators are sending data to a computing hub.
Languages
Languages are used to create models
Materials
Semiconductor materials enable electronic circuits to be constructed.
Memory
A semiconductor device capable of retaining state information for a defined period of time.
Packaging
How semiconductors get assembled and packaged.
Semiconductor Manufacturing
Subjects related to the manufacture of semiconductors
Semiconductor Security
Methods and technologies for keeping data safe.
User Interfaces
User interfaces is the conduit a human uses to communicate with an electronics device.
2.5D
Multiple chips arranged in a planar or stacked configuration with an interposer for communication.
3D ICs
2.5D and 3D forms of integration
3D NAND
A memory architecture in which memory cells are designed vertically instead of using a traditional floating gate.
3D Transistors
Transistors where source and drain are added as fins of the gate.
5G
Next-generation wireless technology with higher data transfer rates, low latency, and able to support more devices.
A brief history of design
We start with schematics and end with ESL
A brief history of logic simulation
Important events in the history of logic simulation
A brief history of logic synthesis
Early development associated with logic synthesis
ADAS: Advanced Driver Assistance Systems
Sensing and processing to make driving safer.
Advanced (Smart) Fill
At newer nodes, more intelligence is required in fill because it can affect timing, signal integrity and require fill for all layers.
Advanced Packaging
A collection of approaches for combining chips into packages, resulting in lower power and lower cost.
Agile
An approach to software development focusing on continual delivery and flexibility to changing requirements
Agile Hardware Development
How Agile applies to the development of hardware systems
Air Gap
A way of improving the insulation between various components in a semiconductor by creating empty space.
Ambient Intelligence
A collection of intelligent electronic environments.
Amdahl’s Law
The theoretical speedup when adding processors is always limited by the part of the task that cannot benefit from the improvement.
Analog
Semiconductors that measure real-world conditions
Analog circuits
Analog integrated circuits are integrated circuits that make a representation of continuous signals in electrical form.
Analog Design and Verification
The design and verification of analog components.
Application Programming Interface (API)
A software tool used in software programming that abstracts all the programming steps into a user interface for the developer.
Application Specific Integrated Circuit (ASIC)
A custom, purpose-built integrated circuit made for a specific task or product.
Application-Specific Standard Product (ASSP)
An IC created and optimized for a market and sold to multiple companies.
Assertion
Code that looks for violations of a property
Atomic Force Microscopy (AFM), Atomic Force Microscope (AFM)
A method of measuring the surface structures down to the angstrom level.
Atomic Layer Deposition (ALD)
A method of depositing materials and films in exact places on a surface.
Atomic Layer Etch (ALE)
ALE is a next-generation etch technology to selectively and precisely remove targeted materials at the atomic scale.
Automatic Test Pattern Generation (ATPG)
The generation of tests that can be used for functional or manufacturing verification
Automotive Architectures
Electronic systems in the vehicles are networked in different architectures types.
Automotive Ethernet, Time Sensitive Networking (TSN)
Time sensitive networking puts real time into automotive Ethernet.
Avalanche Noise
Noise in reverse biased junctions
AVM
Verification methodology created by Mentor
Backend-of-the-line (BEOL)
IC manufacturing processes where interconnects are made.
Batteries
Devices that chemically store energy.
Behavioral Synthesis
Transformation of a design described in a high-level of abstraction to RTL
Biometrics
Security based on scans of fingerprints, palms, faces, eyes, DNA or movement.
Blech Effect
A reverse force to electromigration.
Bluetooth Low Energy
Also known as Bluetooth 4.0, an extension of the short-range wireless protocol for low energy applications.
BSIM
Transistor model
Built-in self-test (BiST)
On-chip logic to test a design.
Bunch of Wires (BoW)
Chiplet interconnect specification.
Bus Functional Model
Interface model between testbench and device under test
C, C++
C, C++ are sometimes used in design of integrated circuits because they offer higher abstraction.
Cache Coherent Interconnect for Accelerators (CCIX)
Interconnect standard which provides cache coherency for accelerators and memory expansion peripheral devices connecting to processors.
CAN bus
Automotive bus developed by Bosch
CD-SEM: Critical-Dimension Scanning Electron Microscope
CD-SEM, or critical-dimension scanning electron microscope, is a tool for measuring feature dimensions on a photomask.
CDC design principles
Making CDC interfaces predictable
Cell-Aware Test
Fault model for faults within cells
Cell-Aware Test for FinFET
Cell-aware test methodology for addressing defect mechanisms specific to FinFETs.
Central Processing Unit (CPU)
The CPU is an dedicated integrated circuit or IP core that processes logic and math.
Characterization/Metrology Lab
A lab that wrks with R&D organizations and fabs involved in the early analytical work for next-generation devices, packages and materials.
Checker
Testbench component that verifies results
Chemical Vapor Deposition (CVD)
A process used to develop thin films and polymer coatings.
Chip Design
Design is the process of producing an implementation from a conceptual form
Chip Design and Verification
The design, verification, implementation and test of electronics systems into integrated circuits.
Chip Thermal Interface Protocol
Exchange of thermal design information for 3D ICs
Chiplets
A discrete unpackaged die that can be assembled into a package with other chiplets.
Clock Domain Crossing (CDC)
Asynchronous communications across boundaries
Clock Gating
Dynamic power reduction by gating the clock
Clock Tree Optimization
Design of clock trees for power reduction
Cloud
The cloud is a collection of servers that run Internet software you can use on your device or computer.
CMOS
Fabrication technology
Cobalt
Cobalt is a ferromagnetic metal key to lithium-ion batteries.
Code Coverage
Metrics related to about of code executed in functional verification
Combinatorial Equivalence Checking
Verify functionality between registers remains unchanged after a transformation
Compiled-code Simulation
Faster form for logic simulation
Complementary FET (CFET)
Complementary FET, a new type of vertical transistor.
Compound Semiconductors
Combinations of semiconductor materials.
Compute Express Link (CXL)
Interconnect between CPU and accelerators.
Contact
The structure that connects a transistor with the first layer of copper interconnects.
Convolutional Neural Network (CNN)
A technique for computer vision based on machine learning.
Coverage
Completion metrics for functional verification
Crosstalk
Interference between signals
Crypto processors
Crypto processors are specialized processors that execute cryptographic algorithms within hardware.
Current Intellectual Property Companies
Companies supplying IP or IP services
Dark Silicon
A method of conserving power in ICs by powering down segments of a chip when they are not in use.
Data Analytics
Data analytics uses AI and ML to find patterns in data to improve processes in EDA and semi manufacturing.
Data Centers
A data center is a physical building or room that houses multiple servers with CPUs for remote data storage and processing.
Data processing
Data processing is when raw data has operands applied to it via a computer or server to process data into another useable form. This definition category includes how and where the data is processed.
De Facto Standards
A standard that comes about because of widespread acceptance or adoption.
Debug
The removal of bugs from a design
Deep Learning (DL)
Deep learning is a subset of artificial intelligence where data representation is based on multiple layers of a matrix.
Dennard’s Law
An observation that as features shrink, so does power consumption.
Design for Manufacturing (DFM)
Actions taken during the physical design stage of IC development to ensure that the design can be accurately manufactured.
Design for Test (DFT)
Techniques that reduce the difficulty and cost associated with testing an integrated circuit.
Design Patent
Protection for the ornamental design of an item
Design Rule Checking (DRC)
A physical design process to determine if chip satisfies rules defined by the semiconductor manufacturer
Design Rule Pattern Matching
Locating design rules using pattern matching techniques.
Device Noise
Sources of noise in devices
DFT and Clock Gating
Insertion of test logic for clock-gating
Diamond Semiconductors
A wide-bandgap synthetic material.
Digital IP
Categorization of digital IP
Digital Oscilloscope
Allowed an image to be saved digitally
Digital Signal Processor (DSP)
A digital signal processor is a processor optimized to process signals.
Digital Twins
A digital representation of a product or system.
Directed Self-Assembly (DSA)
A complementary lithography technology.
DNA biometrics
DNA analysis is based upon unique DNA sequencing.
DNA Chips
Using deoxyribonucleic acid to make chips hacker-proof.
Double Patterning
A patterning technique using multiple passes of a laser.
Double Patterning Methodologies
Colored and colorless flows for double patterning
DRAM: Dynamic Random Access Memory
Single transistor memory that requires refresh.
Dynamic Voltage and Frequency Scaling (DVFS)
Dynamically adjusting voltage and frequency for power reduction
e
Hardware Verification Language
E-beam Inspection
A slower method for finding smaller defects.
E-Beam Lithography
Lithography using a single beam e-beam tool
Edge Placement Error (EPE)
The difference between the intended and the printed features of an IC layout.
Electromigration
Electromigration (EM) due to power densities
Electronic Design Automation (EDA)
Electronic Design Automation (EDA) is the industry that commercializes the tools, methodologies and flows associated with the fabrication of electronic systems.
Electronic System Level (ESL)
Levels of abstraction higher than RTL used for design and verification
Electrostatic Discharge (ESD)
Transfer of electrostatic charge.
Embedded FPGA (eFPGA)
An eFPGA is an IP core integrated into an ASIC or SoC that offers the flexibility of programmable logic without the cost of FPGAs.
Emulation
Special purpose hardware used for logic verification
Energy Harvesting
Capturing energy from the environment
Environmental Noise
Noise caused by the environment
Epitaxy
A method for growing or depositing mono crystalline films on a substrate.
Erasable Programmable Read Only Memory (EPROM)
Programmable Read Only Memory that was bulk erasable.
eRM
Reuse methodology based on the e language
Error Correction Code (ECC)
Methods for detecting and correcting errors.
Ethernet
Ethernet is a reliable, open standard for connecting devices by wire.
EUV: Extreme Ultraviolet Lithography
EUV lithography is a soft X-ray technology.
Failure Analysis
Finding out what went wrong in semiconductor design and manufacturing.
Fan-Outs
A way of including more features that normally would be on a printed circuit board inside a package.
Fault Simulation
Evaluation of a design under the presence of manufacturing defects
Femtocells
The lowest power form of small cells, used for home WiFi networks.
Ferroelectric FETs (FeFET)
Ferroelectric FET is a new type of memory.
Field Programmable Gate Array (FPGA)
Reprogrammable logic device
Fill
The use of metal fill to improve planarity and to manage electrochemical deposition (ECD), etch, lithography, stress effects, and rapid thermal annealing.
FinFET
A three-dimensional transistor.
Flash Memory
non-volatile, erasable memory
Flexible Hybrid Electronics (FHE)
Integrated circuits on a flexible substrate
FlexRay ISO17458
An automotive communications protocol
Flicker Noise
Noise related to resistance fluctuation
Flip-Chip
A type of interconnect using solder balls or microbumps.
Forksheet FET
A transistor type with integrated nFET and pFET.
Formal Verification
Formal verification involves a mathematical proof to show that a design adheres to a property
Foundry, pure-play foundry
A company that specializes in manufacturing semiconductor devices.
Fully Depleted Silicon On Insulator (FD-SOI)
FD-SOI is a semiconductor substrate material with lower current leakage compared than bulk CMOS.
Functional Coverage
Coverage metric used to indicate progress in verifying functionality
Functional Design and Verification
Functional Design and Verification is currently associated with all design and verification functions performed before RTL synthesis.
Functional Verification
Functional verification is used to determine if a design, or unit of a design, conforms to its specification.
Gage R&R, Gage Repeatability And Reproducibility
A statistical method for determining if a test system is production ready by measuring variation during test for repeatability and reproducibility.
Gallium Nitride (GaN)
GaN is a III-V material with a wide bandgap.
Gate-All-Around FET (GAA FET)
A transistor design with a gate is placed on all four sides of the channel.
Gate-Level Power Optimizations
Power reduction techniques available at the gate level.
Generation-Recombination Noise
noise related to generation-recombination
Generative Adversarial Network (GAN)
A neural network framework that can generate new data.
Germany
Germany is known for its automotive industry and industrial machinery.
Graphene
2D form of carbon in a hexagonal lattice.
Graphics Processing Unit (GPU)
An electronic circuit designed to handle graphics and video.
Guard Banding
Adding extra circuits or software into a design to ensure that if one part doesn't work the entire system doesn't fail.
Hard IP
Fully designed hardware IP block
Hardware Assisted Verification
Use of special purpose hardware to accelerate verification
Hardware Modeler
Historical solution that used real chips in the simulation process
hardware/software co-design
Optimizing the design by using a single language to describe hardware and software.
Heat Dissipation
Power creates heat and heat affects power
Heterogeneous Integration
The process of integrating different chips, chiplets, and chip components into packages.
High-Bandwidth Memory (HBM)
A dense, stacked version of memory with high-speed interfaces that can be used in advanced packaging.
High-Density Advanced Packaging (HDAP)
An umbrella term (circa 2015) for advanced packaging in semiconductors.
High-Level Synthesis (HLS)
Synthesis technology that transforms an untimed behavioral description into RTL
HSA Platform System Architecture Specification
Defines a set of functionality and features for HSA hardware
HSA Programmer’s Reference Manual
HSAIL Virtual ISA and Programming Model, Compiler Writer, and Object Format (BRIG)
HSA Runtime Programmer’s Reference Manual
Runtime capabilities for the HSA architecture
Hybrid Cloud
Combines use of a public cloud service with a private cloud, such as a company's internal enterprise servers or data centers.
Hyperscale Data Centers
A data center facility owned by the company that offers cloud services through that data center.
IC Types
What are the types of integrated circuits?
IEEE 1076-VHSIC HW Description Language
Hardware Description Language
IEEE 1076.1-Analog & Mixed-Signal
Analog extensions to VHDL
IEEE 1076.1.1-VHDL-AMS Standard Packages
A collection of VHDL 1076.1 packages
IEEE 1076.4-VHDL Synthesis Package – Floating Point
Modeling of macro-cells in VHDL
IEEE 1149 Boundary Scan Test
Boundry Scan Test
IEEE 1364-Verilog
IEEE ratified version of Verilog
IEEE 1364.1-Verilog RTL Synthesis
Standard for Verilog Register Transfer Level Synthesis
IEEE 1532- in-system programmability (ISP)
Extension to 1149.1 for complex device programming
IEEE 1647-Functional Verification Language e
Functional verification language
IEEE 1666-Standard SystemC
SystemC
IEEE 1685-IP-XACT
Standard for integration of IP in System-on-Chip
IEEE 1687-IEEE Standard for Access and Control of Instrumentation Embedded
IEEE Standard for Access and Control of Instrumentation Embedded within a Semiconductor Device
IEEE 1800-SystemVerilog
IEEE ratified version of SystemVerilog
IEEE 1800.2–UVM
Universal Verification Methodology
IEEE 1801-Design/Verification of Low-Power, Energy-Aware UPF
IEEE Standard for Design and Verification of Low-Power Integrated Circuits also known by its Accellera name of Unified Power Format (UPF)
IEEE 1838: Test Access Architecture for 3D Stacked IC
Standard for Test Access Architecture for Three-Dimensional Stacked Integrated Circuits
IEEE 1850-Property Specification Language (PSL)
Verification language based on formal specification of behavior
IEEE 802.1-Higher Layer LAN Protocols
IEEE 802.1 is the standard and working group for higher layer LAN protocols.
IEEE 802.11-Wireless LAN
IEEE 802.11 working group manages the standards for wireless local area networks (LANs).
IEEE 802.15-Wireless Specialty Networks (WSN)
IEEE 802.15 is the working group for Wireless Specialty Networks (WSN), which are used in IoT, wearables and autonomous vehicles.
IEEE 802.18-Radio Regulatory TAG
"RR-TAG" is a technical advisory group supporting IEEE standards groups working on 802.11, 802.12, 802.16, 802.20, 802.21, and 802.22.
IEEE 802.19-Wireless Coexistence
Standards for coexistence between wireless standards of unlicensed devices.
IEEE 802.22-Wireless Regional Area Networks
Enables broadband wireless access using cognitive radio technology and spectrum sharing in white spaces.
IEEE 802.3-Ethernet
IEEE 802.3-Ethernet working group manages the IEEE 802.3-Ethernet standards.
IEEE P2415: Unified HW Abstraction & Layer for Energy Proportional Electronic Systems
Standard for Unified Hardware Abstraction and Layer for Energy Proportional Electronic Systems
IEEE P2416-Power Modeling
Power Modeling Standard for Enabling System Level Analysis
IIoT: Industrial Internet of Things
Specific requirements and special consideration for the Internet of Things within an Industrial setting.
Impact of lithography on wafer costs
Wafer costs across nodes
Implementation Power Optimizations
Power optimization techniques for physical implementation
In-Memory Computing
Performing functions directly in the fabric of memory.
Induced Gate Noise
Thermal noise within a channel
Instruction Set Architecture (ISA)
A set of basic operations a computer must support.
Insulated-Gate Bipolar Transistors (IGBT)
IGBTs are combinations of MOSFETs and bipolar transistors.
Integrated Device Manufacturer (IDM)
A semiconductor company that designs, manufactures, and sells integrated circuits (ICs).
Intelligent Self-Organizing Networks
Networks that can analyze operating conditions and reconfigure in real time.
Inter Partes Review
Method to ascertain the validity of one or more claims of a patent
Interconnects (BEOL)
Buses, NoCs and other forms of connection between various elements in an integrated circuit.
Internet of Things (IoT)
Also known as the Internet of Everything, or IoE, the Internet of Things is a global application where devices can connect to a host of other devices, each either providing data from sensors, or containing actuators that can control some function. Data can be consolidated and processed on mass in the Cloud.
Interposers
Fast, low-power inter-die conduits for 2.5D electrical signals.
Inverse Lithography Technology (ILT)
Finding ideal shapes to use on a photomask.
Ion Implants
Injection of critical dopants during the semiconductor manufacturing process.
IP-XACT Working Group
Standard for integration of IP in System-on-Chip
IR Drop
The voltage drop when current flows through a resistor.
ISO 26262 Terminology
Terminology in ISO 26262
ISO 26262 – Functional safety
Standard related to the safety of electrical and electronic systems within a car
ISO/PAS 21448 – SOTIF
Standard to ensure proper operation of automotive situational awareness systems.
ISO/SAE FDIS 21434-Road Vehicles — Cybersecurity Engineering
A standard (under development) for automotive cybersecurity.
Koomey’s Law
The energy efficiency of computers doubles roughly every 18 months.
Laws
Theories have been influential and are often referred to as "laws" and are discussed in trade publications, research literature, and conference presentations as "truisms" that eventually have limits.
Layout versus Schematic Checking (LVS)
Device and connectivity comparisons between the layout and the schematic
Level Shifters
Cells used to match voltages across voltage islands
Lidar: Light Detection And Ranging
Measuring the distance to an object with pulsed lasers.
LIN bus
Low cost automotive bus
Line Edge Roughness (LER)
Deviation of a feature edge from ideal shape.
Lint
Removal of non-portable or suspicious code
Litho Etch Litho Etch (LELE)
LELE is a form of double patterning
Litho Freeze Litho Etch
A type of double patterning.
Lithography
Light used to transfer a pattern from a photomask onto a substrate.
Lithography k1 coefficient
Coefficient related to the difficulty of the lithography process
Logic Resizing
Correctly sizing logic elements
Logic Restructuring
Restructuring of logic for power reduction
Logic Simulation
A simulator is a software process used to execute a model of hardware
Low Power Methodologies
Methodologies used to reduce power consumption.
Low Power Verification
Verification of power circuitry
LVDS (low-voltage differential signaling)
A technical standard for electrical characteristics of a low-power differential, serial communication protocol.
Machine Learning (ML)
An approach in which machines are trained to favor basic behaviors and outcomes rather than explicitly programmed to do certain tasks. That results in optimization of both hardware and software to achieve a predictable range of results.
Magnetoresistive RAM (MRAM)
Uses magnetic properties to store data
Makimoto’s Wave
Observation related to the amount of custom and standard content in electronics.
Manufacturing Execution System (MES)
Tracking a wafer through the fab.
Manufacturing Noise
Noise sources in manufacturing
Memory Banking
Use of multiple memory banks for power reduction
MEMS
Microelectromechanical Systems are a fusion of electrical and mechanical engineering and are typically used for sensors and for advanced microphones and even speakers.
Metal Organic Chemical Vapor Deposition (MOCVD)
A key tool for LED production.
Metamaterials
Artificial materials containing arrays of metal nanostructures or mega-atoms.
Metastability
Unstable state within a latch
Metcalfe’s Law
Observation that relates network value being proportional to the square of users
Methodologies and Flows
Describes the process to create a product
Metrology
Metrology is the science of measuring and characterizing tiny structures and materials.
Microcontroller (MCU)
A type of processor that traditionally was a scaled-down, all-in-one embedded processor, memory and I/O for use in very specific operations.
Microprocessor, Microprocessor Unit (MPU)
The integrated circuit that first put a central processing unit on one chip of silicon.
Mixed-Signal
The integration of analog and digital.
Models and Abstractions
Models are abstractions of devices
Molded Interconnect Substrate (MIS)
A midrange packaging option that offers lower density than fan-outs.
Monolithic 3D Chips
A way of stacking transistors inside a single chip instead of a package.
Moore’s Law
Observation related to the growth of semiconductors by Gordon Moore.
Mote
A mote is a micro-sensor.
Multi-Beam e-Beam Lithography
An advanced form of e-beam lithography
Multi-chip Modules (MCM)
An early approach to bundling multiple functions into a single package.
Multi-Corner Multi-Mode (MCMM) Analysis
Increasing numbers of corners complicates analysis. Concurrent analysis holds promise.
Multi-site testing
Using a tester to test multiple dies at the same time.
Multi-Vt
Use of multi-threshold voltage devices
Multipath Propagation
When a signal is received via different paths and dispersed over time.
Multiple Patterning
A way to image IC designs at 20nm and below.
MXenes
A durable and conductive material of two-dimensional inorganic compounds in thin atomic layers.
Nanoimprint Lithography
A hot embossing process type of lithography.
Nanosheet FET
A type of field-effect transistor that uses wider and thicker wires than a lateral nanowire.
Near Threshold Computing
Optimizing power by computing below the minimum operating voltage.
Near-Memory Computing
Moving compute closer to memory to reduce access costs.
Negative Bias Temperature Instability (NBTI)
NBTI is a shift in threshold voltage with applied stress.
Network on Chip (NoC)
An in-chip network, often in a SoC, that connects IP blocks and components and routes data packets among them.
Neural Networks
A method of collecting data from the physical world that mimics the human brain.
Neuromorphic Computing
A compute architecture modeled on the human brain.
Nodes
Nodes in semiconductor manufacturing indicate the features that node production line can create on an integrated circuit, such as interconnect pitch, transistor density, transistor type, and other new technology.
Noise
Random fluctuations in voltage or current on a signal.
One-Time-Programmable Memory (OTP)
Programmable Read Only Memory (PROM) and One-Time-Programmable (OTP) Memory can be written to once.
Open Systems Interconnection model (OSI model)
OSI model describes the main data handoffs in a network.
Open Verification Methodology (OVM)
Verification methodology created from URM and AVM
Operand Isolation
Disabling datapath computation when not enabled
Optical Inspection
Method used to find defects on a wafer.
Optical Proximity Correction (OPC)
A way to improve wafer printability by modifying mask patterns.
Original Equipment Manufacturer (OEM)
The company that buys raw goods, including electronics and chips, to make a product.
Outsourced Semiconductor Assembly and Test (OSAT)
Companies who perform IC packaging and testing - often referred to as OSAT
Overlay
The ability of a lithography scanner to align and print various layers accurately on top of each other.
PAM-4 Signaling
A high-speed signal encoding technique.
Part Average Testing (PAT)
Outlier detection for a single measurement, a requirement for automotive electronics.
Patents
A patent is an intellectual property right granted to an inventor
PCI Express (PCIe), Peripheral Component Interconnect Express
High-speed serial expansion bus for connecting sending data between devices.
Pellicle
A thin membrane that prevents a photomask from being contaminated.
Phase-Change Memory
Memory that stores information in the amorphous and crystalline phases.
Photomask
A template of what will be printed on a wafer.
Photoresist
Light-sensitive material used to form a pattern on the substrate.
Physical Design
Design and implementation of a chip that takes physical placement, routing and artifacts of those into consideration.
Physical Layer (PHY)
Physically connects devices and is the conduit that encodes, decodes bits of data.
Physical Vapor Deposition (PVD)
PVD is a deposition method that involves high-temperature vacuum evaporation and sputtering.
Physical Verification
Making sure a design layout works as intended.
Physically Unclonable Functions (PUFs)
A set of unique features that can be built into a chip but not cloned.
Picocells
A small cell that is slightly higher in power than a femtocell.
Pin Swapping
Lowering capacitive loads on logic
PODEM
An algorithm used ATPG
Portable Stimulus (PSS)
Hardware Verification Language, PSS is defined by Accellera and is used to model verification intent in semiconductor design.
Power Consumption
Components of power consumption
Power Cycle Sequencing
Power domain shutdown and startup
Power Definitions
Definitions of terms related to power
Power Delivery Network (PDN)
Moving power around a device.
Power Estimation
How is power consumption estimated
Power Gating
Reducing power by turning off parts of a design
Power Gating Retention
Special flop or latch used to retain the state of the cell when its main power supply is shut off.
Power Isolation
Addition of isolation cells around power islands
Power Issues
Power reduction at the architectural level
Power Management Coverage
Ensuring power control circuitry is fully verified
Power Management IC (PMIC)
An integrated circuit that manages the power in an electronic device or module, including any device that has a battery that gets recharged.
Power MOSFETs
A power semiconductor used to control and convert electric power.
Power Semiconductors
A power IC is used as a switch or rectifier in high voltage power applications.
Power Supply Noise
Noise transmitted through the power delivery network
Power Switching
Controlling power for power shutoff
Power-Aware Design
Techniques that analyze and optimize power in a design
Power-Aware Test
Test considerations for low-power circuitry
PPA (Power, Performance, Area)
Fundamental tradeoffs made in semiconductor design for power, performance and area.
Printed Circuit Board (PCB)
The design, verification, assembly and test of printed circuit boards
Private Cloud
Data centers and IT infrastructure for data storage and computing that a company owns or subscribes to for use only by that company.
Process Power Optimizations
power optimization techniques at the process level
Process Variation
Variability in the semiconductor manufacturing process
Processor Utilization
A measurement of the amount of time processor core(s) are actively in use.
Processors
An integrated circuit or part of an IC that does logic and math processing.
Property Specification Language
Verification language based on formal specification of behavior
Public Cloud
Data storage and computing done in a data center, through a service offered by a cloud service provider, and accessed on the public Internet.
Quantum Computing
A different way of processing data using qubits.
Radio Frequency Silicon On Insulator (RF-SOI)
RF SOI is the RF version of silicon-on-insulator (SOI) technology.
Random Telegraph Noise
Random trapping of charge carriers
Rapid Thermal Anneal (RTA), Rapid Thermal Processing (RTP)
The process of rapidly heating wafers.
Rare Earth Elements
Critical metals used in electronics.
Read Only Memory (ROM)
Read Only Memory (ROM) can be read from but cannot be written to.
Recurrent Neural Network (RNN)
An artificial neural network that finds patterns in data using other data stored in memory.
Redistribution Layers (RDLs)
Copper metal interconnects that electrically connect one part of a package to another.
Reliability Verification
Design verification that helps ensure the robustness of a design and reduce susceptibility to premature or catastrophic electrical failures.
ReRAM materials
Materials used to manufacture ReRAMs
Resistive RAM (ReRAM/RRAM)
Memory utilizing resistive hysteresis
Reticle
Synonymous with photomask.
Rich Interactive Test Database (RITdb)
A proposed test data standard aimed at reducing the burden for test engineers and test operations.
RISC-V
An open-source ISA used in designing integrated circuits at lower cost.
Root of Trust
Trusted environment for secure functions.
RTL (Register Transfer Level)
An abstraction for defining the digital portions of a design
RTL Power Optimizations
Optimization of power consumption at the Register Transfer Level
RTL Signoff
A series of requirements that must be met before moving past the RTL phase
RVM
Verification methodology based on Vera
SAT Solver
Algorithm used to solve problems
Scan Test
Additional logic that connects registers into a shift register or scan chain for increased test efficiency.
Scoreboard
Mechanism for storing stimulus in testbench
SCV SystemC Verification
Testbench support for SystemC
Self-Aligned Double Patterning (SADP)
A form of double patterning.
Sensor Fusion
Combining input from multiple sensor types.
Sensor Signal Conditioner (SSC)
An IC that conditions an analog sensor signal and converts to it digital before sending to a microcontroller.
Sensors
Sensors are a bridge between the analog world we live in and the underlying communications infrastructure.
serializer/deserializer (SerDes)
A transmission system that sends signals over a high-speed connection from a transceiver on one chip to a receiver on another. The transceiver converts parallel data into serial stream of data that is re-translated into parallel on the receiving end.
Shift Left
In semiconductor development flow, tasks once performed sequentially must now be done concurrently.
Shmooing, Shmoo test, Shmoo plot
Sweeping a test condition parameter through a range and obtaining a plot of the results.
Short Channel Effects
When channel lengths are the same order of magnitude as depletion-layer widths of the source and drain, they cause a number of issues that affect design.
Shot Noise
Quantization noise
Side Channel Attacks
A class of attacks on a device and its contents by analyzing information using different access methods.
silent data corruption (SDC)
Undetected errors in data output from an integrated circuit.
Silicon Carbide (SiC)
A wide-bandgap technology used for FETs and MOSFETs for power transistors.
Silicon Photonics
The integration of photonic devices into silicon
Simulation
A simulator exercises of model of hardware
Simulation Acceleration
Special purpose hardware used to accelerate the simulation process.
Simultaneous Switching Noise
Disturbance in ground voltage
Single transistor DRAM
Single transistor DRAM
Small Cells
Wireless cells that fill in the voids in wireless infrastructure.
Soft IP
Synthesizable IP block
Software-Driven Verification
Verification methodology utilizing embedded processors
Software/Hardware Interface for Multicore/Manycore (SHIM) processors
Defines an architecture description useful for software design
SPICE
Circuit Simulator first developed in the 70s
Spiking Neural Network (SNN)
A type of neural network that attempts to more closely model the brain.
Spin-Orbit Torque MRAM (SOT-MRAM)
A type of MRAM with separate paths for write and read.
Spread Spectrum
A secure method of transmitting data wirelessly.
Standard Essential Patent
A patent that has been deemed necessary to implement a standard.
Standard Test Data Format (STDF)
The most commonly used data format for semiconductor test information.
Standards
Standards are important in any industry.
Static Random Access Memory (SRAM)
SRAM is a volatile memory that does not require refresh
Stimulus Constraints
Constraints on the input to guide random generation process
Stochastics, Stochastic-Induced Defects
Random variables that cause defects on chips during EUV lithography.
STT-MRAM
An advanced type of MRAM
Substrate Biasing
Use of Substrate Biasing
Substrate Noise
Coupling through the substrate.
Switches
Network switches route data packet traffic inside the network.
Synchronous DRAM
Type of DRAM with faster transfer
System In Package (SiP)
A method for bundling multiple ICs to work together as a single chip.
System on Chip (SoC)
A system on chip (SoC) is the integration of functions necessary to implement an electronic system onto a single substrate and contains at least one processor
SystemC
A class library built on top of the C++ language used for modeling hardware
SystemC-AMS
Analog and mixed-signal extensions to SystemC
SystemVerilog
Industry standard design and verification language
Tensor Processing Unit (TPU)
Google-designed ASIC processing unit for machine learning that works with TensorFlow ecosystem.
Testbench
Software used to functionally verify a design
Thermal Noise
Noise related to heat
Through-Silicon Vias (TSVs)
Through-Silicon Vias are a technology to connect various die in a stacked die configuration.
Transistors
Basic building block for both analog and digital integrated circuits.
Transition Rate Buffering
Minimizing switching times
Triple Patterning
A multi-patterning technique that will be required at 10nm and below.
Tunnel FET
A type of transistor under development that could replace finFETs in future process technologies.
UL 4600 – Standard for Safety for the Evaluation of Autonomous Products
Standard for safety analysis and evaluation of autonomous vehicles.
Unified Coverage Interoperability Standard (Verification)
The Unified Coverage Interoperability Standard (UCIS) provides an application programming interface (API) that enables the sharing of coverage data across software simulators, hardware accelerators, symbolic simulations, formal tools or custom verification tools.
Unified Power Format (UPF)
Accellera Unified Power Format (UPF)
Universal Chiplet Interconnect Express (UCIe)
Die-to-die interconnect specification.
Universal Verification Methodology (UVM)
Verification methodology
URM
SystemVerilog version of eRM
Utility Patent
Patent to protect an invention
Vera
Hardware Verification Language
Verification IP (VIP)
A pre-packaged set of code used for verification.
Verification Methodologies
A standardized way to verify integrated circuit designs.
Verification Plan
A document that defines what functional verification is going to be performed
Verilog
Hardware Description Language in use since 1984
Verilog Procedural Interface
Procedural access to Verilog objects
Verilog-AMS
Analog extensions to Verilog
VHDL
Hardware Description Language
Virtual Prototype
An abstract model of a hardware system enabling early software execution.
VMM
Verification methodology built by Synopsys
Voice control, speech recognition, voice-user interface (VUI)
Using voice/speech for device command and control.
Volatile Memory
Memory that loses storage abilities when power is removed.
Voltage Islands
Use of multiple voltages for power reduction
Von Neumann Architecture
The basic architecture for most computing today, based on the principle that data needs to move back and forth between a processor and memory.
Wafer Fab Testing
Verifying and testing the dies on the wafer after the manufacturing.
Wafer Inspection
The science of finding defects on a silicon wafer.
Wi-Fi
A brand name for a group of wireless networking protocols and technology,
Wide I/O: memory interface standard for 3D IC
3D memory interface standard
Wirebonding
Creating interconnects between IC and package using a thin wire.
Wired Communications
Wired communication, which passes data through wires between devices, is still considered the most stable form of communication.
Wireless
A way of moving data without wires.
X Architecture
IC interconnect architecture
X Verification
X Propagation causes problems
Yield Management System (YMS)
A data-driven system for monitoring and improving IC yield and reliability.
Zero-Day Vulnerabilities, Attacks
A vulnerability in a product’s hardware or software discovered by researchers or attackers that the producing company does not know about and therefore does not have a fix for yet.
