In this paper, a fifth order curer low-pass filter using as switched-capacitor (SC) architecture is proposed and fabricated with TSMC 0.18 um CMOS process. A fully differential SC is adopted via the bilinear transform of the corresponding analogue RLC passive prototype. To reach the largest possible input dynamic range and save chip area, the method of dynamic range scaling and minimum capacitor scaling is used. Measured results show that the proposed filter achieves a pass-band of 16 MHz with a sampling rate of 150 MHz, a stop-band attenuation greater than 30.7 dB and a power consumption of 92 mW. Including pads, the chip area occupies 1.8816 (1.12 × 1.68) mm² for LTE wireless communication and mobile computing application.