A Memory-Efficient Pattern Matching with Hardware-Based Bit-Split String Matchers for Deep Packet Inspection

HyunJin KIM; Hong-Sik KIM; Jung-Hee LEE; Jin-Ho AHN; Sungho KANG

doi:10.1587/transcom.E93.B.396

IEICE Transactions on Communications

Online ISSN : 1745-1345
Print ISSN : 0916-8516

Regular Section

A Memory-Efficient Pattern Matching with Hardware-Based Bit-Split String Matchers for Deep Packet Inspection

HyunJin KIM, Hong-Sik KIM, Jung-Hee LEE, Jin-Ho AHN, Sungho KANG

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Keywords: computer network security, deep packet inspection, finite state machine, pattern matching, and network monitoring

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2010 Volume E93.B Issue 2 Pages 396-398

DOI https://doi.org/10.1587/transcom.E93.B.396

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Abstract

This paper proposes a hardware-based parallel pattern matching engine using a memory-based bit-split string matcher architecture. The proposed bit-split string matcher separates the transition table from the state table, so that state transitions towards the initial state are not stored. Therefore, total memory requirements can be minimized.

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