Within-die process variation increases with technology scaling in nanometer era. Due to uncorrelated random variations in the threshold voltage (V_th), neighboring transistors in a 6-T SRAM have different V_th and dissipate different subthreshold leakages. Since 3 transistors leak when the cell stores a 1 and the other 3 leak when it stores a 0, total cell leakage depends on its stored value. Using Monte Carlo simulations, we show that this difference averages 46% at a variation of 58% in V_th. This phenomenon can be used to reduce leakage of SRAM-based memories by value control.