Floating-bulk transistors: An alternative design technique for CMOS low-voltage analog circuits

Jesus E. Molinar; Marco A. Gurrola; Ivan R. Padilla; Juan J. Ocampo; Carlos A. Bonilla; Jose M. Amezcua

doi:10.1587/elex.17.20190748

LETTER

Floating-bulk transistors: An alternative design technique for CMOS low-voltage analog circuits

Jesus E. Molinar, Marco A. Gurrola, Ivan R. Padilla, Juan J. Ocampo, Carlos A. Bonilla, Jose M. Amezcua

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Keywords: bulk-driven, floating-gate, quasi floating-gate, CMOS, low-voltage amplifier

JOURNAL FREE ACCESS

2020 Volume 17 Issue 3 Pages 20190748

DOI https://doi.org/10.1587/elex.17.20190748

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Abstract

This letter details a novel floating-bulk transistor technique for low-voltage design. The approach is derived from two previous well-known techniques: bulk-driven and quasi floating-gate. The floating-bulk technique uses an input capacitive coupling through a floating bulk of a PMOS allowing modulation of the drain current. A fabricated common-source amplifier was tested on CMOS 0.5 µm technology and the feasibility of the proposal was demonstrated.

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