A memristor-based convolutional neural network with full parallelization architecture
IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
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A memristor-based convolutional neural network with full parallelization architecture
Sheng-Yang SunZhiwei LiJiwei LiHusheng LiuHaijun LiuQingjiang Li
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2019 Volume 16 Issue 3 Pages 20181034

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Abstract

This paper proposes Full-Parallel Convolutional Neural Networks (FP-CNN) for specific target recognition, which utilize the analog memristive array circuits to carry out the vector-matrix multiplication, and generate multiple output feature maps in one single processing cycle. Compared with ReLU and Tanh function, we adopt the absolute activation function innovatively to reduce the network scale dramatically, which can achieve 99% recognition accuracy rate with only three layers. Furthermore, we propose a performance metrics function to resize the scale of the FP-CNN for solving different classification tasks. With the help of such design guidelines, the FP-CNN can still achieve over 96% recognition accuracy under the condition of 95% yield of memristor crossbar array and 0.5% Single-Pole-Double-Throw switches (SPDT) noise.

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© 2019 by The Institute of Electronics, Information and Communication Engineers
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