Abstract
Novel low phase noise quadrature voltage-controlled oscillator (QVCO) and quadrature injection locked frequency divider (QILFD) with two coupled Hartley VCOs are proposed and implemented using the standard TSMC 0.18μm CMOS 1P6M process. The QVCO employs pMOS as the core to reduce the up-conversion of low-frequency device noise to RF phase noise. It uses super-harmonic coupling technique to couple two differential Hartley VCOs and four small-size coupling transistors to set the directivity of quadrature output phases. At the 1.7V supply voltage, the output phase noise of the QVCO is -124dBc/Hz at 1MHz offset frequency from the carrier frequency of 4.12GHz, and the figure of merit is -185dBc/Hz. At the supply voltage of 1.7V, the total power consumption is 13.1mW. At the supply voltage of 1.5V, the tuning range of the free-running QILFD is from 2.05GHz to 2.36GHz, about 310MHz, and the locking range of the ILFD is from 3.99 to 5.19GHz, about 1.20GHz, at the injection signal power of 0dBm.
