Considering the fault dependency concept with debugging time lag in software reliability growth modeling using a power function of testing time | Machine Intelligence Research
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Considering the fault dependency concept with debugging time lag in software reliability growth modeling using a power function of testing time

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Abstract

Since the early 1970s tremendous growth has been seen in the research of software reliability growth modeling. In general, software reliability growth models (SRGMs) are applicable to the late stages of testing in software development and they can provide useful information about how to improve the reliability of software products. A number of SRGMs have been proposed in the literature to represent time-dependent fault identification / removal phenomenon; still new models are being proposed that could fit a greater number of reliability growth curves. Often, it is assumed that detected faults are immediately corrected when mathematical models are developed. This assumption may not be realistic in practice because the time to remove a detected fault depends on the complexity of the fault, the skill and experience of the personnel, the size of the debugging team, the technique, and so on. Thus, the detected fault need not be immediately removed, and it may lag the fault detection process by a delay effect factor. In this paper, we first review how different software reliability growth models have been developed, where fault detection process is dependent not only on the number of residual fault content but also on the testing time, and see how these models can be reinterpreted as the delayed fault detection model by using a delay effect factor. Based on the power function of the testing time concept, we propose four new SRGMs that assume the presence of two types of faults in the software: leading and dependent faults. Leading faults are those that can be removed upon a failure being observed. However, dependent faults are masked by leading faults and can only be removed after the corresponding leading fault has been removed with a debugging time lag. These models have been tested on real software error data to show its goodness of fit, predictive validity and applicability.

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Correspondence to V. B. Singh.

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V. B. Singh received the M.C.A. degree from M.M.M. Engineering College, Gorakhpur, U.P., India. He is a lecturer in the Department of Computer Science at Delhi College of Arts and Commerce, University of Delhi, Delhi, India. Presently, he is a Ph.D. candidate at the University of Delhi, Delhi. He has published nine research papers.

His research interests include software testing and software reliability engineering.

Kalpana Yadav received the M.Tech. in computer science and engineering from Guru Jambheshwar University, Hissar, India. She is a lecturer in the Department of Computer Science at Indira Gandhi Institute of Technology, Guru Gobind Singh Indraprastha University, Delhi, India. Presently, she is a Ph.D. candidate at Jiwaji University, Gwalior. She has published nine research papers.

Her research interests include software testing and software reliability engineering.

Reecha Kapur is a research scholar at the Department of Mathematics and Computer Application, Bundelkhand University, Jhansi, India. She did her Post Graduation in mathematics from Bundelkhand University, Jhansi, India. She has published three research papers.

Her research interests include imperfect debugging models in software reliability and its effect on software testing cost.

V. S. S. Yadavalli received his Ph.D. degree from the Indian Institute of Technology in 1982. He is a professor of Industrial & Systems Engineering at the University of Pretoria. He has published over 90 research papers on reliability theory, queueing theory, inventory theory, software reliability, manpower planning, econometric modeling in ISI accredited journals like IEEE Transactions on Reliability, Microelectronics and Reliability, Stochastic Analysis and Applications, International Journal of Systems Science, Asia Pacific Journal of Operational Research, Applied Mathematics & Computation, South African Computer Journal, South African Journal of Industrial Engineering, International Journal of Computers & Industrial Engineering, etc. He is in the editorial board of Asia Pacific Journal of Opertional Research, Management Dynamics, South African Journal of Industrial Engineering. He has been recently listed in Marquis Who’ Who (23rd edition).

His research interests include reliability theory, queueing theory, inventory theory, software reliability, manpower planning, and econometric modeling.

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Singh, V.B., Yadav, K., Kapur, R. et al. Considering the fault dependency concept with debugging time lag in software reliability growth modeling using a power function of testing time. Int J Automat Comput 4, 359–368 (2007). https://doi.org/10.1007/s11633-007-0359-y

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  • DOI: https://doi.org/10.1007/s11633-007-0359-y

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