FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time | Journal of Real-Time Image Processing Skip to main content

Advertisement

Springer Nature Link
Log in

FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time

  • Special Issue Paper
  • Published:
Journal of Real-Time Image Processing Aims and scope Submit manuscript

Abstract

In this paper, field programmable gate array (FPGA) implementation of reversible watermarking (RW) algorithm by histogram bin shifting (HBS) that can be used for real-time applications of medical and military images has been presented. As the tolerance level of distortion has to be minimal, RW scheme is necessary here. The reversible mode of the process helps in extracting both the original image and the watermark at the receiver end after undergoing through embedding and decoding procedure. The embedded watermark contains the underlying security information of the host images in case of any infringement. Although software implementations of RW schemes are available, very few attempts have been made for hardware realizations of such schemes. The inherent delay associated with software implementations can be minimized by using an on-chip hardware that performs the watermarking process immediately after capturing the image in real time. In this paper, the embedding and decoding procedures involved in the watermarking scheme are implemented using Xilinx System Generator and carries out a detailed design and analysis of the hardware architectures required for the embedding and extraction processes. The device utilization results for both the embedding and decoding process is low and practically viable. The maximum operating frequency for embedding and extraction processes are 445.330 and 201.824 MHz, respectively, which shows improved performance results over similar existing research work in the literature. The power consumptions for embedding and extraction processes are found to be 1.215 and 0.104 W, respectively. To the best of our knowledge, this is the first FPGA-based hardware implementation of RW by HBS.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Subscribe and save

Springer+ Basic
¥17,985 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Price includes VAT (Japan)

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14
Fig. 15
Fig. 16
Fig. 17
Fig. 18
Fig. 19
Fig. 20
Fig. 21
Fig. 22
Fig. 23
Fig. 24
Fig. 25
Fig. 26
Fig. 27
Fig. 28

Similar content being viewed by others

Abbreviations

BRAM:

Block random access memory

BUFG:

Global buffer

BUFGCTRL:

Global control buffer

BUFGMUX:

Multiplexed global clock buffer

CPU:

Central processing unit

CT:

Computed tomography

DE:

Difference expansion

ECG:

Electrocardiogram

EPR:

Electronic patient record

FF:

Flip flop

FPGA:

Field programmable gate array

HBS:

Histogram bin shifting

IOB:

Input output block

IRI:

Improved rhombus interpolation

LED:

Light emitting diode

LUT:

Look up table

MRI:

Magnetic resonance imaging

MUX:

Multiplexer

NRE:

Non-recurring engineering

PSNR:

Peak signal-to-noise ratio

P-SoC:

Programmable system-on-chip

RAM:

Random access memory

RCM:

Reversible contrast mapping

RIW:

Reversible image watermarking

ROM:

Read only memory

RW:

Reversible watermarking

WCQ:

Wavelet coefficients quantization

References

  1. Feng, J.B., Lin, I.C., Tsai, C.S., Chu, Y.P.: Reversible watermarking: current status and key issues. Int. J. Netw. Secur. 2(3), 161–171 (2006)

    Google Scholar 

  2. Vleeschouwer, C.D., Delaigle, J.E., Macq, B.: Circular interpretation of histogram for reversible watermarking. In: Proceedings of IEEE Fourth Workshop on Multimedia Signal Processing, France, October, pp. 345–350 (2001)

  3. Vleeschouwer, C.D., Delaigle, J.E., Macq, B.: Circular interpretation of bijective transformations in lossless watermarking for media asset management. IEEE Trans. Multimed. 5(1), 97–105 (2003)

    Article  Google Scholar 

  4. Alattar, A.M.: Reversible watermark using the difference expansion of a generalized integer transform. IEEE Trans. Image Process. 13(8), 1147–1156 (2004)

    Article  MathSciNet  Google Scholar 

  5. Luo, L., Chen, Z., Chen, M., Zeng, X., Xiong, Z.: Reversible image watermarking using interpolation technique. IEEE Trans. Inf. Forensics Secur. 5(1), 187–193 (2010)

    Article  Google Scholar 

  6. Tian, J.: Reversible data embedding using a difference expansion. IEEE Trans. Circuits Syst. Video Technol. 13(8), 890–896 (2003)

    Article  Google Scholar 

  7. Ni, Z., Shi, Y.Q., Ansari, N., Su, W.: Reversible data hiding. IEEE Trans. Circuits Syst. Video Technol. 16(3), 354–362 (2006)

    Article  Google Scholar 

  8. Thodi, D.M., Rodriguez, J.J.: Expansion embedding techniques for reversible watermarking. IEEE Trans. Image Process. 16(3), 721–729 (2007)

    Article  MathSciNet  Google Scholar 

  9. Kamstra, L., Heijmans, J.A.M.: Reversible data embedding into images using wavelet techniques and sorting. IEEE Trans. Image Process. 14(12), 2082–2090 (2005)

    Article  MathSciNet  Google Scholar 

  10. Vasiliy, S., Kim, H.J., Nam, J., Suresh, S., Shi, Y.Q.: Reversible watermarking algorithm using sorting and prediction. IEEE Trans. Circuits Syst. Video Technol. 19(7), 989–999 (2009)

    Article  Google Scholar 

  11. Celik, M.U., Sharma, G., Tekalp, A.M., Saber, E.: Lossless generalized-LSB data embedding. IEEE Trans. Image Process. 14(2), 253–266 (2005)

    Article  Google Scholar 

  12. Naskar, R., Chakraborty, R.S.: Reversible image watermarking through coordinate logic operation based prediction. In: Proceedings of Seventh International Conference on Information Systems and Security, India, December, pp. 190–203 (2011)

  13. Naskar, R., Chakraborty, R.S.: Reversible watermarking utilising weighted median-based prediction. IET Image Process. 6(5), 507–520 (2012)

    Article  MathSciNet  Google Scholar 

  14. Honsinger, C.W., Jones, P., Rabbani, M., Stoffel, J.C.: Lossless recovery of an original image containing embedded data. US Patent 6278791 B1 (2001)

  15. Macq, B., Deweyand, F.: Trusted headers for medical images. Presented at the DFG VIII-D II watermarking workshop, Erlangen, Germany (1999)

  16. Lin, Y.H., Jan, I.C., Ko, P.I., Chen, Y.Y., Wong, J.M., Jan, G.J.: A wireless pda-based physiological monitoring system for patient transport. IEEE Trans. Inf Technol. Biomed. 8(4), 439–447 (2004)

    Article  Google Scholar 

  17. Wu, W., Liu, B., Zhang, W.: Reversible data hiding in ECG signals based on histogram shifting and thresholding. In: 2nd International Symposium on Future Information and Communication Technologies for Ubiquitous Healthcare, (2015). doi:10.1109/Ubi HealthTech.2015.7203353

  18. Maglogiannis, I., Kazatzopoulos, L., Delakouridis, K., Hadjiefthymiades, S.: Enabling location privacy and medical data encryption in patient telemonitoring systems. IEEE Trans. Inf Technol. Biomed. 13(6), 946–954 (2009)

    Article  Google Scholar 

  19. Lee, W.B., Lee, C.D.: A cryptographic key management solution for HIPAA privacy/security regulations. IEEE Trans. Inf Technol. Biomed. 12(1), 34–41 (2008)

    Article  Google Scholar 

  20. Joshi, A., Mishra, V., Patrikar, R.M.: Real time implementation of digital watermarking algorithm for image and video application. In: Gupta MD (ed) Watermarking, pp. 65–81. Intech Publishers, Rijeka, Croatia (2012)

    Google Scholar 

  21. Lim, H., Park, S.Y., Cho, W.H.: FPGA implementation of image watermarking algorithm for a digital camera. In: IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, vol. 2, pp.1000–1003 (2003)

  22. Fujiyoshi, M.: A Blind lossless information embedding scheme based on generalized histogram shifting. In: Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, pp. 1–4 (2013). doi:10.1109/APSIPA.2013.6694331

  23. Krishna, S.L.V., Rahim, B.A., Shaik, F., Rajan, K.S.: Lossless embedding using pixel differences and histogram shifting technique. Recent Adv. Space Technol. Serv. Clim. Change 213–216 (2010). doi:10.1109/RSTSCC.2010.5712850

  24. Yadav, A.K., Naskar, R.: A tamper localization approach for reversible watermarking based on histogram bin shifting. In: IEEE Power, Communication and Information Technology Conference, pp. 721–726 (2015). doi:10.1109/PCITC.2015.7438091

  25. Divecha, N.H., Jani, N.N.: Reversible watermarking technique for medical images using fixed point pixel. In: Fifth International Conference on Communication Systems and Network Technologies, pp. 725–730 (2015). doi:10.1109/CSNT.2015.287

  26. Priya, R.L., Belji, T., Sadasivam, V.: Security of health imagery via reversible watermarking based on differential evolution. In: International Conference on Medical Imaging, m-Health and Emerging Communication Systems, pp. 30–34 (2014). doi:10.1109/MedCom.2014.7005570

  27. Kumar, C.V., Natarajan, V., Bhogadi, D.: High capacity reversible data hiding based on histogram shifting for medical images. In: International Conference on Communications and Signal Processing, pp. 730–733 (2013). doi:10.1109/iccsp.2013.6577152

  28. Zavaleta, Z.J.G., Uribe, C.F., Cumplido, R.: A reversible data hiding algorithm for radiological medical images and its hardware implementation. In: International Conference on Reconfigurable Computing and FPGAs, pp. 444–449 (2008). doi:10.1109/ReConFig.2008.34

  29. Ahmed, J., Aziz, A., Akhtar, P.: FPGA based efficient architecture for image watermarking using wavelet co-efficients quantization. In: International Conference on Open Source Systems and Technologies, pp. 105–112 (2014). doi:10.1109/ICOSST.2014.7029329

  30. Ghosh, S., Kundu, B., Datta, D., Maity, S.P., Rahaman, H.: Design and implementation of fast FPGA based architecture for reversible watermarking. In: IEEE International Conference on Electrical Information and Communication Technology, pp. 1–6 (2013). doi:10.1109/EICT.2014.6777819

  31. Maity, H.K., Maity, S.P., Delpha, C.: A modified RCM for reversible watermarking with FPGA implementation. In: 4th European Workshop on Visual Information Processing, pp. 100–105 (2013)

  32. Maity, H.K., Maity, S.P.: FPGA implementation of reversible watermarking in digital images using reversible contrast mapping. Elsevier J. Syst. Softw. 96, 93–104 (2014)

    Article  Google Scholar 

  33. Ghosh, S., Das, N., Das, S., Maity, S.P., Rahaman, H.: FPGA and SoC based VLSI architecture of reversible watermarking using rhombus interpolation by difference expansion. In: 11th IEEE India Conference INDICON, pp. 1–6 (2014). doi:10.1109/INDICON.2014.7030612

  34. Ghosh, S., Das, N., Das, S., Maity, S.P., Rahaman, H.: Digital design and pipelined architecture for reversible watermarking based on difference expansion using FPGA. In: International Conference on Information Technology, pp. 123–128 (2014). doi:10.1109/ICIT.2014.26

Download references

Acknowledgements

This work has been funded by Special Manpower Development Programme-Chips to System Design (SMDP-C2SD), Department of Electronics and Information Technology (DeitY), Ministry of Communication and Information Technology (MCIT), Government of India.

Author information

Authors and Affiliations

  1. School of VLSI Technology, Indian Institute of Engineering Science and Technology, Shibpur, Howrah, 711103, India

    Sambaran Hazra, Sudip Ghosh & Sayandip De

  2. Department of Information Technology, Indian Institute of Engineering Science and Technology, Shibpur, Howrah, 711103, India

    Hafizur Rahaman

Authors
  1. Sambaran Hazra
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Sudip Ghosh
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Sayandip De
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Hafizur Rahaman
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Sudip Ghosh.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Hazra, S., Ghosh, S., De, S. et al. FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time. J Real-Time Image Proc 14, 193–221 (2018). https://doi.org/10.1007/s11554-017-0672-9

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11554-017-0672-9

Keywords

Search

Navigation