In-memory computing based on phase change memory for high energy efficiency | Science China Information Sciences
Skip to main content
Springer Nature Link
Log in

In-memory computing based on phase change memory for high energy efficiency

  • Review
  • Published:
Science China Information Sciences Aims and scope Submit manuscript

Abstract

The energy efficiency issue caused by the memory wall in traditional von Neumann architecture is difficult to reconcile. In-memory computing (CIM) based on emerging nonvolatile memory (NVM) is a promising solution to avoid data movement between storage and processors and realize highly energy-efficient computing. Compared with other NVM technologies, phase change random access memory (PCM) exhibits comprehensive performance for analog computing. In this paper, we review advanced PCM techniques, including phase-change materials, mechanisms, and unique properties, as a foundation and inspiration for implementing CIM architecture. Meanwhile, state-of-the-art PCM-based CIM systems are well discussed for high energy efficiency in artificial neural networks, spiking neural networks, and other artificial intelligence (AI) applications. Finally, we present the remaining challenges and potential solutions of CIM for further investigation.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Subscribe and save

Springer+ Basic
¥17,985 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Price includes VAT (Japan)

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

Explore related subjects

Discover the latest articles, news and stories from top researchers in related subjects.

References

  1. Si X, Tu Y N, Huang W H, et al. A local computing cell and 6T SRAM-based computing-in-memory macro with 8-b MAC operation for edge AI chips. IEEE J Solid-State Circ, 2021, 56: 2817–2831

    Article  Google Scholar 

  2. Niu D, Li S, Wang Y, et al. 184QPS/W 64Mb/mm2 3D logic-to-DRAM hybrid bonding with process-near-memory engine for recommendation system. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2022

  3. Wulf W A, McKee S A. Hitting the memory wall. SIGARCH Comput Archit News, 1995, 23: 20–24

    Article  Google Scholar 

  4. Wang J, Wang X, Eckert C, et al. A 28-nm compute SRAM with bit-serial logic/arithmetic operations for programmable in-memory vector computing. IEEE J Solid-State Circ, 2019, 55: 76–86

    Article  Google Scholar 

  5. Ielmini D, Wong H S P. In-memory computing with resistive switching devices. Nat Electron, 2018, 1: 333–343

    Article  Google Scholar 

  6. Chen Z, Yu Z, Jin Q, et al. CAP-RAM: a charge-domain in-memory computing 6T-SRAM for accurate and precision-programmable CNN inference. IEEE J Solid-State Circ, 2021, 56: 1924–1935

    Article  Google Scholar 

  7. Sebastian A, Le Gallo M, Khaddam-Aljameh R, et al. Memory devices and applications for in-memory computing. Nat Nanotechnol, 2020, 15: 529–544

    Article  Google Scholar 

  8. Cheng C, Tiw P J, Cai Y, et al. In-memory computing with emerging nonvolatile memory devices. Sci China Inf Sci, 2021, 64: 221402

    Article  Google Scholar 

  9. Ankit A, Chakraborty I, Agrawal A, et al. Circuits and architectures for in-memory computing-based machine learning accelerators. IEEE Micro, 2020, 40: 8–22

    Article  Google Scholar 

  10. Antolini A, Lico A, Scarselli E F, et al. An embedded PCM peripheral unit adding analog MAC in-memory computing feature addressing non-linearity and time drift compensation. In: Proceedings of the 48th European Solid State Circuits Conference (ESSCIRC), 2022. 109–112

  11. Si X, Chen J J, Tu Y N, et al. A twin-8T SRAM computation-in-memory macro for multiple-bit CNN-based machine learning In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2019. 396–398

  12. Si X, Tu Y N, Huang W H, et al. A 28nm 64Kb 6T SRAM computing-in-memory macro with 8b MAC operation for AI edge chips. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2020. 246–248

  13. Yan B, Hsu J L, Yu P C, et al. A 1.041-Mb/mm 2 27.38-TOPS/W signed-INT8 dynamic-logic-based ADC-less SRAM compute-in-memory macro in 28nm with reconfigurable bitwise operation for AI and embedded applications. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2022

  14. Lin Z, Zhan H, Chen Z, et al. Cascade current mirror to improve linearity and consistency in SRAM in-memory computing. IEEE J Solid-State Circ, 2021, 56: 2550–2562

    Article  Google Scholar 

  15. Xie S, Ni C, Sayal A, et al. eDRAM-CIM: compute-in-memory design with reconfigurable embedded-dynamic-memory array realizing adaptive data converters and charge-domain computing. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2021

  16. Xie S, Ni C, Jain P, et al. Gain-cell CIM: leakage and bitline swing aware 2T1C gain-cell eDRAM compute in memory design with bitline precharge DACs and compact Schmitt trigger ADCs. In: Proceedings of IEEE Symposium on VLSI Technology and Circuits, 2022. 112–113

  17. Biswas A, Chandrakasan A P. Conv-RAM: an energy-efficient SRAM with embedded convolution computation for low-power CNN-based machine learning applications. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2018. 488–490

  18. Lin Z, Zhu Z, Zhan H, et al. Two-direction in-memory computing based on 10T SRAM with horizontal and vertical decoupled read ports. IEEE J Solid-State Circ, 2021, 56: 2832–2844

    Article  Google Scholar 

  19. Chen Z, Chen X, Gu J. A 65nm 3T dynamic analog RAM-based computing-in-memory macro and CNN accelerator with retention enhancement, adaptive analog sparsity and 44TOPS/W system energy efficiency. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2021

  20. Chua L. Memristor — the missing circuit element. IEEE Trans Circ Theor, 1971, 18: 507–519

    Article  Google Scholar 

  21. Strukov D B, Snider G S, Stewart D R, et al. The missing memristor found. Nature, 2008, 453: 80–83

    Article  Google Scholar 

  22. Ovshinsky S R. Reversible electrical switching phenomena in disordered structures. Phys Rev Lett, 1968, 21: 1450–1453

    Article  Google Scholar 

  23. Scott J F, Paz de Araujo C A. Ferroelectric memories. Science, 1989, 246: 1400–1405

    Article  Google Scholar 

  24. Parkin S S P, Hayashi M, Thomas L. Magnetic domain-wall racetrack memory. Science, 2008, 320: 190–194

    Article  Google Scholar 

  25. Liu Q, Gao B, Yao P, et al. A fully integrated analog ReRAM based 78.4 TOPS/W compute-in-memory chip with fully parallel MAC computing. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2020. 500–502

  26. Xue C X, Hung J M, Kao H Y, et al. A 22nm 4Mb 8b-precision ReRAM computing-in-memory macro with 11.91 to 195.7 TOPS/W for tiny AI edge devices. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2021

  27. Hung J M, Huang Y H, Huang S P, et al. An 8-Mb DC-current-free binary-to-8b precision ReRAM nonvolatile computingin-memory macro using time-space-readout with 1286.4–21.6 TOPS/W for edge-AI devices. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2022

  28. Ambrogio S, Narayanan P, Tsai H, et al. Equivalent-accuracy accelerated neural-network training using analogue memory. Nature, 2018, 558: 60–67

    Article  Google Scholar 

  29. Yao P, Wu H, Gao B, et al. Fully hardware-implemented memristor convolutional neural network. Nature, 2020, 577: 641–646

    Article  Google Scholar 

  30. Luo J, Xu W, Du Y, et al. Energy-and area-efficient Fe-FinFET-based time-domain mixed-signal computing in memory for edge machine learning. In: Proceedings of IEEE International Electron Devices Meeting, 2021

  31. Doevenspeck J, Garello K, Verhoef B, et al. SOT-MRAM based analog in-memory computing for DNN inference. In: Proceedings of IEEE Symposium on VLSI Technology, 2020. 1–2

  32. Khan A I, Daus A, Islam R, et al. Ultralow-switching current density multilevel phase-change memory on a flexible substrate. Science, 2021, 373: 1243–1247

    Article  Google Scholar 

  33. Qureshi M K, Karidis J, Franceschini M, et al. Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling. In: Proceedings of IEEE/ACM International Symposium on Microarchitecture, 2009. 14–23

  34. Fazio A. Advanced technology and systems of cross point memory. In: Proceedings of IEEE International Electron Devices Meeting, 2020

  35. Giusca C E, Stolojan V, Sloan J, et al. Confined crystals of the smallest phase-change material. Nano Lett, 2013, 13: 4020–4027

    Article  Google Scholar 

  36. Lanza M, Sebastian A, Lu W D, et al. Memristive technologies for data storage, computation, encryption, and radio-frequency communication. Science, 2022, 376: eabj9979

    Article  Google Scholar 

  37. Bertolazzi S. MRAM Technology and Market Trends. Flash Memory Summit, 2019

  38. Mannocci P, Farronato M, Lepri N, et al. In-memory computing with emerging memory devices: status and outlook. APL Machine Learn, 2023, 1: 010902

    Article  Google Scholar 

  39. Li X, Chen H, Xie C, et al. Enhancing the performance of phase change memory for embedded applications. Phys Rapid Res Ltrs, 2019, 13: 1800558

    Article  Google Scholar 

  40. Wang Q, Niu G, Ren W, et al. Phase change random access memory for neuro-inspired computing. Adv Elect Mater, 2021, 7: 2001241

    Article  Google Scholar 

  41. Kursawe K, Sadeghi A R, Schellekens D, et al. Reconfigurable physical unclonable functions-enabling technology for tamper-resistant storage. In: Proceedings of IEEE International Workshop on Hardware-Oriented Security and Trust, 2009. 22–29

  42. Zhang L, Kong Z H, Chang C H. PCKGen: a phase change memory based cryptographic key generator. In: Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), 2013. 1444–1447

  43. Zhang Q, Chen H, Lu Y, et al. Design and security evaluation of PCM-based rPUF using cyclic refreshing strategy. IEICE Electron Express, 2018, 15: 20180239

    Article  Google Scholar 

  44. Ovshinsky S R. Symmetrical Current Controlling Device. U.S. Patent, US3271591A, 1966-09-06

  45. Neale R G, Nelson D L, Moore G E. Nonvolatile and reprogrammable, the read-mostly memory is here. Electronics, 1970, 43: 56–60

    Google Scholar 

  46. Yamada N, Ohno E, Nishiuchi K, et al. Rapid-phase transitions of GeTe-Sb2Te3 pseudobinary amorphous thin films for an optical disk memory. J Appl Phys, 1991, 69: 2849–2856

    Article  Google Scholar 

  47. Ovshinsky S R, Hudgens S J, Czubatyj W, et al. Electrically Erasable Phase Change Memory. U.S. Patent, 5166758, 1992-11-24

  48. Wicker G C. A comprehensive model of submicron chalcogenide switching devices. Dissertation for Ph.D. Degree. Detroit: Wayne State University, 1996

    Google Scholar 

  49. Yamada N, Ohno E, Akahira N, et al. High speed overwritable phase change optical disk material. Jpn J Appl Phys, 1987, 26: 61

    Article  Google Scholar 

  50. Krbal M, Kolobov A V, Fons P, et al. Crystalline GeTe-based phase-change alloys: disorder in order. Phys Rev B, 2012, 86: 045212

    Article  Google Scholar 

  51. Choi Y, Song I, Park M H, et al. A 20nm 1.8V 8Gb PRAM with 40MB/s program bandwidth. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2012. 46–48

  52. Chen Y C, Rettner C T, Raoux S, et al. Ultra-thin phase-change bridge memory device using GeSb. In: Proceedings of IEEE International Electron Devices Meeting, 2006. 1–4

  53. Kau D C, Tang S, Karpov I V, et al. A stackable cross point phase change memory. In: Proceedings of IEEE International Electron Devices Meeting, 2009. 1–4

  54. Chien W C, Gignac L M, Gong N, et al. Solution for PCM and OTS intermixing on cross-point phase change memory. In: Proceedings of International Memory Workshop (IMW), 2019. 1–4

  55. Song Z T, Cai D L, Li X, et al. High endurance phase change memory chip implemented based on carbon-doped Ge2Sb2Te5 in 40 nm node for embedded application. In: Proceedings of IEEE International Electron Devices Meeting, 2018

  56. Song Z T, Wu L C, Rao F, et al. Study of phase change materials for phase change random access memory. Sci Sin-Phys Mech Astron, 2016, 46: 107309

    Article  Google Scholar 

  57. Wuttig M, Yamada N. Phase-change materials for rewriteable data storage. Nat Mater, 2007, 6: 824–832

    Article  Google Scholar 

  58. Yoon S M, Lee N Y, Ryu S O, et al. Sb-Se-based phase-change memory device with lower power and higher speed operations. IEEE Electron Dev Lett, 2006, 27: 445–447

    Article  Google Scholar 

  59. Lankhorst M H R, Ketelaars B W S M M, Wolters R A M. Low-cost and nanoscale non-volatile memory concept for future silicon chips. Nat Mater, 2005, 4: 347–352

    Article  Google Scholar 

  60. Perniola L, Sousa V, Fantini A, et al. Electrical behavior of phase-change memory cells based on GeTe. IEEE Electron Dev Lett, 2010, 31: 488–490

    Article  Google Scholar 

  61. Zhu M, Wu L, Rao F, et al. N-doped Sb2Te phase change materials for higher data retention. J Alloys Compd, 2011, 509: 10105–10109

    Article  Google Scholar 

  62. Friedrich I, Weidenhof V, Njoroge W, et al. Structural transformations of Ge2Sb2Te5 films studied by electrical resistance measurements. J Appl Phys, 2000, 87: 4130–4134

    Article  Google Scholar 

  63. Kato T, Tanaka K. Electronic properties of amorphous and crystalline Ge2Sb2Te5 films. Jpn J Appl Phys, 2005, 44: 7340

    Article  Google Scholar 

  64. Simpson R E, Krbal M, Fons P, et al. Toward the ultimate limit of phase change in Ge2Sb2Te5. Nano Lett, 2010, 10: 414–419

    Article  Google Scholar 

  65. Konstantinou K, Mocanu F C, Lee T H, et al. Revealing the intrinsic nature of the mid-gap defects in amorphous Ge2Sb2Te5. Nat Commun, 2019, 10: 1

    Article  Google Scholar 

  66. Peng C, Wu L, Song Z, et al. Performance improvement of Sb2Te3 phase change material by Al doping. Appl Surf Sci, 2011, 257: 10667–10670

    Article  Google Scholar 

  67. Peng C, Song Z, Rao F, et al. Al1.3Sb3Te material for phase change memory application. Appl Phys Lett, 2011, 99: 043105

    Article  Google Scholar 

  68. Xia M, Zhu M, Wang Y, et al. Ti-Sb-Te alloy: a candidate for fast and long-life phase-change memory. ACS Appl Mater Interface, 2015, 7: 7627–7634

    Article  Google Scholar 

  69. Zhu M, Wu L, Rao F, et al. Uniform Ti-doped Sb2Te3 materials for high-speed phase change memory applications. Appl Phys Lett, 2014, 104: 053119

    Article  Google Scholar 

  70. Zhu M, Xia M, Rao F, et al. One order of magnitude faster phase change at reduced power in Ti-Sb-Te. Nat Commun, 2014, 5: 4086

    Article  Google Scholar 

  71. Rao F, Song Z, Cheng Y, et al. Direct observation of titanium-centered octahedra in titanium-antimony-tellurium phase-change material. Nat Commun, 2015, 6: 10040

    Article  Google Scholar 

  72. Rao F, Ding K, Zhou Y, et al. Reducing the stochasticity of crystal nucleation to enable subnanosecond memory writing. Science, 2017, 358: 1423–1427

    Article  Google Scholar 

  73. Jung M C, Lee Y M, Kim H D, et al. Ge nitride formation in N-doped amorphous Ge2Sb2Te5. Appl Phys Lett, 2007, 91: 083514

    Article  Google Scholar 

  74. Privitera S, Rimini E, Zonca R. Amorphous-to-crystal transition of nitrogen- and oxygen-doped Ge2Sb2Te5 films studied by in situ resistance measurements. Appl Phys Lett, 2004, 85: 3044–3046

    Article  Google Scholar 

  75. Song K H, Kim S W, Seo J H, et al. Characteristics of amorphous Ag0.1(Ge2Sb2Te5)0.9 thin film and its ultrafast crystallization. J Appl Phys, 2008, 104: 103516

    Article  Google Scholar 

  76. Feng J, Zhang Y, Qiao B W, et al. Si doping in Ge2Sb2Te5 film to reduce the writing current of phase change memory. Appl Phys A, 2007, 87: 57–62

    Article  Google Scholar 

  77. Ghezzi G E, Raty J Y, Maitrejean S, et al. Effect of carbon doping on the structure of amorphous GeTe phase change material. Appl Phys Lett, 2011, 99: 151906

    Article  Google Scholar 

  78. Borisenko K B, Chen Y, Cockayne D J H, et al. Understanding atomic structures of amorphous C-doped Ge2Sb2Te5 phase-change memory materials. Acta Mater, 2011, 59: 4335–4342

    Article  Google Scholar 

  79. Zhou X, Wu L, Song Z, et al. Carbon-doped Ge2Sb2Te5 phase change material: a candidate for high-density phase change memory application. Appl Phys Lett, 2012, 101: 142104

    Article  Google Scholar 

  80. Chien W C, Cheng H Y, BrightSky M, et al. Reliability study of a 128Mb phase change memory chip implemented with doped Ga-Sb-Ge with extraordinary thermal stability. In: Proceedings of IEEE International Electron Devices Meeting, 2016

  81. Sun Z, Zhou J, Ahuja R. Structure of phase change materials for data storage. Phys Rev Lett, 2006, 96: 055507

    Article  Google Scholar 

  82. Kolobov A V, Fons P, Frenkel A I, et al. Understanding the phase-change mechanism of rewritable optical media. Nat Mater, 2004, 3: 703–708

    Article  Google Scholar 

  83. Krbal M, Kolobov A V, Fons P, et al. Intrinsic complexity of the melt-quenched amorphous Ge2Sb2Te5 memory alloy. Phys Rev B, 2011, 83: 054203

    Article  Google Scholar 

  84. Shportko K, Kremers S, Woda M, et al. Resonant bonding in crystalline phase-change materials. Nat Mater, 2008, 7: 653–658

    Article  Google Scholar 

  85. Lencer D, Salinga M, Grabowski B, et al. A map for phase-change materials. Nat Mater, 2008, 7: 972–977

    Article  Google Scholar 

  86. Li X B, Liu X Q, Liu X, et al. Role of electronic excitation in the amorphization of Ge-Sb-Te alloys. Phys Rev Lett, 2011, 107: 015501

    Article  Google Scholar 

  87. Cho E, Youn Y, Han S. Enhanced amorphous stability of carbon-doped Ge2Sb2Te5: ab initio investigation. Appl Phys Lett, 2011, 99: 183501

    Article  Google Scholar 

  88. Zhou X, Xia M, Rao F, et al. Understanding phase-change behaviors of carbon-doped Ge2Sb2Te5 for phase-change memory application. ACS Appl Mater Interface, 2014, 6: 14207–14214

    Article  Google Scholar 

  89. Li T, Shen J, Wu L, et al. Atomic-scale observation of carbon distribution in high-performance carbon-doped Ge2Sb2Te5 and its influence on crystallization behavior. J Phys Chem C, 2019, 123: 13377–13384

    Article  Google Scholar 

  90. Cheng Y, Cai D, Zheng Y, et al. Microscopic mechanism of carbon-dopant manipulating device performance in CGeSbTe-based phase change random access memory. ACS Appl Mater Interface, 2020, 12: 23051–23059

    Article  Google Scholar 

  91. Sebastian A, Le Gallo M, Krebs D. Crystal growth within a phase change memory cell. Nat Commun, 2014, 5: 1–9

    Article  Google Scholar 

  92. Bedeschi F, Fackenthal R, Resta C, et al. A bipolar-selected phase change memory featuring multi-level cell storage. IEEE J Solid-State Circ, 2008, 44: 217–227

    Article  Google Scholar 

  93. Liu Y G, Chen Y F, Cai D L, et al. High performance of multilevel-cell phase change memory device with good endurance reliability. Semicond Sci Technol, 2019, 34: 105019

    Article  Google Scholar 

  94. Song Z, Cai D, Cheng Y, et al. 12-state multi-level cell storage implemented in a 128 Mb phase change memory chip. Nanoscale, 2021, 13: 10455–10461

    Article  Google Scholar 

  95. Wan T Q, Ma S J, Liao F Y, et al. Neuromorphic sensory computing. Sci China Inf Sci, 2022, 65: 141401

    Article  Google Scholar 

  96. Tuma T, Pantazi A, Le Gallo M, et al. Stochastic phase-change neurons. Nat Nanotech, 2016, 11: 693–699

    Article  Google Scholar 

  97. Kuzum D, Jeyasingh R G D, Lee B, et al. Nanoelectronic programmable synapses based on phase change materials for brain-inspired computing. Nano Lett, 2012, 12: 2179–2186

    Article  Google Scholar 

  98. Suri M, Bichler O, Querlioz D, et al. Phase change memory as synapse for ultra-dense neuromorphic systems: application to complex visual pattern extraction. In: Proceedings of IEEE International Electron Devices Meeting, 2011

  99. Burr G W, Shelby R M, Sidler S, et al. Experimental demonstration and tolerancing of a large-scale neural network (165000 synapses) using phase-change memory as the synaptic weight element. IEEE Trans Electron Dev, 2015, 62: 3498–3507

    Article  Google Scholar 

  100. Lu Y, Li X, Yan L, et al. Accelerated local training of CNNs by optimized direct feedback alignment based on stochasticity of 4 Mb C-doped Ge2Sb2Te5 PCM chip in 40 nm node. In: Proceedings of IEEE International Electron Devices Meeting, 2020

  101. Ielmini D, Lavizzari S, Sharma D, et al. Physical interpretation, modeling and impact on phase change memory (PCM) reliability of resistance drift due to chalcogenide structural relaxation. In: Proceedings of IEEE International Electron Devices Meeting, 2007. 939–942

  102. Liu B, Li K, Liu W, et al. Multi-level phase-change memory with ultralow power consumption and resistance drift. Sci Bull, 2021, 66: 2217–2224

    Article  Google Scholar 

  103. Liu Y G, Chen Y F, Cai D L, et al. Fast switching and low drift of TiSbTe thin films for phase change memory applications. Mater Sci Semiconductor Process, 2019, 91: 399–403

    Article  Google Scholar 

  104. Lv Y, Wang Q, Chen H, et al. Enhancing the data reliability of multilevel storage in phase change memory with 2T2R cell structure. Micromachines, 2021, 12: 1085

    Article  Google Scholar 

  105. Chen C, Li X, Xie C, et al. Read optimization enables ultralow resistance drift for phase change memory. IEEE Trans Electron Dev, 2022, 69: 5536–5541

    Article  Google Scholar 

  106. Merolla P A, Arthur J V, Alvarez-Icaza R, et al. A million spiking-neuron integrated circuit with a scalable communication network and interface. Science, 2014, 345: 668–673

    Article  Google Scholar 

  107. Schmitt S, Klähn J, Bellec G, et al. Neuromorphic hardware in the loop: training a deep spiking network on the brainscales wafer-scale system. In: Proceedings of International Joint Conference on Neural Networks (IJCNN), 2017. 2227–2234

  108. Shafiee A, Nag A, Muralimanohar N, et al. ISAAC: a convolutional neural network accelerator with in-situ analog arithmetic in crossbars. SIGARCH Comput Archit News, 2016, 44: 14–26

    Article  Google Scholar 

  109. Chi P, Li S, Xu C, et al. PRIME: a novel processing-in-memory architecture for neural network computation in RERAM-based main memory. SIGARCH Comput Archit News, 2016, 44: 27–39

    Article  Google Scholar 

  110. Abiodun O I, Jantan A, Omolara A E, et al. State-of-the-art in artificial neural network applications: a survey. Heliyon, 2018, 4: e00938

    Article  Google Scholar 

  111. Xue C X, Huang T Y, Liu J S, et al. A 22nm 2Mb ReRAM compute-in-memory macro with 121-28TOPS/W for multibit MAC computing for tiny AI edge devices. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2020. 244–246

  112. Spetalnick S D, Chang M, Crafton B, et al. A 40nm 64kb 26.56TOPS/W 2.37Mb/mm2 RRAM binary/compute-in-memory macro with 4.23x improvement in density and >75% use of sensing dynamic range. In: Proceedings of International Solid-State Circuits Conference (ISSCC), 2022

  113. Burr G W, Kurdi B N, Scott J C, et al. Overview of candidate device technologies for storage-class memory. IBM J Res Dev, 2008, 52: 449–464

    Article  Google Scholar 

  114. Papandreou N, Pozidis H, Pantazi A, et al. Programming algorithms for multilevel phase-change memory. In: Proceedings of IEEE International Symposium of Circuits and Systems (ISCAS), 2011. 329–332

  115. Burr G W, Shelby R M, Nolfo C, et al. Experimental demonstration and tolerancing of a large-scale neural network (165000 synapses), using phase-change memory as the synaptic weight element. In: Proceedings of IEEE International Electron Devices Meeting, 2014

  116. Deng L. The MNIST database of handwritten digit images for machine learning research [best of the web]. IEEE Signal Process Mag, 2012, 29: 141–142

    Article  Google Scholar 

  117. Tsai H, Ambrogio S, Narayanan P, et al. Recent progress in analog memory-based accelerators for deep learning. J Phys D-Appl Phys, 2018, 51: 283001

    Article  Google Scholar 

  118. Chang H Y, Narayanan P, Lewis S C, et al. AI hardware acceleration with analog memory: microarchitectures for low energy at high speed. IBM J Res Dev, 2019, 63: 1–14

    Article  Google Scholar 

  119. Spoon K, Ambrogio S, Narayanan P, et al. Accelerating deep neural networks with analog memory devices. In: Proceedings of IEEE International Memory Workshop (IMW), 2020. 1–4

  120. Hosokawa K, Narayanan P, Ambrogio S, et al. Circuit techniques for efficient acceleration of deep neural network inference with analog-AI. In: Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), 2021. 1–5

  121. Khaddam-Aljameh R, Stanisavljevic M, Mas J F, et al. HERMES core — a 14nm CMOS and PCM-based in-memory compute core using an array of 300ps/LSB linearized CCO-based ADCs and local digital processing. In: Proceedings of Symposium on VLSI Circuits, 2021. 1–2

  122. Khaddam-Aljameh R, Stanisavljevic M, Fornt Mas J, et al. HERMES-core-a 1.59-TOPS/mm2 PCM on 14-nm CMOS in-memory compute core using 300-ps/LSB linearized CCO-based ADCs. IEEE J Solid-State Circ, 2022, 57: 1027–1038

    Article  Google Scholar 

  123. Lillicrap T P, Cownden D, Tweed D B, et al. Random synaptic feedback weights support error backpropagation for deep learning. Nat Commun, 2016, 7: 1

    Article  Google Scholar 

  124. Nøkland A. Direct feedback alignment provides learning in deep neural networks. In: Proceedings of the 30th International Conference on Neural Information Processing Systems, 2016

  125. Han D, Yoo H. Efficient convolutional neural network training with direct feedback alignment. 2019. ArXiv:1901.01986

  126. Yan L, Li X, Zhu Y, et al. Uncertainty quantification based on multilevel conductance and stochasticity of heater size dependent C-doped Ge2Sb2Te5 PCM chip. In: Proceedings of IEEE International Electron Devices Meeting, 2021

  127. Hung J M, Wen T H, Huang Y H, et al. 8-b precision 8-Mb ReRAM compute-in-memory macro using direct-current-free time-domain readout scheme for AI edge devices. IEEE J Solid-State Circ, 2023, 58: 303–315

    Article  Google Scholar 

  128. Khwa W S, Chiu Y C, Jhang C J, et al. A 40-nm, 2M-cell, 8b-precision, hybrid SLC-MLC PCM computing-in-memory macro with 20.5–65.0 TOPS/W for tiny-Al edge devices. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2022

  129. Rajendran B, Sebastian A, Schmuker M, et al. Low-power neuromorphic hardware for signal processing applications: a review of architectural and system-level design approaches. IEEE Signal Process Mag, 2019, 36: 97–110

    Article  Google Scholar 

  130. Tavanaei A, Ghodrati M, Kheradpisheh S R, et al. Deep learning in spiking neural networks. Neural Netw, 2019, 111: 47–63

    Article  Google Scholar 

  131. Davies M, Srinivasa N, Lin T H, et al. Loihi: a neuromorphic manycore processor with on-chip learning. IEEE Micro, 2018, 38: 82–99

    Article  Google Scholar 

  132. Ren K, Li R, Chen X, et al. Controllable SET process in O-Ti-Sb-Te based phase change memory for synaptic application. Appl Phys Lett, 2018, 112: 073106

    Article  Google Scholar 

  133. Jackson B L, Rajendran B, Corrado G S, et al. Nanoscale electronic synapses using phase change devices. J Emerg Technol Comput Syst, 2013, 9: 1–20

    Article  Google Scholar 

  134. Bichler O, Suri M, Querlioz D, et al. Visual pattern extraction using energy-efficient “2-PCM synapse” neuromorphic architecture. IEEE Trans Electron Dev, 2012, 59: 2206–2214

    Article  Google Scholar 

  135. Dan Y, Poo M. Spike timing-dependent plasticity of neural circuits. Neuron, 2004, 44: 23–30

    Article  Google Scholar 

  136. Kim S, Ishii M, Lewis S, et al. NVM neuromorphic core with 64k-cell (256-by-256) phase change memory synaptic array with on-chip neuron circuits for continuous in-situ learning. In: Proceedings of IEEE International Electron Devices Meeting, 2015

  137. Nandakumar S R, Boybat I, Le Gallo M, et al. Experimental demonstration of supervised learning in spiking neural networks with phase-change memory synapses. Sci Rep, 2020, 10: 1

    Article  Google Scholar 

  138. Anwani N, Rajendran B. Normad-normalized approximate descent based supervised learning rule for spiking neurons. In: Proceedings of International Joint Conference on Neural Networks (IJCNN), 2015. 1–8

  139. Bohnstingl T, Surina A, Fabre M, et al. Biologically-inspired training of spiking recurrent neural networks with neuromorphic hardware. In: Proceedings of the 4th International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2022. 218–221

  140. Dellaferrera G, Woźniak S, Indiveri G, et al. Introducing principles of synaptic integration in the optimization of deep neural networks. Nat Commun, 2022, 13: 1–4

    Article  Google Scholar 

  141. Woźniak S, Pantazi A, Bohnstingl T, et al. Deep learning incorporating biologically inspired neural dynamics and in-memory computing. Nat Mach Intell, 2020, 2: 325–336

    Article  Google Scholar 

  142. Cao Y, Chen Y, Khosla D. Spiking deep convolutional neural networks for energy-efficient object recognition. Int J Comput Vis, 2015, 113: 54–66

    Article  MathSciNet  Google Scholar 

  143. Diehl P U, Neil D, Binas J, et al. Fast-classifying, high-accuracy spiking deep networks through weight and threshold balancing. In: Proceedings of International Joint Conference on Neural Networks (IJCNN), 2015. 1–8

  144. Midya R, Wang Z, Asapu S, et al. Artificial neural network (ANN) to spiking neural network (SNN) converters based on diffusive memristors. Adv Elect Mater, 2019, 5: 1900060

    Article  Google Scholar 

  145. Huang J, Serb A, Stathopoulos S, et al. Text classification in memristor-based spiking neural networks. 2022. ArXiv:2207.13729

  146. Lee J H, Delbruck T, Pfeiffer M. Training deep spiking neural networks using backpropagation. Front Neurosci, 2016, 10

  147. Tavanaei A, Maida A. BP-STDP: approximating backpropagation using spike timing dependent plasticity. Neurocomputing, 2019, 330: 39–47

    Article  Google Scholar 

  148. Jia Z, Ji J, Zhou X, et al. Hybrid spiking neural network for sleep electroencephalogram signals. Sci China Inf Sci, 2022, 65: 140403

    Article  MathSciNet  Google Scholar 

  149. Lu Y, Li X, Yan B, et al. In-memory realization of eligibility traces based on conductance drift of phase change memory for energy-efficient reinforcement learning. Adv Mater, 2022, 34: 2107811

    Article  Google Scholar 

Download references

Acknowledgements

This work was supported by National Natural Science Foundation of China (Grant Nos. 92164302, 91964204), Strategic Priority Research Program of the Chinese Academy of Sciences (Grant No. XDB44010200), Science and Technology Council of Shanghai (Grant Nos. 22DZ2229009, 23XD1404700), National Key R&D Program of China (Grant No. 2022ZD0117602), and China Postdoctoral Science Foundation (Grant No. 2023TQ0363).

Author information

Authors and Affiliations

  1. National Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Micro-System and Information Technology, Chinese Academy of Sciences, Shanghai, 200050, China

    Luchang He, Xi Li, Chenchen Xie & Zhitang Song

  2. School of Microelectronics, University of Science and Technology of China, Hefei, 230026, China

    Luchang He

Authors
  1. Luchang He
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Xi Li
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Chenchen Xie
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Zhitang Song
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding authors

Correspondence to Xi Li or Zhitang Song.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

He, L., Li, X., Xie, C. et al. In-memory computing based on phase change memory for high energy efficiency. Sci. China Inf. Sci. 66, 200402 (2023). https://doi.org/10.1007/s11432-023-3789-7

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • DOI: https://doi.org/10.1007/s11432-023-3789-7

Keywords

Search

Navigation