Abstract
We consider the energy saving problem for caches on a multi-core processor. In the previous research on low power processors, there are various methods to reduce power dissipation. Tag reduction is one of them. This paper extends the tag reduction technique on a single-core processor to a multi-core processor and investigates the potential of energy saving for multi-core processors. We formulate our approach as an equivalent problem which is to find an assignment of the whole instruction pages in the physical memory to a set of cores such that the tag-reduction conflicts for each core can be mostly avoided or reduced. We then propose three algorithms using different heuristics for this assignment problem. We provide convincing experimental results by collecting experimental data from a real operating system instead of the traditional way using a processor simulator that cannot simulate operating system functions and the full memory hierarchy. Experimental results show that our proposed algorithms can save total energy up to 83.93% on an 8-core processor and 76.16% on a 4-core processor in average compared to the one that the tag-reduction is not used for. They also significantly outperform the tag reduction based algorithm on a single-core processor.
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This work was supported by the National Basic Research 973 Program of China under Grant No. 2007CB310900, the National Natural Science Foundation of China under Grant No. 60725208, and Fellowships of the Japan Society for the Promotion of Science for Young Scientists Program.
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Zheng, L., Dong, MX., Ota, K. et al. Energy Efficiency of a Multi-Core Processor by Tag Reduction. J. Comput. Sci. Technol. 26, 491–503 (2011). https://doi.org/10.1007/s11390-011-1149-0
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DOI: https://doi.org/10.1007/s11390-011-1149-0