Abstract
We present Bus Switching Activity Analyser (BSAA), a switching activity analysis and visualisation tool for SoC power optimisation. BSAA reads switching metrics from RTL simulation, reporting the most active buses and hierarchies. Buses with typical address and data bus traffic are identified automatically. The tool can process multiple simulation runs simultaneously, analysing how switching varies with input data or software code. BSAA complements commercial tools, helping the designer find opportunities to apply power-saving techniques. To illustrate BSAA’s powerful features, we analyse switching in an MP3 decoder design using several audio inputs and in a microcontroller running a suite of software tasks. We demonstrate the tool’s usefulness by applying it in the power optimisation of a small MPSoC, obtaining on average a 60% reduction in dynamic power across five software tasks and identifying opportunities to reduce static power.
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English, T., Lok Man, K., Popovici, E. (2010). BSAA: A Switching Activity Analysis and Visualisation Tool for SoC Power Optimisation. In: Monteiro, J., van Leuken, R. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2009. Lecture Notes in Computer Science, vol 5953. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-11802-9_26
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DOI: https://doi.org/10.1007/978-3-642-11802-9_26
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-11801-2
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