Abstract
This paper proposes to use a non conventional mode of operation to meet low voltage constraints: The moderate inversion. EKV 2.0 MOS model provides hand calculation applicable equations, while a BSIM3v3 simulation model is sufficiently accurate to design static circuits.
The self cascode structure studied with highlights of the EKV 2.0 MOS model is revealed to be linear with temperature from weak to strong inversion: simulation and experimental data are provided.
This self cascode linear with temperature voltage reference is the starting point of a new self biased current reference: An all in moderate inversion exemple is given, and simulation results are provided.
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Guigues, F., Kussener, E., Duval, B., Barthelemy, H. (2007). Moderate Inversion: Highlights for Low Voltage Design. In: Azémard, N., Svensson, L. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2007. Lecture Notes in Computer Science, vol 4644. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-74442-9_40
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DOI: https://doi.org/10.1007/978-3-540-74442-9_40
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-74441-2
Online ISBN: 978-3-540-74442-9
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