Abstract
This paper presents an improved Xilinx XC6200 FPGA using IBM SiGe BiCMOS technology. The basic cell performance is greatly enhanced by eliminating redundant signal multiplexing procedures. The simulated combinational logic result has a 30% shorter gate delay than the previous design. By adjusting and properly shutting down the CML current, this design can be used in lower-power consumption circuits. The total saved power is 50% of the first SiGe FPGA developed in the same group. Lastly, the FPGA with a 3-D stacked memory concept is described to further reduce the influence of parasitics generated by the memory banks. The circuit area is also reduced to make dense integrated circuits possible.
Both authors have contributed equally to this work.
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References
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You, C. et al. (2003). Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory. In: Y. K. Cheung, P., Constantinides, G.A. (eds) Field Programmable Logic and Application. FPL 2003. Lecture Notes in Computer Science, vol 2778. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-45234-8_2
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DOI: https://doi.org/10.1007/978-3-540-45234-8_2
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