SECCEG: A Secure and Efficient Cryptographic Co-processor Based on Embedded GPU System | SpringerLink
Skip to main content

SECCEG: A Secure and Efficient Cryptographic Co-processor Based on Embedded GPU System

  • Conference paper
  • First Online:
Wireless Algorithms, Systems, and Applications (WASA 2021)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 12938))

Abstract

With the rise of IoT, e-commerce, and 5G, the demands of secure communications and identity authentications dramatically increase, which largely rely on high-volume cryptographic computing. Meanwhile, driven by deep learning, the embedded GPU system is rapidly evolving. In this paper, we discuss the feasibility of turning the lightweight and energy efficient system into a cryptographic co-processor, where security and performance are two daunting challenges. From the aspect of security, we leverage the available resources in the embedded GPU system to achieve on-chip uninterrupted cryptographic computing, secure key storage, and trusted system bootstrapping. From the aspect of performance, targeting the prevailing digital signature algorithm Ed25519, we develop an entire framework to make full use of the system’s cryptographic computing power, including the Ed25519 implementation with embedded GPU acceleration and a high-performance network processing architecture. In Jetson Xavier and Jetson Xavier NX, we implement a prototype called SECCEG and conduct comprehensive experiments to evaluate its performance. SECCEG can serve as a network cryptographic accelerator via TCP/IP stack with \(3.6 \times 10^6\) ops signature generation and \(1.0 \times 10^6\) ops for signature verification. At the performance-power ratio, SECCEG achieves 122 kops/W and 35.6 kops/W for signature generation and verification, respectively, which is 1 to 2 multitude higher than ARM CPU, FPGA and discrete GPU implementations.

This work was partially supported by National Key R&D Program of China under Award 2018YFB0804401 and National Natural Science Foundation of China under Award No. 61902392.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Subscribe and save

Springer+ Basic
¥17,985 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Chapter
JPY 3498
Price includes VAT (Japan)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
JPY 11439
Price includes VAT (Japan)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
JPY 14299
Price includes VAT (Japan)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Similar content being viewed by others

References

  1. Chen, L.: Microservices: architecting for continuous delivery and devOps. In: 2018 IEEE International Conference on Software Architecture (ICSA), pp. 39–397. IEEE (2018)

    Google Scholar 

  2. Dong, J., Zheng, F., Cheng, J., Lin, J., Pan, W., Wang, Z.: Towards high-performance X25519/448 key agreement in general purpose GPUs. In: IEEE Conference on Communications and Network Security (2018)

    Google Scholar 

  3. Dworkin, M.: Recommendation for block cipher modes of operation: methods for key wrapping. NIST Spec. Publ. 800, 38F (2012)

    Google Scholar 

  4. ENTRUST: nShield connect HSMs. https://www.entrust.com/digital-security/hsm/products/nshield-hsms/nshield-connect. Accessed 1 Apr 2021

  5. Faz-Hernández, A., López, J., Dahab, R.: High-performance implementation of elliptic curve cryptography using vector instructions. ACM Trans. Math. Softw. (TOMS) 45(3), 1–35 (2019)

    Article  MathSciNet  Google Scholar 

  6. Foundation, O.S.: OpenSSL cryptography and SSL/TLS toolkit (2016). http://www.openssl.org/

  7. Gao, L., Zheng, F., Emmart, N., Dong, J., Lin, J., Weems, C.: DPF-ECC: accelerating elliptic curve cryptography with floating-point computing power of GPUs. In: 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), pp. 494–504. IEEE (2020)

    Google Scholar 

  8. Hisil, H., Wong, K.K.-H., Carter, G., Dawson, E.: Twisted Edwards curves revisited. In: Pieprzyk, J. (ed.) ASIACRYPT 2008. LNCS, vol. 5350, pp. 326–343. Springer, Heidelberg (2008). https://doi.org/10.1007/978-3-540-89255-7_20

    Chapter  Google Scholar 

  9. Josefsson, S., Liusvaara, I.: Edwards-curve digital signature algorithm (EdDSA). In: Internet Research Task Force, Crypto Forum Research Group, RFC, vol. 8032 (2017)

    Google Scholar 

  10. Koç, C.K.: Analysis of sliding window techniques for exponentiation. Comput. Math. Appl. 30(10), 17–24 (1995)

    Article  MathSciNet  Google Scholar 

  11. Kwon, O., Kim, Y., Huh, J., Yoon, H.: ZeroKernel: secure context-isolated execution on commodity GPUs. IEEE Trans. Dependable Secure Comput. (2019)

    Google Scholar 

  12. Marvell: Nitrox security processors - nitrox v. https://www.marvell.com/products/security-solutions/nitrox-v.html. Accessed 30 Dec 2020

  13. Mehrabi, M.A., Doche, C.: Low-cost, low-power FPGA implementation of ed25519 and curve25519 point multiplication. Information 10(9), 285 (2019)

    Article  Google Scholar 

  14. NVIDIA: CUDA for Tegra: CUDA toolkit documentation (2020). https://docs.nvidia.com/cuda/cuda-for-tegra-appnote/index.html. Accessed 1 July 2021

  15. NVIDIA: Programming guide: CUDA toolkit documentation (2020). https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html. Accessed 31 Dec 2020

  16. NVIDIA: Xavier series SoC technical reference manual (2020). https://developer.nvidia.com/embedded/dlc/xavier-series-soc-technical-reference-manual. Accessed 1 Jan 2021

  17. Pan, W., Zheng, F., Zhu, W., Jing, J.: An efficient elliptic curve cryptography signature server with GPU acceleration. IEEE Trans. Inf. Forensics Secur. 12(1), 111–22 (2017)

    Article  Google Scholar 

  18. Parrilla, L., Álvarez-Bermejo, J.A., Castillo, E., López-Ramos, J.A., Morales-Santos, D.P., García, A.: Elliptic curve cryptography hardware accelerator for high-performance secure servers. J. Supercomput. 75(3), 1107–1122 (2019)

    Article  Google Scholar 

  19. Pham, Q.V., et al.: A survey of multi-access edge computing in 5G and beyond: fundamentals, technology integration, and state-of-the-art. IEEE Access 8, 116974–117017 (2020)

    Article  Google Scholar 

  20. Pietro, R.D., Lombardi, F., Villani, A.: CUDA leaks: a detailed hack for CUDA and a (partial) fix. ACM Trans. Embed. Comput. Syst. (TECS) 15(1), 1–25 (2016)

    Article  Google Scholar 

  21. Thales: Luna network hardware security modules (HSMs). https://cpl.thalesgroup.com/encryption/hardware-security-modules/network-hsms. Accessed 14 Jan 2021

  22. Turan, F., Verbauwhede, I.: Compact and flexible FPGA implementation of Ed25519 and X25519. ACM Trans. Embed. Comput. Syst. (TECS) 18(3), 1–21 (2019)

    Article  Google Scholar 

  23. Vasiliadis, G., Athanasopoulos, E., Polychronakis, M., Ioannidis, S.: PixelVault: using GPUs for securing cryptographic operations. In: Proceedings of the 2014 ACM SIGSAC Conference on Computer and Communications Security, pp. 1131–1142 (2014)

    Google Scholar 

  24. Yu, D., Jin, Y., Zhang, Y., Zheng, X.: A survey on security issues in services communication of microservices-enabled fog applications. Concurr. Comput. Pract. Exp. 31(22), e4436 (2019)

    Article  Google Scholar 

  25. Zhou, Z., Chen, X., Li, E., Zeng, L., Luo, K., Zhang, J.: Edge intelligence: paving the last mile of artificial intelligence with edge computing. Proc. IEEE 107(8), 1738–1762 (2019)

    Article  Google Scholar 

  26. Zhu, Z., Kim, S., Rozhanski, Y., Hu, Y., Witchel, E., Silberstein, M.: Understanding the security of discrete GPUs. In: Proceedings of the General Purpose GPUs, pp. 1–11, February 2017

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Fangyu Zheng .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2021 Springer Nature Switzerland AG

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Fan, G. et al. (2021). SECCEG: A Secure and Efficient Cryptographic Co-processor Based on Embedded GPU System. In: Liu, Z., Wu, F., Das, S.K. (eds) Wireless Algorithms, Systems, and Applications. WASA 2021. Lecture Notes in Computer Science(), vol 12938. Springer, Cham. https://doi.org/10.1007/978-3-030-86130-8_9

Download citation

  • DOI: https://doi.org/10.1007/978-3-030-86130-8_9

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-030-86129-2

  • Online ISBN: 978-3-030-86130-8

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics