Field Programmable Logic and Applications: 7th International Workshop, FPL '97, London, UK, September, 1-3, 1997, Proceedings. | SpringerLink
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Field Programmable Logic and Applications

7th International Workshop, FPL '97, London, UK, September, 1-3, 1997, Proceedings.

  • Conference proceedings
  • © 1997

Overview

Editors:
  1. Wayne Luk
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  2. Peter Y. K. Cheung
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  3. Manfred Glesner
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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 1304)

Included in the following conference series:

Conference proceedings info: FPL 1997.

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About this book

This book constitutes the refereed proceedings of the 7th International Workshop on Field Programmable Logic and Applications, FPL '97, held in London, UK, in September 1997. The 51 revised full papers in the volume were carefully selected from a large number of high-quality papers. The book is divided into sections on devices and architectures, devices and systems, reconfiguration, design tools, custom computing and codesign, signal processing, image and video processing, sensors and graphics, color and robotics, and applications.

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Table of contents (51 papers)

  1. Front Matter

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  2. Multicontext dynamic reconfiguration and real-time probing on a novel mixed signal programmable device with on-chip microprocessor

    • Julio Faura, Juan Manuel Moreno, Miguel Angel Aguirre, Phuoc van Duong, Josep Maria Insenser
    Pages 1-10

  3. CAD-oriented FPGA and dedicated CAD system for telecommunications

    • Toshiaki Miyazaki, Atsushi Takahara, Masaru Katayama, Takahiro Murooka, Takaki Ichimorit, Kennosuke Fukamitt et al.
    Pages 11-20

  4. Rothko: A three dimensional FPGA architecture, its fabrication, and design tools

    • Miriam Leeser, Waleed M. Meleis, Mankuan M. Vai, Paul Zavracky
    Pages 21-30

  5. Extending dynamic circuit switching to meet the challenges of new FPGA architectures

    • Gordon McGregor, Patrick Lysaght
    Pages 31-40

  6. Performance evaluation of a full speed PCI initiator and target subsystem using FPGAs

    • David Robinson, Patrick Lysaght, Gordon McGregor, Hugh Dick
    Pages 41-50

  7. Implementation of pipelined multipliers on Xilinx FPGAs

    • T. -T. Do, H. Kropp, M. Schwiegershausen, P. Pirsch
    Pages 51-60

  8. The XC620ODS development system

    • Stuart Nisbet, Steven A. Guccione
    Pages 61-68

  9. Thermal monitoring on FPGAs using ring-oscillators

    • Eduardo Boemo, Sergio López-Buedo
    Pages 69-78

  10. A reconfigurable approach to low cost media processing

    • Igor Kostarnov, Steve Morley, Javed Osmany, Charlie Solomon
    Pages 79-90

  11. Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research

    • Patrick I. Mackinlay, Peter Y. K. Cheung, Wayne Luk, Richard Sandiford
    Pages 91-100

  12. Stream synthesis for a wormhole run-time reconfigurable platform

    • Brian Kahne, Peter Athanas
    Pages 101-110

  13. Pipeline morphing and virtual pipelines

    • W. Luk, N. Shirazi, S. R. Guo, P. Y. K. Cheung
    Pages 111-120

  14. Parallel graph colouring using FPGAs

    • Barry Rising, Max van Daalen, Peter Burge, John Shawe-Taylor
    Pages 121-130

  15. Run-time compaction of FPGA designs

    • Oliver Diessel, Hossam ElGindy
    Pages 131-140

  16. Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhancement

    • John M. Emmert, Dinesh Bhatia
    Pages 141-150

  17. A case study of partially evaluated hardware circuits: Key-specific DES

    • Jason Leonard, William H. Mangione-Smith
    Pages 151-160

  18. Run-time parameterised circuits for the Xilinx XC6200

    • Rob Payne
    Pages 161-172

  19. Automatic identification of swappable logic units in XC6200 circuitry

    • Gordon Brebner
    Pages 173-182

  20. Towards an expert system for a priori estimation of reconfiguration latency in dynamically reconfigurable logic

    • Patrick Lysaght
    Pages 183-192
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