Abstract
In this paper we revisit SAM, a security architecture for microprocessors that provides memory encryption and memory verification using hash values, including a summary of its main features and an overview of other related architectures. We analyze the security of SAM architecture as originally proposed, pointing out some weaknesses in security and performance. To overcome them, we supply another hashing and protection schemes which strengthen the security and improve the performance of the first proposal. Finally, we present some experimental results comparing the old and new schemes.
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References
Suh, G.E.: AEGIS: A Single-Chip Secure Processor. PhD thesis, Massachusetts Institute of Technology (2005)
Platte, J., Naroska, E.: A combined hardware and software architecture for secure computing. In: CF 2005: Proceedings of the 2nd conference on Computing frontiers, pp. 280–288. ACM Press, New York (2005)
Platte, J., Naroska, E., Grundmann, K.: A cache design for a security architecture for microprocessors (SAM). In: Grass, W., Sick, B., Waldschmidt, K. (eds.) ARCS 2006. LNCS, vol. 3894, pp. 435–449. Springer, Heidelberg (2006)
Sun Microsystems: Java card security white paper (2001), http://java.sun.com/products/javacard/JavaCardSecurityWhitePaper.pdf
Yee, B.: Using secure coprocessors. PhD thesis, Carnegie Mellon University (1994)
Arnold, T.W., Van Doorn, L.P.: The IBM PCIXCC: A new cryptographic coprocessor for the IBM eServer. IBM Journal of Research and Development 48, 475–487 (2004)
Lie, D., Thekkath, C.A., Mitchell, M., Lincoln, P., Boneh, D., Mitchell, J.C., Horowitz, M.: Architectural support for copy and tamper resistant software (2000)
Menezes, A., van Oorschot, P., Vanstone, S.: Handbook of Applied Cryptography. CRC Press, Inc., Boca Raton, FL (1997)
Cohen, B., Laurie, B.: AES-hash (2001), http://csrc.nist.gov/CryptoToolkit/modes/proposedmodes/aes-hash/aeshash.pdf
Merkle, R.C.: Protocols for public key cryptosystems. In: IEEE Symposium on Security and Privacy, 1109 Spring Street, Suite 300, Silver Spring, MD 20910, pp. 122–134. IEEE Computer Society Press, USA (1980)
Dworkin, M.: Recommendation for Block Cipher Modes of Operation. Methods and Techniques. NIST (2001)
Preneel, B.: Analysis and Design of Cryptographic Hash Functions. PhD thesis, Katholieke Universiteit Leuven (Belgium) (1993)
Bellard, F.: QEMU (2005), http://fabrice.bellard.free.fr/qemu
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© 2006 IFIP International Federation for Information Processing
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Platte, J., Díaz, R.D., Naroska, E. (2006). A New Encryption and Hashing Scheme for the Security Architecture for Microprocessors. In: Leitold, H., Markatos, E.P. (eds) Communications and Multimedia Security. CMS 2006. Lecture Notes in Computer Science, vol 4237. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11909033_11
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DOI: https://doi.org/10.1007/11909033_11
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-47820-1
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