Abstract
Reconfigurable systems have the potential to combine the performance of ASICs with the flexibility of software. The architecture presented in this paper offers a new concept for reconfiguration by operating self-timed and self-controlling. Data is routed together with its control information in a so-called packet through the operator network to make local decisions concerning the behavior of the network. Therefore, we can realize different paths without a central control unit. In this paper, we describe the architecture from the aspect of reconfiguration. An example shows the architecture in practical operation.
This work was partly funded by the Deutsche Forschungsgemeinschaft (SPP 1148)
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Dittmann, F., Rettberg, A. (2004). A Self-Controlled and Dynamically Reconfigurable Architecture. In: Kleinjohann, B., Gao, G.R., Kopetz, H., Kleinjohann, L., Rettberg, A. (eds) Design Methods and Applications for Distributed Embedded Systems. DIPES 2004. IFIP International Federation for Information Processing, vol 150. Springer, Boston, MA. https://doi.org/10.1007/1-4020-8149-9_21
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DOI: https://doi.org/10.1007/1-4020-8149-9_21
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