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ORCIDAlain Darte
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- affiliation: ENS Lyon, France
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2010 – 2019
- 2016
[c45]Alain Darte, Alexandre Isoard, Tomofumi Yuki:
Extended lattice-based memory allocation. CC 2016: 218-228- 2015
- [c44]Alain Darte, Alexandre Isoard:
Exact and Approximated Data-Reuse Optimizations for Tiling with Parametric Sizes. CC 2015: 151-170 - 2014
- [j29]Quentin Colombet, Florian Brandner, Alain Darte:
Studying Optimal Spilling in the Light of SSA. ACM Trans. Archit. Code Optim. 11(4): 47:1-47:26 (2014) - 2013
- [c43]Christophe Alias, Alain Darte, Alexandru Plesco:
Optimizing remote accesses for offloaded kernels: application to high-level synthesis for FPGA. DATE 2013: 575-580 - [c42]Christophe Alias, Alain Darte, Paul Feautrier, Laure Gonnord:
Rank: A Tool to Check Program Termination and Computational Complexity. ICST Workshops 2013: 238 - 2012
- [j28]Benoit Boissinot, Philip Brisk
, Alain Darte, Fabrice Rastello:
SSI Properties Revisited. ACM Trans. Embed. Comput. Syst. 11(S1): 21 (2012) - [c41]Christophe Alias, Alain Darte, Alexandru Plesco:
Optimizing remote accesses for offloaded kernels: application to high-level synthesis for FPGA. PPoPP 2012: 285-286 - 2011
- [c40]Benoit Boissinot, Florian Brandner, Alain Darte, Benoît Dupont de Dinechin, Fabrice Rastello:
A Non-iterative Data-Flow Algorithm for Computing Liveness Sets in Strict SSA Programs. APLAS 2011: 137-154 - [c39]Quentin Colombet, Florian Brandner, Alain Darte:
Studying optimal spilling in the light of SSA. CASES 2011: 25-34 - [r1]Alain Darte:
Parallelism Detection in Nested Loops, Optimal. Encyclopedia of Parallel Computing 2011: 1429-1442 - 2010
- [c38]Christophe Alias, Alain Darte, Alexandru Plesco:
Optimizing DDR-SDRAM communications at C-level for automatically-generated hardware accelerators an experience with the Altera C2H HLS tool. ASAP 2010: 329-332 - [c37]Alain Darte:
Understanding loops: The influence of the decomposition of Karp, Miller, and Winograd. MEMOCODE 2010: 139-148 - [c36]Christophe Alias, Alain Darte, Paul Feautrier, Laure Gonnord:
Multi-dimensional Rankings, Program Termination, and Complexity Bounds of Flowchart Programs. SAS 2010: 117-133 - [c35]Florent Bouchez, Quentin Colombet, Alain Darte, Fabrice Rastello, Christophe Guillon:
Parallel copy motion. SCOPES 2010: 1
2000 – 2009
- 2009
- [c34]Benoit Boissinot, Alain Darte, Fabrice Rastello, Benoît Dupont de Dinechin, Christophe Guillon:
Revisiting Out-of-SSA Translation for Correctness, Code Quality and Efficiency. CGO 2009: 114-125 - [c33]Pedro C. Diniz, Ben H. H. Juurlink, Alain Darte, Wolfgang Karl:
Introduction. Euro-Par 2009: 295-296 - 2008
- [c32]Florent Bouchez, Alain Darte, Fabrice Rastello:
Advanced conservative and optimistic register coalescing. CASES 2008: 147-156 - 2007
- [j27]Hadda Cherroun, Alain Darte, Paul Feautrier:
Reservation table scheduling: branch-and-bound based optimization vs. integer linear programming techniques. RAIRO Oper. Res. 41(4): 427-454 (2007) - [c31]Alain Darte, C. Quinson:
Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis. ASAP 2007: 140-147 - [c30]Florent Bouchez, Alain Darte, Fabrice Rastello:
On the Complexity of Register Coalescing. CGO 2007: 102-114 - [c29]Christophe Alias, Fabrice Baray, Alain Darte:
Bee+Cl@k: an implementation of lattice-based array contraction in the source-to-source translator rose. LCTES 2007: 73-82 - [c28]Florent Bouchez, Alain Darte, Fabrice Rastello:
On the complexity of spill everywhere under SSA form. LCTES 2007: 103-112 - [i1]Florent Bouchez, Alain Darte, Fabrice Rastello:
On the Complexity of Spill Everywhere under SSA Form. CoRR abs/0710.3642 (2007) - 2006
- [c27]Hadda Cherroun, Alain Darte, Paul Feautrier:
Scheduling under resource constraints using dis-equations. DATE 2006: 1067-1072 - [c26]Florent Bouchez, Alain Darte, Christophe Guillon, Fabrice Rastello:
Register Allocation: What Does the NP-Completeness Proof of Chaitin et al. Really Prove? Or Revisiting Register Allocation: Why and How. LCPC 2006: 283-298 - 2005
- [j26]Alain Darte, Robert Schreiber, Gilles Villard:
Lattice-Based Memory Allocation. IEEE Trans. Computers 54(10): 1242-1257 (2005) - [j25]Alain Darte, Guillaume Huard:
New Complexity Results on Array Contraction and Related Problems. J. VLSI Signal Process. 40(1): 35-55 (2005) - [c25]Alain Darte, Steven Derrien, Tanguy Risset:
Hardware/Software Interface for Multi-Dimensional Processor Arrays. ASAP 2005: 28-35 - [c24]Alain Darte, Robert Schreiber:
A linear-time algorithm for optimal barrier placement. PPoPP 2005: 26-35 - 2003
- [j24]Alain Darte, John M. Mellor-Crummey, Robert J. Fowler, Daniel G. Chavarría-Miranda:
Generalized multipartitioning of multi-dimensional arrays for parallelizing line-sweep computations. J. Parallel Distributed Comput. 63(9): 887-911 (2003) - [c23]Alain Darte, Robert Schreiber, Gilles Villard:
Lattice-based memory allocation. CASES 2003: 298-308 - 2002
- [j23]Alain Darte, Robert Schreiber, B. Ramakrishna Rau, Frédéric Vivien:
Constructing and exploiting linear schedules with prescribed parallelism. ACM Trans. Design Autom. Electr. Syst. 7(1): 159-172 (2002) - [c22]Alain Darte, Guillaume Huard:
New Results on Array Contraction. ASAP 2002: 359-370 - [c21]Daniel G. Chavarría-Miranda, Alain Darte, Robert J. Fowler, John M. Mellor-Crummey:
Generalized Multipartitioning for Multi-Dimensional Arrays. IPDPS 2002 - [c20]Alain Darte, Guillaume Huard:
Complexity of Multi-dimensional Loop Alignment. STACS 2002: 179-191 - 2001
- [c19]Alain Darte, Yves Robert, Frédéric Vivien:
Loop Parallelization Algorithms. Compiler Optimizations for Scalable Parallel Systems Languages 2001: 141-172 - 2000
- [b1]Alain Darte, Yves Robert, Frédéric Vivien:
Scheduling and automatic parallelization. Birkhäuser 2000, ISBN 978-3-7643-4149-7, pp. I-XVI, 1-264 - [j22]Alain Darte, Guillaume Huard:
Loop Shifting for Loop Compaction. Int. J. Parallel Program. 28(5): 499-534 (2000) - [j21]Alain Darte:
On the complexity of loop fusion. Parallel Comput. 26(9): 1175-1193 (2000) - [c18]Alain Darte, Georges-André Silber:
Temporary Arrays for Distribution of Loops with Control Dependences. Euro-Par 2000: 357-367 - [c17]Alain Darte, Claude G. Diderich, Marc Gengler, Frédéric Vivien:
Scheduling the Computations of a Loop Nest with Respect to a Given Mapping. Euro-Par 2000: 405-414 - [c16]Alain Darte, Robert Schreiber, B. Ramakrishna Rau, Frédéric Vivien:
A Constructive Solution to the Juggling Problem in Processor Array Synthesis. IPDPS 2000: 815-822
1990 – 1999
- 1999
- [c15]Alain Darte:
On the Complexity of Loop Fusion. IEEE PACT 1999: 149-157 - [c14]Georges-André Silber, Alain Darte:
the NESTOR Library: A Tool for Implementing FORTRAN Source Transformations. HPCN Europe 1999: 653-662 - [c13]Alain Darte, Guillaume Huard:
Loop Shifting for Loop Compaction. LCPC 1999: 415-431 - 1998
- [j20]Pierre-Yves Calland, Alain Darte, Yves Robert, Frédéric Vivien:
On the Removal of Anti- and Output-Dependences. Int. J. Parallel Program. 26(2): 285-312 (1998) - [j19]Pierre Boulet, Alain Darte, Georges-André Silber, Frédéric Vivien:
Loop Parallelization Algorithms: From Parallelism Extraction to Code Generation. Parallel Comput. 24(3-4): 421-444 (1998) - [j18]Pierre-Yves Calland, Alain Darte, Yves Robert:
Circuit Retiming Applied to Decomposed Software Pipelining. IEEE Trans. Parallel Distributed Syst. 9(1): 24-35 (1998) - 1997
- [j17]Alain Darte, Frédéric Vivien:
Optimal Fine and Medium Grain Parallelism Detection in Polyhedral Reduced Dependence Graphs. Int. J. Parallel Program. 25(6): 447-496 (1997) - [j16]Alain Darte, Frédéric Vivien:
On the Optimality of Allen and Kennedy's Algorithm for Parallelism Extraction in Nested Loops. Parallel Algorithms Appl. 12(1-3): 83-112 (1997) - [j15]Thomas Brandes, Serge Chaumette, Marie Christine Counilh, Jean Roman, Alain Darte, Frederic Desprez, J. C. Mignot:
HPFIT: A Set of Integrated Tools for the Parallelization of Applications Using High Performance Fortran. PART I: HPFIT and the TransTOOL Environment. Parallel Comput. 23(1-2): 71-87 (1997) - [j14]Pierre-Yves Calland, Alain Darte, Yves Robert, Frédéric Vivien:
Plugging Anti and Output Dependence Removal Techniques Into Loop Parallelization Algorithm. Parallel Comput. 23(1-2): 251-266 (1997) - [j13]Alain Darte, Frédéric Vivien:
Parallelizing Nested Loops with Approximations of Distance Vectors: A Survey. Parallel Process. Lett. 7(2): 133-144 (1997) - [j12]Alain Darte, Georges-André Silber, Frédéric Vivien:
Combining Retiming and Scheduling Techniques for Loop Parallelization and Loop Tiling. Parallel Process. Lett. 7(4): 379-392 (1997) - 1996
- [j11]Alain Darte, Michèle Dion, Yves Robert:
A Characterization of One-to-One Modular Mappings. Parallel Process. Lett. 6(1): 145-157 (1996) - [c12]Alain Darte, Frédéric Vivien:
Optimal fine and medium grain parallelism detection in polyhedral reduced dependence graphs. IEEE PACT 1996: 281-291 - [c11]Pierre-Yves Calland, Alain Darte, Yves Robert, Frédéric Vivien:
On the Removal of Anti and Output Dependences. ASAP 1996: 353-364 - [c10]Alain Darte, Frédéric Vivien:
On the Optimality of Allen and Kennedy's Algorithm for Parallel Extraction in Nested Loops. Euro-Par, Vol. I 1996: 379-388 - [c9]Pierre-Yves Calland, Alain Darte, Yves Robert:
A New Guaranteed Heuristic for the Software Pipelining Problem. International Conference on Supercomputing 1996: 261-269 - [e1]Guy-René Perrin, Alain Darte:
The Data Parallel Programming Model: Foundations, HPF Realization, and Scientific Applications. Lecture Notes in Computer Science 1132, Springer 1996, ISBN 3-540-61736-1 [contents] - 1995
- [j10]Vincent Bouchitté, Pierre Boulet, Alain Darte, Yves Robert:
Evaluating Array Expressions On Massively Parallel Machines With Communication/ Computation Overlap. Int. J. High Perform. Comput. Appl. 9(3): 205-219 (1995) - [j9]Alain Darte, Yves Robert:
Affine-by-Statement Scheduling of Uniform and Affine Loop Nests over Parametric. J. Parallel Distributed Comput. 29(1): 43-59 (1995) - [j8]Alain Darte, Frédéric Vivien:
Revisiting the Decomposition of Karp, Miller and Winograd. Parallel Process. Lett. 5: 551-562 (1995) - [c8]Alain Darte, Frédéric Vivien:
Revisiting the Decomposition of Karp, Miller and Winograd. ASAP 1995: 13-25 - [c7]Alain Darte, Michèle Dion, Yves Robert:
A characterization of one-to-one modular mappings. SPDP 1995: 382-389 - 1994
- [j7]Pierre Boulet, Alain Darte, Tanguy Risset, Yves Robert:
(Pen)-ultimate tiling? Integr. 17(1): 33-51 (1994) - [j6]Alain Darte, Yves Robert:
Mapping Uniform Loop Nests Onto Distributed Memory Architectures. Parallel Comput. 20(5): 679-710 (1994) - [j5]Alain Darte, Yves Robert:
On the Alignment Problem. Parallel Process. Lett. 4: 259-270 (1994) - [j4]Alain Darte, Yves Robert:
Constructive Methods for Scheduling Uniform Loop Nests. IEEE Trans. Parallel Distributed Syst. 5(8): 814-822 (1994) - [c6]Vincent Bouchitté, Pierre Boulet, Alain Darte, Yves Robert:
Evaluating Array Expressions on Massively Parallel Machines with Communication/ Computation Overlap. CONPAR 1994: 713-724 - 1993
- [c5]Alain Darte, Yves Robert:
Communication-minimal mapping of uniform loop nests onto distributed memory architectures. ASAP 1993: 1-14 - [c4]Alain Darte:
Mapping Uniform Loop Nests onto Distributed Memory Architectures. PARCO 1993: 287-294 - 1992
- [j3]Alain Darte:
Erratum to: Regular partitioning for synthesizing fixed-size systolic arrays. Integr. 13(1): 97-98 (1992) - [c3]Alain Darte, Leonid Khachiyan, Yves Robert:
Linear scheduling is close to optimality. ASAP 1992: 37-46 - 1991
- [j2]Alain Darte:
Regular partitioning for synthesizing fixed-size systolic arrays. Integr. 12(3): 293-304 (1991) - [j1]Alain Darte, Leonid Khachiyan, Yves Robert:
Linear Scheduling Is Nearly Optimal. Parallel Process. Lett. 1: 73-81 (1991) - [c2]Alain Darte, Tanguy Risset, Yves Robert:
Synthesizing systolic arrays: some recent developments. ASAP 1991: 372-386 - [c1]Alain Darte:
Two heuristics for task scheduling. Algorithms and Parallel VLSI Architectures 1991: 383-
Coauthor Index
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