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ORCIDXiaoming Chen 0003
Person information
- affiliation: Chinese Academy of Sciences, Institute of Computing Technology, Beijing, China
- affiliation (2016 - 2017): University of Notre Dame, Department of Computer Science and Engineering, Notre Dame, IN, USA
- affiliation (2014 - 2016): Carnegie Mellon University, Department of Electrical and Computer Engineering, Pittsburgh, PA, USA
- affiliation (PhD 2014): Tsinghua University, Department of Electronic Engineering, Beijing, China
Other persons with the same name
- Xiaoming Chen (aka: XiaoMing Chen, Xiao-Ming Chen) — disambiguation page
- Xiaoming Chen 0001
![[0000-0002-1818-2135]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-1818-2135")
— Nanjing University of Aeronautics and Astronautics, College of Electronic and Information Engineering, China (and 1 more) - Xiaoming Chen 0002 — Xi'an Jiaotong University, China (and 2 more)
- Xiaoming Chen 0005 — State Grid Hubei Electric Power Co., Ltd., China
- Xiaoming Chen 0006 — Beijing Technology and Business University, Multimedia Systems Laboratory School of Computer Science and Engineering, Beijing, China
- Xiaoming Chen 0007 — Shenzhen Intelligent Strong Technology Co.,Ltd., China (and 1 more)
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2020 – today
- 2024
[j38]Yuxin Yang, Xiaoming Chen, Yinhe Han:
JANM-IK: Jacobian Argumented Nelder-Mead Algorithm for Inverse Kinematics and its Hardware Acceleration. IEEE Comput. Archit. Lett. 23(1): 45-48 (2024)- [j37]Rui Liu, Zerun Li, Xiaoyu Zhang, Wanqian Li, Libo Shen, Rui Tang, Zhejian Luo, Xiaoming Chen, Yinhe Han, Minghua Tang:
Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators. IEEE Des. Test 41(5): 46-54 (2024) - [j36]Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han:
GAS: General-Purpose In-Memory-Computing Accelerator for Sparse Matrix Multiplication. IEEE Trans. Computers 73(6): 1427-1441 (2024) - [j35]Wanqian Li, Yinhe Han, Xiaoming Chen:
Mathematical Framework for Optimizing Crossbar Allocation for ReRAM-based CNN Accelerators. ACM Trans. Design Autom. Electr. Syst. 29(1): 21:1-21:24 (2024) - [c81]Xiaoyang Lu, Boyu Long, Xiaoming Chen, Yinhe Han, Xian-He Sun:
ACES: Accelerating Sparse Matrix Multiplication with Adaptive Execution Flow and Concurrency-Aware Cache Optimizations. ASPLOS (3) 2024: 71-85 - [c80]Ning Lin, Shaocong Wang, Yue Zhang, Yangu He, Kwunhang Wong, Arindam Basu, Dashan Shang, Xiaoming Chen, Zhongrui Wang:
Older and Wiser: The Marriage of Device Aging and Intellectual Property Protection of DNNs. DAC 2024: 48:1-48:6 - [c79]Mingjia Fan, Xiaoming Chen, Dechuang Yang, Zhou Jin, Weifeng Liu:
ReCG: ReRAM-Accelerated Sparse Conjugate Gradient. DAC 2024: 269:1-269:6 - [c78]Wanqian Li, Xiaotian Sun, Xinyu Wang, Lei Wang, Yinhe Han, Xiaoming Chen:
PIMSYN: Synthesizing Processing-in-Memory CNN Accelerators. DATE 2024: 1-6 - [c77]Xinyu Wang, Xiaotian Sun, Yinhe Han, Xiaoming Chen:
PIMSIM-NN: An ISA-based Simulation Framework for Processing-in-Memory Accelerators. DATE 2024: 1-2 - [c76]Rui Liu, Xiaoyu Zhang, Xinyu Wang, Feng Min, Zhejian Luo, Xiaoming Chen, Yinhe Han, Minghua Tang:
MemSort: In-Memory Sorting Architecture. ICCD 2024: 28-35 - [c75]Liang Yan, Xiaoyang Lu, Xiaoming Chen, Sheng Xu, Xingqi Zou, Yinhe Han, Xian-He Sun:
AceMiner: Accelerating Graph Pattern Matching using PIM with Optimized Cache System. ICCD 2024: 558-565 - [c74]Yi Chen, Bosheng Liu, Yongqi Xu, Jigang Wu, Xiaoming Chen, Peng Liu, Qingguo Zhou, Yinhe Han:
Accelerating Frequency-domain Convolutional Neural Networks Inference using FPGAs. ISCAS 2024: 1-5 - [c73]Zerun Li, Xiaoming Chen, Yinhe Han:
TMiner: A Vertex-Based Task Scheduling Architecture for Graph Pattern Mining. MICRO 2024: 1295-1308 - [i11]Xinyu Wang, Xiaotian Sun, Yinhe Han, Xiaoming Chen:
PIMSIM-NN: An ISA-based Simulation Framework for Processing-in-Memory Accelerators. CoRR abs/2402.18089 (2024) - [i10]Wanqian Li, Xiaotian Sun, Xinyu Wang, Lei Wang, Yinhe Han, Xiaoming Chen:
PIMSYN: Synthesizing Processing-in-memory CNN Accelerators. CoRR abs/2402.18114 (2024) - [i9]Ning Lin, Shaocong Wang, Yue Zhang, Yangu He, Kwunhang Wong, Arindam Basu, Dashan Shang, Xiaoming Chen, Zhongrui Wang:
Older and Wiser: The Marriage of Device Aging and Intellectual Property Protection of Deep Neural Networks. CoRR abs/2406.14863 (2024) - [i8]Yongqi Xu, Yujian Lee, Gao Yi, Bosheng Liu, Yucong Chen, Peng Liu, Jigang Wu, Xiaoming Chen, Yinhe Han:
BitQ: Tailoring Block Floating Point Precision for Improved DNN Efficiency on Resource-Constrained Devices. CoRR abs/2409.17093 (2024) - [i7]Xiaotian Sun, Xinyu Wang, Wanqian Li, Yinhe Han, Xiaoming Chen:
PIMCOMP: An End-to-End DNN Compiler for Processing-In-Memory Accelerators. CoRR abs/2411.09159 (2024) - 2023
- [j34]Rui Liu, Xiaoyu Zhang, Zhiwen Xie, Xinyu Wang, Zerun Li, Xiaoming Chen, Yinhe Han, Minghua Tang:
FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-Based In-Memory Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(9): 2889-2902 (2023) - [j33]Zhenhua Zhu, Hanbo Sun, Tongxin Xie, Yu Zhu, Guohao Dai, Lixue Xia, Dimin Niu, Xiaoming Chen, Xiaobo Sharon Hu, Yu Cao, Yuan Xie, Huazhong Yang, Yu Wang:
MNSIM 2.0: A Behavior-Level Modeling Tool for Processing-In-Memory Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4112-4125 (2023) - [j32]Bosheng Liu, Zhuoshen Jiang, Yalan Wu, Jigang Wu, Xiaoming Chen, Peng Liu, Qingguo Zhou, Yinhe Han:
Frequency-Domain Inference Acceleration for Convolutional Neural Networks Using ReRAMs. IEEE Trans. Parallel Distributed Syst. 34(12): 3133-3146 (2023) - [c72]Bosheng Liu, Hongyi Liang, Jigang Wu, Xiaoming Chen, Peng Liu, Yinhe Han:
Accelerating Convolutional Neural Networks in Frequency Domain via Kernel-Sharing Approach. ASP-DAC 2023: 733-738 - [c71]Xiaotian Sun, Xinyu Wang, Wanqian Li, Lei Wang, Yinhe Han, Xiaoming Chen:
PIMCOMP: A Universal Compilation Framework for Crossbar-based PIM DNN Accelerators. DAC 2023: 1-6 - [c70]Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han:
FSPA: An FeFET-based Sparse Matrix-Dense Vector Multiplication Accelerator. DAC 2023: 1-6 - [c69]Boyu Long, Libo Shen, Xiaoyu Zhang, Yinhe Han, Xian-He Sun, Xiaoming Chen:
Meltrix: A RRAM-Based Polymorphic Architecture Enhanced by Function Synthesis. ICCAD 2023: 1-9 - [c68]Libo Shen, Boyu Long, Rui Liu, Xiaoyu Zhang, Yinhe Han, Xiaoming Chen:
LIM-GEN: A Data-Guided Framework for Automated Generation of Heterogeneous Logic-in-Memory Architecture. ICCAD 2023: 1-9 - [c67]Rui Tang, Xiaoyu Zhang, Rui Liu, Zhejian Luo, Xiaoming Chen, Yinhe Han:
Hardware-Software Co-Design for Content-Based Sparse Attention. ICCD 2023: 415-418 - [c66]Yuxin Yang, Xiaoming Chen, Yinhe Han:
Dadu-RBD: Robot Rigid Body Dynamics Accelerator with Multifunctional Pipelines. MICRO 2023: 297-309 - [i6]Xiaotian Sun, Xinyu Wang, Wanqian Li, Lei Wang, Yinhe Han, Xiaoming Chen:
PIMCOMP: A Universal Compilation Framework for Crossbar-based PIM DNN Accelerators. CoRR abs/2307.01475 (2023) - [i5]Yuxin Yang, Xiaoming Chen, Yinhe Han:
RBDCore: Robot Rigid Body Dynamics Accelerator with Multifunctional Pipelines. CoRR abs/2307.02274 (2023) - 2022
- [j31]Wenxing Li, Ning Lin, Mingzhe Zhang, Hang Lu, Xiaoming Chen, Xiaowei Li:
VNet: a versatile network to train real-time semantic segmentation models on a single GPU. Sci. China Inf. Sci. 65(3) (2022) - [j30]Hang Xiao, Haobo Xu, Xiaoming Chen, Yujie Wang, Yinhe Han:
Fast and High-Accuracy Approximate MAC Unit Design for CNN Computing. IEEE Embed. Syst. Lett. 14(3): 155-158 (2022) - [j29]Bosheng Liu, Xiaoming Chen, Yinhe Han, Jigang Wu, Liang Chang, Peng Liu, Haobo Xu:
Search-Free Inference Acceleration for Sparse Convolutional Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2156-2169 (2022) - [j28]Xiaoyu Zhang, Rui Liu, Tao Song, Yuxin Yang, Yinhe Han, Xiaoming Chen:
Re-FeMAT: A Reconfigurable Multifunctional FeFET-Based Memory Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 5071-5084 (2022) - [j27]Haobo Xu, Yuxin Yang, Feng Min, Junpei Huang, Xiaoming Chen, Yinhe Han, Ninghui Sun:
Toward Efficient Computing for Robotics: From a Circuit and System View. IEEE Trans. Circuits Syst. II Express Briefs 69(7): 3051-3056 (2022) - [c65]Zerun Li, Xiaoming Chen, Yinhe Han:
Optimal Data Allocation for Graph Processing in Processing-in-Memory Systems. ASP-DAC 2022: 238-243 - [c64]Xiaoming Chen, Yinhe Han:
Solving Least-Squares Fitting in $O(1)$ Using RRAM-based Computing-in-Memory Technique. ASP-DAC 2022: 339-344 - [c63]Rui Liu, Xiaoyu Zhang, Xiaoming Chen, Yinhe Han, Minghua Tang:
FeMIC: Multi-Operands in-Memory Computing Based on FeFETs. ASP-DAC 2022: 678-683 - [c62]Zerun Li, Xiaoming Chen, Yinhe Han:
GraphRing: an HMC-ring based graph processing framework with optimized data movement. DAC 2022: 1063-1068 - [c61]Hang Xiao, Haobo Xu, Xiaoming Chen, Yujie Wang, Yinhe Han:
P3S: A High Accuracy Probabilistic Prediction Processing System for CNN Acceleration. ACM Great Lakes Symposium on VLSI 2022: 237-242 - [c60]Wanqian Li, Yinhe Han, Xiaoming Chen:
Energy-Efficient In-SRAM Accumulation for CMOS-based CNN Accelerators. ACM Great Lakes Symposium on VLSI 2022: 293-298 - [c59]Zhenyu Quan, Xiaoming Chen, Yinhe Han:
AIC-Bench: Workload Selection Methodology for Benchmarking AI Chips. HPCC/DSS/SmartCity/DependSys 2022: 687-694 - [c58]Zhiwen Xie, Yinhe Han, Xiaoming Chen:
PME: Processing-in-memory Masking and Encoding for Secure NVM. HPCC/DSS/SmartCity/DependSys 2022: 1501-1508 - [c57]Xiaoming Chen:
Numerically-Stable and Highly-Scalable Parallel LU Factorization for Circuit Simulation. ICCAD 2022: 112:1-112:9 - 2021
- [j26]Xingqi Zou, Sheng Xu, Xiaoming Chen, Liang Yan, Yinhe Han:
Breaking the von Neumann bottleneck: architecture-level processing-in-memory technology. Sci. China Inf. Sci. 64(6) (2021) - [j25]Ning Lin, Xiaoming Chen, Hang Lu, Xiaowei Li:
Chaotic Weights: A Novel Approach to Protect Intellectual Property of Deep Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(7): 1327-1339 (2021) - [j24]Xuefei Ning, Guangjun Ge, Wenshuo Li, Zhenhua Zhu, Yin Zheng, Xiaoming Chen, Zhen Gao, Yu Wang, Huazhong Yang:
FTT-NAS: Discovering Fault-tolerant Convolutional Neural Architecture. ACM Trans. Design Autom. Electr. Syst. 26(6): 44:1-44:24 (2021) - [c56]Xiaoming Chen, Yuping Wu, Yinhe Han:
FePIM: Contention-Free In-Memory Computing Based on Ferroelectric Field-Effect Transistors. ASP-DAC 2021: 114-119 - [c55]Ning Lin, Xiaoming Chen, Chunwei Xia, Jing Ye, Xiaowei Li:
ChaoPIM: A PIM-based Protection Framework for DNN Accelerators Using Chaotic Encryption. ATS 2021: 1-6 - [c54]Bosheng Liu, Zhuoshen Jiang, Jigang Wu, Xiaoming Chen, Yinhe Han, Peng Liu:
F3D: Accelerating 3D Convolutional Neural Networks in Frequency Space Using ReRAM. DAC 2021: 571-576 - [c53]Tao Song, Xiaoming Chen, Xiaoyu Zhang, Yinhe Han:
BRAHMS: Beyond Conventional RRAM-based Neural Network Accelerators Using Hybrid Analog Memory System. DAC 2021: 1033-1038 - [c52]Tao Song, Xiaoming Chen, Yinhe Han:
Eliminating Iterations of Iterative Methods: Solving Large-Scale Sparse Linear System in O(1) with RRAM-based In-Memory Accelerator. ACM Great Lakes Symposium on VLSI 2021: 71-76 - [c51]Liang Yan, Mingzhe Zhang, Rujia Wang, Xiaoming Chen, Xingqi Zou, Xiaoyang Lu, Yinhe Han, Xian-He Sun:
CoPIM: A Concurrency-aware PIM Workload Offloading Architecture for Graph Applications. ISLPED 2021: 1-6 - [c50]Xiaoming Chen, Tao Song, Yinhe Han:
RRAM-based Analog In-Memory Computing : Invited Paper. NANOARCH 2021: 1-6 - 2020
- [j23]Xiaoming Chen, Kai Ni, Michael T. Niemier, Dayane Reis, Xiaoyu Sun, Panni Wang, Suman Datta, Xiaobo Sharon Hu, Xunzhao Yin, Matthew Jerry, Shimeng Yu, Ann Franchesca Laguna:
The Impact of Ferroelectric FETs on Digital and Analog Circuits and Architectures. IEEE Des. Test 37(1): 79-99 (2020) - [j22]Yi Cai, Xiaoming Chen, Lu Tian, Yu Wang, Huazhong Yang:
Enabling Secure NVM-Based in-Memory Neural Network Computing by Sparse Fast Gradient Encryption. IEEE Trans. Computers 69(11): 1596-1610 (2020) - [j21]Yi Cai, Yujun Lin, Lixue Xia, Xiaoming Chen, Song Han, Yu Wang, Huazhong Yang:
Long Live TIME: Improving Lifetime and Security for NVM-Based Training-in-Memory Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4707-4720 (2020) - [j20]Bosheng Liu, Xiaoming Chen, Yinhe Han, Haobo Xu:
Swallow: A Versatile Accelerator for Sparse Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4881-4893 (2020) - [c49]Wenshuo Li, Guangjun Ge, Kaiyuan Guo, Xiaoming Chen, Qi Wei, Zhen Gao, Yu Wang, Huazhong Yang:
Soft Error Mitigation for Deep Convolution Neural Network on FPGA Accelerators. AICAS 2020: 1-5 - [c48]Wenshuo Li, Xuefei Ning, Guangjun Ge, Xiaoming Chen, Yu Wang, Huazhong Yang:
FTT-NAS: Discovering Fault-Tolerant Neural Architecture. ASP-DAC 2020: 211-216 - [c47]Hanbo Sun, Zhenhua Zhu, Yi Cai, Xiaoming Chen, Yu Wang, Huazhong Yang:
An Energy-Efficient Quantized and Regularized Training Framework For Processing-In-Memory Accelerators. ASP-DAC 2020: 325-330 - [c46]Shulin Zeng, Hanbo Sun, Yu Xing, Xuefei Ning, Yi Shan, Xiaoming Chen, Yu Wang, Huazhong Yang:
Black Box Search Space Profiling for Accelerator-Aware Neural Architecture Search. ASP-DAC 2020: 518-523 - [c45]Bosheng Liu, Xiaoming Chen, Yinhe Han, Ying Wang, Jiajun Li, Haobo Xu, Xiaowei Li:
Search-free Accelerator for Sparse Convolutional Neural Networks. ASP-DAC 2020: 524-529 - [c44]Yuxin Yang, Xiaoming Chen, Yinhe Han:
Dadu-CD: Fast and Efficient Processing-in-Memory Accelerator for Collision Detection. DAC 2020: 1-6 - [c43]Zhenhua Zhu, Hanbo Sun, Kaizhong Qiu, Lixue Xia, Gokul Krishnan, Guohao Dai, Dimin Niu, Xiaoming Chen, Xiaobo Sharon Hu, Yu Cao, Yuan Xie, Yu Wang, Huazhong Yang:
MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems. ACM Great Lakes Symposium on VLSI 2020: 83-88 - [c42]Sheng Xu, Xiaoming Chen, Xuehai Qian, Yinhe Han:
TUPIM: A Transparent and Universal Processing-in-Memory Architecture for Unmodified Binaries. ACM Great Lakes Symposium on VLSI 2020: 199-204 - [c41]Yuxin Yang, Shiqi Lian, Xiaoming Chen, Yinhe Han:
Accelerating RRT Motion Planning Using TCAM. ACM Great Lakes Symposium on VLSI 2020: 481-486 - [c40]Xiaoming Chen, Yinhe Han, Yu Wang:
Communication Lower Bound in Convolution Accelerators. HPCA 2020: 529-541 - [c39]Yinhe Han, Yuxin Yang, Xiaoming Chen, Shiqi Lian:
DaDu Series - Fast and Efficient Robot Accelerators. ICCAD 2020: 165:1-165:8 - [i4]Xuefei Ning, Guangjun Ge, Wenshuo Li, Zhenhua Zhu, Yin Zheng, Xiaoming Chen, Zhen Gao, Yu Wang, Huazhong Yang:
FTT-NAS: Discovering Fault-Tolerant Neural Architecture. CoRR abs/2003.10375 (2020)
2010 – 2019
- 2019
- [j19]Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xuehai Qian, Xiaowei Li:
PIMSim: A Flexible and Detailed Processing-in-Memory Simulator. IEEE Comput. Archit. Lett. 18(1): 6-9 (2019) - [j18]Bosheng Liu, Xiaoming Chen, Yinhe Han, Jiajun Li, Haobo Xu, Xiaowei Li:
Accelerating DNN-based 3D point cloud processing for mobile computing. Sci. China Inf. Sci. 62(11): 212206:1-212206:11 (2019) - [j17]Shichang Zhang, Ying Wang, Xiaoming Chen, Yinhe Han, Yujie Wang, Xiaowei Li:
Thread: Towards fine-grained precision reconfiguration in variable-precision neural network accelerator. IEICE Electron. Express 16(14): 20190145 (2019) - [j16]Xiaoming Chen, Kai Ni, Michael T. Niemier, Yinhe Han, Suman Datta, Xiaobo Sharon Hu:
Power and Area Efficient FPGA Building Blocks Based on Ferroelectric FETs. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(5): 1780-1793 (2019) - [j15]Yang Liu, Xiaoming Chen, Dileep Kadambi, Ajinkya Bari, Xin Li, Shiyan Hu, Pingqiang Zhou:
Dependable Visual Light-Based Indoor Localization with Automatic Anomaly Detection for Location-Based Service of Mobile Cyber-Physical Systems. ACM Trans. Cyber Phys. Syst. 3(1): 5:1-5:17 (2019) - [j14]Xiaoming Chen, Danny Ziyi Chen, Yinhe Han, Xiaobo Sharon Hu:
moDNN: Memory Optimal Deep Neural Network Training on Graphics Processing Units. IEEE Trans. Parallel Distributed Syst. 30(3): 646-661 (2019) - [j13]Xunzhao Yin, Xiaoming Chen, Michael T. Niemier, Xiaobo Sharon Hu:
Ferroelectric FETs-Based Nonvolatile Logic-in-Memory Circuits. IEEE Trans. Very Large Scale Integr. Syst. 27(1): 159-172 (2019) - [c38]Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xiaowei Li:
CuckooPIM: an efficient and less-blocking coherence mechanism for processing-in-memory systems. ASP-DAC 2019: 140-145 - [c37]Bosheng Liu, Xiaoming Chen, Ying Wang, Yinhe Han, Jiajun Li, Haobo Xu, Xiaowei Li:
Addressing the issue of processing element under-utilization in general-purpose systolic deep learning accelerators. ASP-DAC 2019: 733-738 - [c36]Xiaoming Chen, Longxiang Yin, Bosheng Liu, Yinhe Han:
Merging Everything (ME): A Unified FPGA Architecture Based on Logic-in-Memory Techniques. DAC 2019: 238 - [c35]Yi Cai, Xiaoming Chen, Lu Tian, Yu Wang, Huazhong Yang:
Enabling Secure in-Memory Neural Network Computing by Sparse Fast Gradient Encryption. ICCAD 2019: 1-8 - [c34]Zhenhua Zhu, Mingyuan Ma, Jialong Liu, Liying Xu, Xiaoming Chen, Yuchao Yang, Yu Wang, Huazhong Yang:
A General Logic Synthesis Framework for Memristor-based Logic Design. ICCAD 2019: 1-8 - [c33]Xiaoyu Zhang, Xiaoming Chen, Yinhe Han:
FeMAT: Exploring In-Memory Processing in Multifunctional FeFET-Based Memory Array. ICCD 2019: 541-549 - [i3]Xiaoming Chen, Yinhe Han, Yu Wang:
Communication Lower Bound in Convolution Accelerators. CoRR abs/1911.05662 (2019) - 2018
- [j12]Xiaoming Chen, Qiaoyi Liu, Song Yao, Jia Wang, Qiang Xu, Yu Wang, Yongpan Liu, Huazhong Yang:
Hardware Trojan Detection in Third-Party Digital Intellectual Property Cores by Multilevel Feature Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(7): 1370-1383 (2018) - [c32]Yi Cai, Yujun Lin, Lixue Xia, Xiaoming Chen, Song Han, Yu Wang, Huazhong Yang:
Long live TIME: improving lifetime for training-in-memory engines by structured gradient sparsification. DAC 2018: 107:1-107:6 - [c31]Shiqi Lian, Yinhe Han, Xiaoming Chen, Ying Wang, Hang Xiao:
Dadu-P: a scalable accelerator for robot motion planning in a dynamic environment. DAC 2018: 109:1-109:6 - [c30]Xiaoming Chen, Danny Z. Chen, Xiaobo Sharon Hu:
moDNN: Memory optimal DNN training on GPUs. DATE 2018: 13-18 - [c29]Jilan Lin, Lixue Xia, Zhenhua Zhu, Hanbo Sun, Yi Cai, Hui Gao, Ming Cheng, Xiaoming Chen, Yu Wang, Huazhong Yang:
Rescuing memristor-based computing with non-linear resistance levels. DATE 2018: 407-412 - [c28]Xiaoming Chen, Xunzhao Yin, Michael T. Niemier, Xiaobo Sharon Hu:
Design and optimization of FeFET-based crossbars for binary convolution neural networks. DATE 2018: 1205-1210 - [c27]Ahmedullah Aziz, Evelyn T. Breyer, An Chen, Xiaoming Chen, Suman Datta, Sumeet Kumar Gupta, Michael Hoffmann, Xiaobo Sharon Hu, Adrian M. Ionescu, Matthew Jerry, Thomas Mikolajick, Halid Mulaosmanovic, Kai Ni, Michael T. Niemier, Ian O'Connor, Atanu Saha, Stefan Slesazeck, Sandeep Krishna Thirumala, Xunzhao Yin:
Computing with ferroelectric FETs: Devices, models, systems, and applications. DATE 2018: 1289-1298 - [c26]Tianshu Wei, Xiaoming Chen, Xin Li, Qi Zhu:
Model-based and data-driven approaches for building automation and control. ICCAD 2018: 26 - [c25]Zhenhua Zhu, Jilan Lin, Ming Cheng, Lixue Xia, Hanbo Sun, Xiaoming Chen, Yu Wang, Huazhong Yang:
Mixed size crossbar based RRAM CNN accelerator with overlapped mapping method. ICCAD 2018: 69 - [c24]Xiaoming Chen, Michael T. Niemier, Xiaobo Sharon Hu:
Nonvolatile Lookup Table Design Based on Ferroelectric Field-Effect Transistors. ISCAS 2018: 1-5 - 2017
- [j11]Xiaoming Chen, Lin Wang, Yu Wang, Yongpan Liu, Huazhong Yang:
A General Framework for Hardware Trojan Detection in Digital Circuits by Statistical Learning Algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(10): 1633-1646 (2017) - [c23]Xiaoming Chen, Jianxu Chen, Danny Z. Chen, Xiaobo Sharon Hu:
Optimizing Memory Efficiency for Convolution Kernels on Kepler GPUs. DAC 2017: 68:1-68:6 - [c22]Xiaoming Chen, Qiaoyi Liu, Yu Wang, Qiang Xu, Huazhong Yang:
Low-overhead implementation of logic encryption using gate replacement techniques. ISQED 2017: 257-263 - [i2]Xiaoming Chen, Jianxu Chen, Danny Z. Chen, Xiaobo Sharon Hu:
Optimizing Memory Efficiency for Convolution Kernels on Kepler GPUs. CoRR abs/1705.10591 (2017) - [i1]Yuzhi Wang, Anqi Yang, Xiaoming Chen, Pengjun Wang, Yu Wang, Huazhong Yang:
A Deep Learning Approach for Blind Drift Calibration of Sensor Networks. CoRR abs/1707.03682 (2017) - 2016
- [j10]Xiaoming Chen, Lin Wang, Boxun Li, Yu Wang, Xin Li, Yongpan Liu, Huazhong Yang:
Modeling Random Telegraph Noise as a Randomness Source and its Application in True Random Number Generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(9): 1435-1448 (2016) - [j9]Xiaoming Chen, Boxun Li, Yu Wang, Yongpan Liu, Huazhong Yang:
A Unified Methodology for Designing Hardware Random Number Generators Based on Any Probability Distribution. IEEE Trans. Circuits Syst. II Express Briefs 63-II(8): 783-787 (2016) - [c21]Xiaoming Chen, Lixue Xia, Yu Wang, Huazhong Yang:
Sparsity-oriented sparse solver design for circuit simulation. DATE 2016: 1580-1585 - [c20]Xiaoming Chen, Xin Li, Sheldon X.-D. Tan:
Overview of cyber-physical temperature estimation in smart buildings: From modeling to measurements. INFOCOM Workshops 2016: 251-256 - [c19]Xiaoming Chen, Xin Li:
Virtual temperature measurement for smart buildings via Bayesian model fusion. ISCAS 2016: 950-953 - 2015
- [j8]Xiaoming Chen, Ling Ren, Yu Wang, Huazhong Yang:
GPU-Accelerated Sparse LU Factorization for Circuit Simulation with Performance Modeling. IEEE Trans. Parallel Distributed Syst. 26(3): 786-795 (2015) - [j7]Yu Wang, Song Yao, Shuai Tao, Xiaoming Chen, Yuchun Ma, Yiyu Shi, Huazhong Yang:
HS3-DPG: Hierarchical Simulation for 3-D P/G Network. IEEE Trans. Very Large Scale Integr. Syst. 23(10): 2307-2311 (2015) - [c18]Gushu Li, Xiaoming Chen, Guangyu Sun, Henry Hoffmann, Yongpan Liu, Yu Wang, Huazhong Yang:
A STT-RAM-based low-power hybrid register file for GPGPUs. DAC 2015: 103:1-103:6 - [c17]Xiaoming Chen, Yu Wang, Huazhong Yang:
A fast parallel sparse solver for SPICE-based circuit simulators. DATE 2015: 205-210 - [c16]Xiaoming Chen, Xin Li, Sheldon X.-D. Tan:
From Robust Chip to Smart Building: CAD Algorithms and Methodologies for Uncertainty Analysis of Building Performance. ICCAD 2015: 457-464 - [c15]Song Yao, Xiaoming Chen, Jie Zhang, Qiaoyi Liu, Jia Wang, Qiang Xu, Yu Wang, Huazhong Yang:
FASTrust: Feature analysis for third-party IP trust verification. ITC 2015: 1-10 - 2014
- [c14]Xiaoming Chen, Yu Wang, Yu Cao, Huazhong Yang:
Statistical analysis of random telegraph noise in digital circuits. ASP-DAC 2014: 161-166 - [c13]Xiaoming Chen, Yu Wang, Yun Liang, Yuan Xie, Huazhong Yang:
Run-Time Technique for Simultaneous Aging and Power Optimization in GPGPUs. DAC 2014: 168:1-168:6 - [c12]Song Yao, Xiaoming Chen, Yu Wang, Yuchun Ma, Yuan Xie, Huazhong Yang:
Efficient region-aware P/G TSV planning for 3D ICs. ISQED 2014: 171-178 - 2013
- [j6]Xiaoming Chen, Yu Wang, Huazhong Yang, Yuan Xie, Yu Cao:
Assessment of Circuit Optimization Techniques Under NBTI. IEEE Des. Test 30(6): 40-49 (2013) - [j5]Xiaoming Chen, Hong Luo, Yu Wang, Yu Cao, Yuan Xie, Yuchun Ma, Huazhong Yang:
Evaluation and mitigation of performance degradation under random telegraph noise for digital circuits. IET Circuits Devices Syst. 7(5): 273-282 (2013) - [j4]Xiaoming Chen, Yu Wang, Huazhong Yang:
NICSLU: An Adaptive Sparse Matrix Solver for Parallel Circuit Simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(2): 261-274 (2013) - [c11]Shuai Tao, Xiaoming Chen, Yu Wang, Yuchun Ma, Yiyu Shi, Hui Wang, Huazhong Yang:
HS3DPG: Hierarchical simulation for 3D P/G network. ASP-DAC 2013: 509-514 - [c10]Xiaoming Chen, Du Su, Yu Wang, Huazhong Yang:
Nonzero pattern analysis and memory access optimization in GPU-based sparse LU factorization for circuit simulation. IA3@SC 2013: 8:1-8:8 - 2012
- [j3]Xiaoming Chen, Yu Wang, Yu Cao, Yuchun Ma, Huazhong Yang:
Variation-Aware Supply Voltage Assignment for Simultaneous Power and Aging Optimization. IEEE Trans. Very Large Scale Integr. Syst. 20(11): 2143-2147 (2012) - [c9]Xiaoming Chen, Yu Wang, Huazhong Yang:
An adaptive LU factorization algorithm for parallel circuit simulation. ASP-DAC 2012: 359-364 - [c8]Ling Ren, Xiaoming Chen, Yu Wang, Chenxi Zhang, Huazhong Yang:
Sparse LU factorization for parallel circuit simulation on GPU. DAC 2012: 1125-1130 - [c7]Xiaoming Chen, Yu Wang, Huazhong Yang:
Parallel Circuit Simulation on Multi/Many-core Systems. IPDPS Workshops 2012: 2530-2533 - 2011
- [j2]Xiaoming Chen, Wei Wu, Yu Wang, Hao Yu, Huazhong Yang:
An EScheduler-Based Data Dependence Analysis and Task Scheduling for Parallel Circuit Simulation. IEEE Trans. Circuits Syst. II Express Briefs 58-II(10): 702-706 (2011) - [j1]Yu Wang, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang:
Leakage Power and Circuit Aging Cooptimization by Gate Replacement Techniques. IEEE Trans. Very Large Scale Integr. Syst. 19(4): 615-628 (2011) - [c6]Wei Wu, Yi Shan, Xiaoming Chen, Yu Wang, Huazhong Yang:
FPGA Accelerated Parallel Sparse Matrix Factorization for Circuit Simulations. ARC 2011: 302-315 - [c5]Hong Luo, Xiaoming Chen, Jyothi Velamala, Yu Wang, Yu Cao, Vikas Chandra, Yuchun Ma, Huazhong Yang:
Circuit-level delay modeling considering both TDDB and NBTI. ISQED 2011: 14-21
2000 – 2009
- 2009
- [c4]Yu Wang, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang:
Gate replacement techniques for simultaneous leakage and aging optimization. DATE 2009: 328-333 - [c3]Xiaoming Chen, Yu Wang, Yu Cao, Yuchun Ma, Huazhong Yang:
Variation-aware supply voltage assignment for minimizing circuit degradation and leakage. ISLPED 2009: 39-44 - [c2]Yu Wang, Xiaoming Chen, Wenping Wang, Varsha Balakrishnan, Yu Cao, Yuan Xie, Huazhong Yang:
On the efficacy of input Vector Control to mitigate NBTI effects and leakage power. ISQED 2009: 19-26 - [c1]Yan Xu, Weichen Liu, Yu Wang, Jiang Xu, Xiaoming Chen, Huazhong Yang:
On-line MPSoC Scheduling Considering Power Gating Induced Power/Ground Noise. ISVLSI 2009: 109-114
Coauthor Index
[j38] [j37] [j36] [j35] [c81] [c78] [c77] [c76] [c75] [c74] [c73] [i11] [i10] [i8] [i7] [j34] [j32] [c72] [c71] [c70] [c69] [c68] [c67] [c66] [i6] [i5] [j30] [j29] [j28] [j27] [c65] [c64] [c63] [c62] [c61] [c60] [c59] [c58] [j26] [c56] [c54] [c53] [c52] [c51] [c50] [j20] [c45] [c44] [c42] [c41] [c40] [c39] [j19] [j18] [j17] [j16] [j14] [c38] [c37] [c36] [c33] [i3] [c31]
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