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2020 – today
- 2024
[j116]Shiyang Lu, Xiaobai Ning, Hongchao Zhang, Sixi Zhen, Xiaofei Fan, Danrong Xiong, Dapeng Zhu, Gefei Wang, Hongxi Liu
, Kaihua Cao, Weisheng Zhao:
Spin-orbit torque efficiency enhancement to tungsten-based SOT-MTJs by interface modification with an ultrathin MgO. Sci. China Inf. Sci. 67(1) (2024)- [j115]Zitong Zhou, Zhiqiang Cao, Shaohua Yan, Xiaolong Wang, Libo Xie, Shiyang Lu, Dapeng Zhu, Qunwen Leng, Weisheng Zhao:
A high precision two-axis GMR angular sensor manufactured by post-annealing. Sci. China Inf. Sci. 67(6) (2024) - [j114]Ao Zhou, Jianlei Yang, Yingjie Qi, Tong Qiao, Yumeng Shi, Cenlin Duan, Weisheng Zhao, Chunming Hu:
HGNAS: Hardware-Aware Graph Neural Architecture Search for Edge Devices. IEEE Trans. Computers 73(12): 2693-2707 (2024) - [j113]Jinyu Bai, Sifan Sun, Weisheng Zhao, Wang Kang:
CIMQ: A Hardware-Efficient Quantization Framework for Computing-In-Memory-Based Neural Network Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(1): 189-202 (2024) - [j112]Cenlin Duan, Jianlei Yang, Xiaolin He, Yingjie Qi, Yikun Wang, Yiou Wang, Ziyan He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weitao Pan, Weisheng Zhao:
DDC-PIM: Efficient Algorithm/Architecture Co-Design for Doubling Data Capacity of SRAM-Based Processing-in-Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(3): 906-918 (2024) - [j111]Sifan Sun, Jinyu Bai, Zhaoyu Shi, Weisheng Zhao, Wang Kang:
CIM²PQ: An Arraywise and Hardware-Friendly Mixed Precision Quantization Method for Analog Computing-In-Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(7): 2084-2097 (2024) - [j110]Wei W. Xing, Longze Wang, Zhelong Wang, Zhaoyu Shi, Ning Xu, Yuanqing Cheng, Weisheng Zhao:
Multicorner Timing Analysis Acceleration for Iterative Physical Design of ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(7): 2151-2162 (2024) - [j109]Yueting Li, Jinkai Wang, Daoqian Zhu, Jinhao Li, Ao Du, Xueyan Wang, Yue Zhang, Weisheng Zhao:
APIM: An Antiferromagnetic MRAM-Based Processing-In-Memory System for Efficient Bit-Level Operations of Quantized Convolutional Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(8): 2405-2410 (2024) - [j108]Kaili Zhang, Zhongzhen Tong, Xinxin Liang, Chengzhi Wang, You Wang, Yue Zhang, Weisheng Zhao, Lang Zeng, Deming Zhang:
A Charge-Domain Compute-In-Memory Macro With Cell-Embedded DA Conversion and Two-Stage AD Conversion for Bit-Scalable MAC Operation. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1077-1081 (2024) - [j107]Chao Wang, Zhaohao Wang, Zhongkui Zhang, Youguang Zhang, Weisheng Zhao:
Area and Energy Efficient Short-Circuit-Logic-Based STT-MRAM Crossbar Array for Binary Neural Networks. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1386-1390 (2024) - [j106]Yueting Li, Xueyan Wang, He Zhang, Biao Pan, Keni Qiu, Wang Kang, Jun Wang, Weisheng Zhao:
Toward Energy-efficient STT-MRAM-based Near Memory Computing Architecture for Embedded Systems. ACM Trans. Embed. Comput. Syst. 23(3): 37:1-37:24 (2024) - [j105]Xiaotao Jia, Huiyi Gu, Yuhao Liu, Jianlei Yang, Xueyan Wang, Weitao Pan, Youguang Zhang, Sorin Cotofana, Weisheng Zhao:
An Energy-Efficient Bayesian Neural Network Implementation Using Stochastic Computing Method. IEEE Trans. Neural Networks Learn. Syst. 35(9): 12913-12923 (2024) - [c162]Jinkai Wang, Zekun Wang, Bojun Zhang, Zhengkun Gu, Youxiang Chen, Weisheng Zhao, Yue Zhang:
FRM-CIM: Full-Digital Recursive MAC Computing in Memory System Based on MRAM for Neural Network Applications. DAC 2024: 186:1-186:6 - [c161]Ao Zhou, Jianlei Yang, Tong Qiao, Yingjie Qi, Zhi Yang, Weisheng Zhao, Chunming Hu:
Graph Neural Networks Automated Design and Deployment on Device-Edge Co-Inference Systems. DAC 2024: 187:1-187:6 - [c160]Weiliang Huang, Jinyu Bai, Wang Kang, Zhaohao Wang, Kaihua Cao, Hongxi Liu, He Zhang, Weisheng Zhao:
Series-Parallel Hybrid SOT-MRAM Computing-in-Memory Macro with Multi-Method Modulation for High Area and Energy Efficiency. DAC 2024: 193:1-193:6 - [c159]Cenlin Duan, Jianlei Yang, Yiou Wang, Yikun Wang, Yingjie Qi, Xiaolin He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weisheng Zhao:
Towards Efficient SRAM-PIM Architecture Design by Exploiting Unstructured Bit-Level Sparsity. DAC 2024: 209:1-209:6 - [c158]Tong Qiao, Jianlei Yang, Yingjie Qi, Ao Zhou, Chen Bai, Bei Yu, Weisheng Zhao, Chunming Hu:
GNNavigator: Towards Adaptive Training of Graph Neural Networks via Automatic Guideline Exploration. DAC 2024: 239:1-239:6 - [c157]Xidi Ma, Weichen Zhang, Xueyan Wang, Tianyang Yu, Bi Wu, Gang Qu, Weisheng Zhao:
A Combined Content Addressable Memory and In-Memory Processing Approach for k-Clique Counting Acceleration. DAC 2024: 257:1-257:6 - [c156]Yuntao Wei, Xueyan Wang, Song Bian, Yicheng Huang, Weisheng Zhao, Yier Jin:
PPGNN: Fast and Accurate Privacy-Preserving Graph Neural Network Inference via Parallel and Pipelined Arithmetic-and-Logic FHE Accelerator. DAC 2024: 273:1-273:6 - [c155]Yicheng Huang, Xueyan Wang, Tianao Dai, Jianlei Yang, Zhaojun Lu, Xiaotao Jia, Gang Qu, Weisheng Zhao:
LLP-ECCA: A Low-Latency and Programmable Framework for Elliptic Curve Cryptography Accelerators. ITC-Asia 2024: 1-6 - [c154]Shangtong Zhang, Xueyan Wang, Weisheng Zhao, Yier Jin:
CRISP: Triangle Counting Acceleration via Content Addressable Memory-Integrated 3D-Stacked Memory. ITC-Asia 2024: 1-6 - [i31]Ao Zhou, Jianlei Yang, Tong Qiao, Yingjie Qi, Zhi Yang, Weisheng Zhao, Chunming Hu:
Graph Neural Networks Automated Design and Deployment on Device-Edge Co-Inference Systems. CoRR abs/2404.05605 (2024) - [i30]Cenlin Duan, Jianlei Yang, Yiou Wang, Yikun Wang, Yingjie Qi, Xiaolin He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weisheng Zhao:
Towards Efficient SRAM-PIM Architecture Design by Exploiting Unstructured Bit-Level Sparsity. CoRR abs/2404.09497 (2024) - [i29]Tong Qiao, Jianlei Yang, Yingjie Qi, Ao Zhou, Chen Bai, Bei Yu, Weisheng Zhao, Chunming Hu:
GNNavigator: Towards Adaptive Training of Graph Neural Networks via Automatic Guideline Exploration. CoRR abs/2404.09544 (2024) - [i28]Ao Zhou, Jianlei Yang, Yingjie Qi, Tong Qiao, Yumeng Shi, Cenlin Duan, Weisheng Zhao, Chunming Hu:
HGNAS: Hardware-Aware Graph Neural Architecture Search for Edge Devices. CoRR abs/2408.12840 (2024) - 2023
- [j104]Sylvain Eimer, Houyi Cheng, Jinji Li, Xueying Zhang, Chao Zhao, Weisheng Zhao:
Perpendicular magnetic anisotropy based spintronics devices in Pt/Co stacks under different hard and flexible substrates. Sci. China Inf. Sci. 66(2) (2023) - [j103]Yinglin Zhao, Jianlei Yang, Bing Li, Xingzhou Cheng, Xucheng Ye, Xueyan Wang, Xiaotao Jia, Zhaohao Wang, Youguang Zhang, Weisheng Zhao:
NAND-SPIN-based processing-in-MRAM architecture for convolutional neural network acceleration. Sci. China Inf. Sci. 66(4) (2023) - [j102]Yan Huang, Kaihua Cao, Kun Zhang, Jinkai Wang, Kewen Shi, Zuolei Hao, Wenlong Cai, Ao Du, Jialiang Yin, Qing Yang, Junfeng Li, Jianfeng Gao, Chao Zhao, Weisheng Zhao:
Implementation of 16 Boolean logic operations based on one basic cell of spin-transfer-torque magnetic random access memory. Sci. China Inf. Sci. 66(6) (2023) - [j101]Nan Yang, Zhizhong Si, Xinhe Wang, Xiaoyang Lin, Weisheng Zhao:
Neuromorphic terahertz imaging based on carbon nanotube circuits. Sci. China Inf. Sci. 66(6) (2023) - [j100]Hangtian Wang, Koichi Murata, Weiran Xie, Jing Li, Jie Zhang, Kang L. Wang, Weisheng Zhao, Tianxiao Nie:
Proximity-induced magnetic order in topological insulator on ferromagnetic semiconductor. Sci. China Inf. Sci. 66(12) (2023) - [j99]Chao Wang, Zhaohao Wang, Zhongkui Zhang, Jiagao Feng, Youguang Zhang, Weisheng Zhao:
Layout Aware Optimization Methodology for SOT-MRAM Based on Technically Feasible Top-Pinned Magnetic Tunnel Junction Process. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(5): 1463-1476 (2023) - [j98]Yuntao Wei, Xueyan Wang, Shangtong Zhang, Jianlei Yang, Xiaotao Jia, Zhaohao Wang, Gang Qu, Weisheng Zhao:
IMGA: Efficient In-Memory Graph Convolution Network Aggregation With Data Flow Optimizations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4695-4705 (2023) - [j97]Weisheng Zhao, Hai Helen Li, Domenico Zito:
Outgoing Editorial. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 4675-4677 (2023) - [j96]Yueting Li, Wang Kang, Kunyu Zhou, Keni Qiu, Weisheng Zhao:
Experimental Demonstration of STT-MRAM-based Nonvolatile Instantly On/Off System for IoT Applications: Case Studies. ACM Trans. Embed. Comput. Syst. 22(2): 29:1-29:24 (2023) - [j95]Yueting Li, Tianshuo Bai, Xinyi Xu, Yundong Zhang, Bi Wu, Hao Cai, Biao Pan, Weisheng Zhao:
A Survey of MRAM-Centric Computing: From Near Memory to In Memory. IEEE Trans. Emerg. Top. Comput. 11(2): 318-330 (2023) - [j94]Wei W. Xing, Xiang Jin, Tian Feng, Dan Niu, Weisheng Zhao, Zhou Jin:
BoA-PTA: A Bayesian Optimization Accelerated PTA Solver for SPICE Simulation. ACM Trans. Design Autom. Electr. Syst. 28(2): 27:1-27:26 (2023) - [c153]Yueting Li, He Zhang, Xueyan Wang, Hao Cai, Yundong Zhang, Shuqin Lv, Renguang Liu, Weisheng Zhao:
Toward Energy-Efficient Sparse Matrix-Vector Multiplication with near STT-MRAM Computing Architecture. ASP-DAC 2023: 222-227 - [c152]Wei W. Xing, Zheng Xing, Rongqi Lu, Zhelong Wang, Ning Xu, Yuanqing Cheng, Weisheng Zhao:
TOTAL: Multi-Corners Timing Optimization Based on Transfer and Active Learning. DAC 2023: 1-6 - [c151]Ao Zhou, Jianlei Yang, Yingjie Qi, Yumeng Shi, Tong Qiao, Weisheng Zhao, Chunming Hu:
Hardware-Aware Graph Neural Network Automated Design for Edge Computing Platforms. DAC 2023: 1-6 - [c150]Jinkai Wang, Zhengkun Gu, Hongyu Wang, Zuolei Hao, Bojun Zhang, Weisheng Zhao, Yue Zhang:
TAM: A Computing in Memory based on Tandem Array within STT-MRAM for Energy-Efficient Analog MAC Operation. DATE 2023: 1-6 - [c149]Yuntao Wei, Xueyan Wang, Song Bian, Weisheng Zhao, Yier Jin:
THE-V: Verifiable Privacy-Preserving Neural Network via Trusted Homomorphic Execution. ICCAD 2023: 1-9 - [c148]Xinyi Xu, Hongchao Zhang, Chuanpeng Jiang, Jinhao Li, Shiyang Lu, Yunpeng Li, Honglei Du, Xueying Zhang, Zhaohao Wang, Kaihua Cao, Weisheng Zhao, Shuqin Lyu, Hao Xu, Bonian Jiang, Le Wang, Bowen Man, Cong Zhang, Dandan Li, Shuhui Li, Xiaofei Fan, Gefei Wang, Hongxi Liu:
Full reliability characterization of three-terminal SOT-MTJ devices and corresponding arrays. IRPS 2023: 1-6 - [i27]Ao Zhou, Jianlei Yang, Yingjie Qi, Yumeng Shi, Tong Qiao, Weisheng Zhao, Chunming Hu:
Hardware-Aware Graph Neural Network Automated Design for Edge Computing Platforms. CoRR abs/2303.10875 (2023) - [i26]Cenlin Duan, Jianlei Yang, Xiaolin He, Yingjie Qi, Yikun Wang, Yiou Wang, Ziyan He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weitao Pan, Weisheng Zhao:
DDC-PIM: Efficient Algorithm/Architecture Co-design for Doubling Data Capacity of SRAM-based Processing-In-Memory. CoRR abs/2310.20424 (2023) - [i25]Jianlei Yang, Jiacheng Liao, Fanding Lei, Meichen Liu, Junyi Chen, Lingkun Long, Han Wan, Bei Yu, Weisheng Zhao:
TinyFormer: Efficient Transformer Design and Deployment on Tiny Devices. CoRR abs/2311.01759 (2023) - 2022
- [j93]Wenlong Cai, Mengxing Wang, Kaihua Cao, Huaiwen Yang, Shouzhong Peng, Huisong Li, Weisheng Zhao:
Stateful implication logic based on perpendicular magnetic tunnel junctions. Sci. China Inf. Sci. 65(2) (2022) - [j92]Luding Wang, Wenlong Cai, Kaihua Cao, Kewen Shi, Bert Koopmans, Weisheng Zhao:
Femtosecond laser-assisted switching in perpendicular magnetic tunnel junctions with double-interface free layer. Sci. China Inf. Sci. 65(4) (2022) - [j91]Jie Cai, Wei Zhang, Jinlian Deng, Weisheng Zhao:
Optimization method of machining parameters based on intelligent algorithm. Distributed Parallel Databases 40(4): 737-752 (2022) - [j90]Weisheng Zhao, Ruizhi Lin, Junqing Cai:
On construction for trees making the equality hold in Vizing's conjecture. J. Graph Theory 101(3): 397-427 (2022) - [j89]Jianlei Yang, Wenzhi Fu, Xingzhou Cheng, Xucheng Ye, Pengcheng Dai, Weisheng Zhao:
S2 Engine: A Novel Systolic Architecture for Sparse Convolutional Neural Networks. IEEE Trans. Computers 71(6): 1440-1452 (2022) - [j88]Xueyan Wang, Jianlei Yang, Yinglin Zhao, Xiaotao Jia, Rong Yin, Xuhang Chen, Gang Qu, Weisheng Zhao:
Triangle Counting Accelerations: From Algorithm to In-Memory Computing Architecture. IEEE Trans. Computers 71(10): 2462-2472 (2022) - [j87]Xuhang Chen, Xueyan Wang, Xiaotao Jia, Jianlei Yang, Gang Qu, Weisheng Zhao:
Accelerating Graph-Connected Component Computation With Emerging Processing-In-Memory Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5333-5342 (2022) - [j86]Linjun Jiang, Erya Deng, He Zhang, Zhaohao Wang, Wang Kang, Weisheng Zhao:
A Spintronic In-Memory Computing Network for Efficient Hamming Codec Implementation. IEEE Trans. Circuits Syst. II Express Briefs 69(4): 2086-2090 (2022) - [j85]Rashid Ali, Deming Zhang, Hao Cai, Weisheng Zhao, You Wang:
A Machine Learning Attack-Resilient Strong PUF Leveraging the Process Variation of MRAM. IEEE Trans. Circuits Syst. II Express Briefs 69(6): 2712-2716 (2022) - [j84]Biao Pan, Guangyao Wang, He Zhang, Wang Kang, Weisheng Zhao:
A Mini Tutorial of Processing in Memory: From Principles, Devices to Prototypes. IEEE Trans. Circuits Syst. II Express Briefs 69(7): 3044-3050 (2022) - [c147]Yueting Li, Bingluo Zhao, Xinyi Xu, Yundong Zhang, Jun Wang, Weisheng Zhao:
Work-in-Progress: Toward Energy-efficient Near STT-MRAM Processing Architecture for Neural Networks. CODES+ISSS 2022: 13-14 - [c146]He Zhang, Linjun Jiang, Jianxin Wu, Tingran Chen, Junzhan Liu, Wang Kang, Weisheng Zhao:
CP-SRAM: charge-pulsation SRAM marco for ultra-high energy-efficiency computing-in-memory. DAC 2022: 109-114 - [c145]Mingjun Li, Jianlei Yang, Yingjie Qi, Meng Dong, Yuhao Yang, Runze Liu, Weitao Pan, Bei Yu, Weisheng Zhao:
Eventor: an efficient event-based monocular multi-view stereo accelerator on FPGA platform. DAC 2022: 331-336 - [c144]Chenyi Wang, Min Wang, Zhaohao Wang, Weisheng Zhao:
Two-bit multi-level spin orbit torque MRAM with the fully one-step write operation. ICTA 2022: 142-143 - [c143]Jiayao Wu, Yijiao Wang, Zhi Yang, Kuiqing He, Pengxu Wang, Weisheng Zhao:
An In-memory Booth Multiplier Based on Non-volatile Memory for Neural Network Applications. NANOARCH 2022: 13:1-13:6 - [p1]You Wang, Hao Cai, Kaili Zhang, Bo Wu, Bo Liu, Deming Zhang, Weisheng Zhao:
Spintronic Solutions for Approximate Computing. Approximate Computing 2022: 99-117 - [i24]Mingjun Li, Jianlei Yang, Yingjie Qi, Meng Dong, Yuhao Yang, Runze Liu, Weitao Pan, Bei Yu, Weisheng Zhao:
Eventor: An Efficient Event-Based Monocular Multi-View Stereo Accelerator on FPGA Platform. CoRR abs/2203.15439 (2022) - [i23]Yinglin Zhao, Jianlei Yang, Bing Li, Xingzhou Cheng, Xucheng Ye, Xueyan Wang, Xiaotao Jia, Zhaohao Wang, Youguang Zhang, Weisheng Zhao:
NAND-SPIN-Based Processing-in-MRAM Architecture for Convolutional Neural Network Acceleration. CoRR abs/2204.09989 (2022) - [i22]Jianlei Yang, Xiaopeng Gao, Weisheng Zhao:
Towards Systems Education for Artificial Intelligence: A Course Practice in Intelligent Computing Architectures. CoRR abs/2207.12229 (2022) - 2021
- [j83]Zhiqiang Cao, Yiming Wei, Wenjing Chen, Shaohua Yan, Lin Lin, Zhi Li, Lezhi Wang, Huaiwen Yang, Qunwen Leng, Weisheng Zhao:
Tuning the pinning direction of giant magnetoresistive sensor by post annealing process. Sci. China Inf. Sci. 64(6) (2021) - [j82]Yue Hao, Shuiying Xiang, Genquan Han, Jincheng Zhang, Xiaohua Ma, Zhangming Zhu, Xingxing Guo, Yahui Zhang, Yanan Han, Ziwei Song, Yan Liu, Ling Yang, Hong Zhou, Jiangyi Shi, Wei Zhang, Min Xu, Weisheng Zhao, Biao Pan, Yangqi Huang, Qi Liu, Yimao Cai, Jian Zhu, Xin Ou, Tiangui You, Huaqiang Wu, Bin Gao, Zhiyong Zhang, Guoping Guo, Yonghua Chen, Yong Liu, Xiangfei Chen, Chunlai Xue, Xingjun Wang, Lixia Zhao, Xihua Zou, Lianshan Yan, Ming Li:
Recent progress of integrated circuits and optoelectronic chips. Sci. China Inf. Sci. 64(10) (2021) - [j81]Dali Sheng, Jinlian Deng, Wei Zhang, Jie Cai, Weisheng Zhao, Jiawei Xiang:
A Statistical Image Feature-Based Deep Belief Network for Fire Detection. Complex. 2021: 5554316:1-5554316:12 (2021) - [j80]Jie Cai, Jinlian Deng, Wei Zhang, Weisheng Zhao:
Modeling Method of Autonomous Robot Manipulator Based on D-H Algorithm. Mob. Inf. Syst. 2021: 4448648:1-4448648:10 (2021) - [j79]Zongxia Guo, Jialiang Yin, Yue Bai, Daoqian Zhu, Kewen Shi, Gefei Wang, Kaihua Cao, Weisheng Zhao:
Spintronics for Energy- Efficient Computing: An Overview and Outlook. Proc. IEEE 109(8): 1398-1417 (2021) - [j78]Bi Wu, Zhaohao Wang, Yuxuan Li, Ying Wang, Dijun Liu, Weisheng Zhao, Xiaobo Sharon Hu:
A NAND-SPIN-Based Magnetic ADC. IEEE Trans. Circuits Syst. II Express Briefs 68(2): 617-621 (2021) - [j77]Zhitai Yu, Yijiao Wang, Zeqing Zhang, Kuiqing He, Lang Zeng, Zhaohao Wang, Weisheng Zhao:
Proposal of High Density Two-Bits-Cell Based NAND-Like Magnetic Random Access Memory. IEEE Trans. Circuits Syst. II Express Briefs 68(5): 1665-1669 (2021) - [j76]Hao Cai, Juntong Chen, Yongliang Zhou, Weisheng Zhao:
Toward Energy-Efficient STT-MRAM Design With Multi-Modes Reconfiguration. IEEE Trans. Circuits Syst. II Express Briefs 68(7): 2633-2639 (2021) - [j75]Xiaotao Jia, Jianlei Yang, Runze Liu, Xueyan Wang, Sorin Dan Cotofana, Weisheng Zhao:
Efficient Computation Reduction in Bayesian Neural Networks Through Feature Decomposition and Memorization. IEEE Trans. Neural Networks Learn. Syst. 32(4): 1703-1712 (2021) - [c142]Jinyu Bai, Yunqian Fan, Sifan Sun, Wang Kang, Weisheng Zhao:
Tiny neural network search and implementation for embedded FPGA: a software-hardware co-design approach. A-SSCC 2021: 1-3 - [c141]Junyu Luo, Jianlei Yang, Xucheng Ye, Xin Guo, Weisheng Zhao:
FedSkel: Efficient Federated Learning on Heterogeneous Systems with Skeleton Gradients Update. CIKM 2021: 3283-3287 - [c140]Lichuan Luo, He Zhang, Jinyu Bai, Youguang Zhang, Wang Kang, Weisheng Zhao:
SpinLiM: Spin Orbit Torque Memory for Ternary Neural Networks Based on the Logic-in-Memory Architecture. DATE 2021: 1865-1870 - [c139]He Zhang, Junzhan Liu, Kang Wang, Yunqian Fan, Shufeng Fu, Jinyu Bai, Biao Pan, Yongpan Liu, Weisheng Zhao:
A 40nm 33.6Tops/W 8T-SRAM Computing-in-Memory Macro with DAC-less Spike-Pulse-Truncation Input and ADC-less Charge-Reservoir-Integrate-Counter Output. ICTA 2021: 123-124 - [c138]Rashid Ali, You Wang, Haoyuan Ma, Zhengyi Hou, Deming Zhang, Erya Deng, Weisheng Zhao:
A Reconfigurable Arbiter PUF Based on STT-MRAM. ISCAS 2021: 1-5 - [c137]Erya Deng, Wang Kang, Weisheng Zhao, Shaoqian Wei, You Wang, Deming Zhang:
Spin-Orbit Torque Nonvolatile Flip-Flop Designs. ISCAS 2021: 1-5 - [c136]Haoyuan Ma, You Wang, Rashid Ali, Zhengyi Hou, Deming Zhang, Erya Deng, Gefei Wang, Weisheng Zhao:
SpinSim: A Computer Architecture-Level Variation Aware STT-MRAM Performance Evaluation Framework. ISCAS 2021: 1-5 - [c135]Chao Wang, Zhaohao Wang, Youguang Zhang, Weisheng Zhao:
Computing-in-Memory Paradigm Based on STT-MRAM with Synergetic Read/Write-Like Modes. ISCAS 2021: 1-5 - [c134]Deming Zhang, Xian Wang, Kaili Zhang, Lang Zeng, You Wang, Bi Wang, Erya Deng, Chuanjie Wang, Peng Wu, Youguang Zhang, Weisheng Zhao:
Fully Single Event Double Node Upset Tolerant Design for Magnetic Random Access Memory. ISCAS 2021: 1-5 - [c133]Bi Wang, Zhaohao Wang, Min Wang, Weisheng Zhao, Liang Wang, Yuanfu Zhao:
Soft Error Sensitivity of Magnetic Random Access Memory and Its Radiation Hardening Design. ISOCC 2021: 199-200 - [c132]Zuolei Hao, Yue Zhang, Jinkai Wang, Hongyu Wang, Yining Bai, Guanda Wang, Weisheng Zhao:
A Computing-in-memory Scheme with Series Bit-cell in STT-MRAM for Efficient Multi-bit Analog Multiplication. NANOARCH 2021: 1-6 - [c131]Lin Cong, Guang-Wei Deng, Xiaoyang Lin, Wenjie Liang, Zaiqiao Bai, Weisheng Zhao, Kaili Jiang, Xinhe Wang:
Multi-order Nonlinearities and Resulting Coherent Oscillations of the States in Quantum Dot-Mechanical Resonator Hybrid System. NEMS 2021: 1084-1087 - [c130]Xian Wang, Deming Zhang, Kaili Zhang, Erya Deng, You Wang, Weisheng Zhao:
A Novel Multi-Context Non-Volatile Content-Addressable Memory Cell and Multi-Level Architecture for High Reliability and Density. NVMSA 2021: 1-6 - [c129]Ao Zhou, Jianlei Yang, Yeqi Gao, Tong Qiao, Yingjie Qi, Xiaoyi Wang, Yunli Chen, Pengcheng Dai, Weisheng Zhao, Chunming Hu:
Brief Industry Paper: optimizing Memory Efficiency of Graph Neural Networks on Edge Computing Platforms. RTAS 2021: 445-448 - [i21]Ao Zhou, Jianlei Yang, Yeqi Gao, Tong Qiao, Yingjie Qi, Xiaoyi Wang, Yunli Chen, Pengcheng Dai, Weisheng Zhao, Chunming Hu:
Optimizing Memory Efficiency of Graph Neural Networks on Edge Computing Platforms. CoRR abs/2104.03058 (2021) - [i20]Jianlei Yang, Wenzhi Fu, Xingzhou Cheng, Xucheng Ye, Pengcheng Dai, Weisheng Zhao:
S2Engine: A Novel Systolic Architecture for Sparse Convolutional Neural Networks. CoRR abs/2106.07894 (2021) - [i19]Xing Chen, Flavio Abreu Araujo, Mathieu Riou, Jacob Torrejon, Dafine Ravelosona, Wang Kang, Weisheng Zhao, Julie Grollier, Damien Querlioz:
Forecasting the outcome of spintronic experiments with Neural Ordinary Differential Equations. CoRR abs/2108.02318 (2021) - [i18]Junyu Luo, Jianlei Yang, Xucheng Ye, Xin Guo, Weisheng Zhao:
FedSkel: Efficient Federated Learning on Heterogeneous Systems with Skeleton Gradients Update. CoRR abs/2108.09081 (2021) - [i17]Xueyan Wang, Jianlei Yang, Yinglin Zhao, Xiaotao Jia, Rong Yin, Xuhang Chen, Gang Qu, Weisheng Zhao:
Triangle Counting Accelerations: From Algorithm to In-Memory Computing Architecture. CoRR abs/2112.00471 (2021) - 2020
- [j74]Kaili Zhang, Deming Zhang, Chengzhi Wang, Lang Zeng, You Wang, Weisheng Zhao:
Compact Modeling and Analysis of Voltage-Gated Spin-Orbit Torque Magnetic Tunnel Junction. IEEE Access 8: 50792-50800 (2020) - [j73]Yuan Cao, Xinhe Wang, Xiaoyang Lin, Wei Yang, Chen Lv, Yuan Lu, Youguang Zhang, Weisheng Zhao:
Movable-Type Transfer and Stacking of van der Waals Heterostructures for Spintronics. IEEE Access 8: 70488-70495 (2020) - [j72]Jiang Nan, Kun Zhang, Yue Zhang, Shaohua Yan, Zhizhong Zhang, Zhenyi Zheng, Guanda Wang, Qunwen Leng, Youguang Zhang, Weisheng Zhao:
A Diode-Enhanced Scheme for Giant Magnetoresistance Amplification and Reconfigurable Logic. IEEE Access 8: 87584-87591 (2020) - [j71]Yu Pan, Xiaotao Jia, Zhen Cheng, Peng Ouyang, Xueyan Wang, Jianlei Yang, Weisheng Zhao:
An STT-MRAM based reconfigurable computing-in-memory architecture for general purpose computing. CCF Trans. High Perform. Comput. 2(3): 272-281 (2020) - [j70]Ruizhi Lin, Heping Zhang, Weisheng Zhao:
Matching preclusion for direct product of regular graphs. Discret. Appl. Math. 277: 221-230 (2020) - [j69]Jianlei Yang, Yixiao Duan, Tong Qiao, Huanyu Zhou, Jingyuan Wang, Weisheng Zhao:
Prototyping federated learning on edge computing systems. Frontiers Comput. Sci. 14(6): 146318 (2020) - [j68]Wang Kang, Bi Wu, Xing Chen, Daoqian Zhu, Zhaohao Wang, Xichao Zhang, Yan Zhou, Youguang Zhang, Weisheng Zhao:
A Comparative Cross-layer Study on Racetrack Memories: Domain Wall vs Skyrmion. ACM J. Emerg. Technol. Comput. Syst. 16(1): 2:1-2:17 (2020) - [j67]Jiacheng Ni, Keren Liu, Bi Wu, Weisheng Zhao, Yuanqing Cheng, Xiaolong Zhang, Ying Wang:
Write Back Energy Optimization for STT-MRAM-based Last-level Cache with Data Pattern Characterization. ACM J. Emerg. Technol. Comput. Syst. 16(3): 29:1-29:18 (2020) - [j66]Xueyan Wang, Jianlei Yang, Yinglin Zhao, Xiaotao Jia, Gang Qu, Weisheng Zhao:
Hardware Security in Spin-based Computing-in-memory: Analysis, Exploits, and Mitigation Techniques. ACM J. Emerg. Technol. Comput. Syst. 16(4): 37:1-37:18 (2020) - [j65]Xinyu Wu, Zhongyang Bai, Lin Wang, Guangchao Cui, Mengzheng Yang, Qing Yang, Bo Ma, Qinglin Song, Dewen Tian, Frederik Ceyssens, Robert Puers, Michael Kraft, Weisheng Zhao, Lianggong Wen:
Magnetic Cell Centrifuge Platform Performance Study with Different Microsieve Pore Geometries. Sensors 20(1): 48 (2020) - [j64]Xiaotao Jia, Jianlei Yang, Pengcheng Dai, Runze Liu, Yiran Chen, Weisheng Zhao:
SPINBIS: Spintronics-Based Bayesian Inference System With Stochastic Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(4): 789-802 (2020) - [j63]Bi Wu, Pengcheng Dai, Yuanqing Cheng, Ying Wang, Jianlei Yang, Zhaohao Wang, Dijun Liu, Weisheng Zhao:
A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(4): 803-815 (2020) - [j62]Bi Wu, Weisheng Zhao, Xiaobo Sharon Hu, Pengcheng Dai, Zhaohao Wang, Chao Wang, Ying Wang, Jianlei Yang, Yuanqing Cheng, Dijun Liu, Youguang Zhang:
Bulkyflip: A NAND-SPIN-Based Last-Level Cache With Bandwidth-Oriented Write Management Policy. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(1): 108-120 (2020) - [j61]Chengzhi Wang, Deming Zhang, Lang Zeng, Weisheng Zhao:
Design of Magnetic Non-Volatile TCAM With Priority-Decision in Memory Technology for High Speed, Low Power, and High Reliability. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(2): 464-474 (2020) - [j60]Yongliang Zhou, Hao Cai, Lei Xie, Menglin Han, Mingyue Liu, Shi Xu, Bo Liu, Weisheng Zhao, Jun Yang:
A Self-Timed Voltage-Mode Sensing Scheme With Successive Sensing and Checking for STT-MRAM. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 67-I(5): 1602-1614 (2020) - [j59]Yongliang Zhou, Hao Cai, Bo Liu, Weisheng Zhao, Jun Yang:
MTJ-LRB: Proposal of MTJ-Based Loop Replica Bitline as MRAM Device-Circuit Interaction for PVT-Robust Sensing. IEEE Trans. Circuits Syst. 67-II(12): 3352-3356 (2020) - [c128]Pengcheng Dai, Jianlei Yang, Xucheng Ye, Xingzhou Cheng, Junyu Luo, Linghao Song, Yiran Chen, Weisheng Zhao:
SparseTrain: Exploiting Dataflow Sparsity for Efficient Convolutional Neural Networks Training. DAC 2020: 1-6 - [c127]Xueyan Wang, Jianlei Yang, Yinglin Zhao, Yingjie Qi, Meichen Liu, Xingzhou Cheng, Xiaotao Jia, Xiaoming Chen, Gang Qu, Weisheng Zhao:
TCIM: Triangle Counting Acceleration With Processing-In-MRAM Architecture. DAC 2020: 1-6 - [c126]Haotian Wang, Wang Kang, Liuyang Zhang, He Zhang, Brajesh Kumar Kaushik, Weisheng Zhao:
High-Density, Low-Power Voltage-Control Spin Orbit Torque Memory with Synchronous Two-Step Write and Symmetric Read Techniques. DATE 2020: 1217-1222 - [c125]He Zhang, Wang Kang, Youguang Zhang, Weisheng Zhao:
Deep Neural Network accelerator with Spintronic Memory. ACM Great Lakes Symposium on VLSI 2020: 51 - [c124]Zhe Huang, Yue Zhang, Kun Zhang, Zhizhong Zhang, Jinkai Wang, Youguang Zhang, Weisheng Zhao:
An In-memory Highly Reconfigurable Logic Circuit Based on Diode-assisted Enhanced Magnetoresistance Device. ACM Great Lakes Symposium on VLSI 2020: 259-264 - [c123]Yining Bai, Yue Zhang, Jinkai Wang, Guanda Wang, Zhizhong Zhang, Zhenyi Zheng, Kun Zhang, Weisheng Zhao:
A Novel In-memory Computing Scheme Based on Toggle Spin Torque MRAM. ACM Great Lakes Symposium on VLSI 2020: 351-356 - [c122]Jianlei Yang, Xiaopeng Gao, Weisheng Zhao:
Towards Systems Education for Artificial Intelligence: A Course Practice in Intelligent Computing Architectures. ACM Great Lakes Symposium on VLSI 2020: 567-572 - [c121]Liang Chang, Zhaohao Wang, Yang Zhao, Youguang Zhang, Weisheng Zhao, Jun Zhou:
PRISM: Energy-Efficient Polymorphic Operation Based on Spin-Orbit Torque Memory for Reconfigurable Computing. ISCAS 2020: 1-5 - [c120]Jinkai Wang, Yue Zhang, Chenyu Lian, Yining Bai, Zhe Huang, Guanda Wang, Kun Zhang, Youguang Zhang, Weisheng Zhao:
Efficient Time-Domain In-Memory Computing Based on TST-MRAM. ISCAS 2020: 1-5 - [c119]Chao Wang, Zhaohao Wang, Yansong Xu, Jianlei Yang, Youguang Zhang, Weisheng Zhao:
Computing-in-Memory Architecture Based on Field-Free SOT-MRAM with Self-Reference Method. ISCAS 2020: 1-4 - [c118]Kaili Zhang, Deming Zhang, Chengzhi Wang, Lang Zeng, Weisheng Zhao:
Voltage-Gated Spin-Hall Effect Based Magnetic Non-Volatile Flip-Flop for High Speed, Low Power and Compact Cell Area. ISCAS 2020: 1-5 - [e2]Tinoosh Mohsenin, Weisheng Zhao, Yiran Chen, Onur Mutlu:
GLSVLSI '20: Great Lakes Symposium on VLSI 2020, Virtual Event, China, September 7-9, 2020. ACM 2020, ISBN 978-1-4503-7944-1 [contents] - [i16]Xiaotao Jia, Jianlei Yang, Runze Liu, Xueyan Wang, Sorin Dan Cotofana, Weisheng Zhao:
Efficient Computation Reduction in Bayesian Neural Networks Through Feature Decomposition and Memorization. CoRR abs/2005.03857 (2020) - [i15]Xueyan Wang, Jianlei Yang, Yinglin Zhao, Xiaotao Jia, Gang Qu, Weisheng Zhao:
Hardware Security in Spin-Based Computing-In-Memory: Analysis, Exploits, and Mitigation Techniques. CoRR abs/2006.01425 (2020) - [i14]Xueyan Wang, Jianlei Yang, Yinglin Zhao, Yingjie Qi, Meichen Liu, Xingzhou Cheng, Xiaotao Jia, Xiaoming Chen, Gang Qu, Weisheng Zhao:
TCIM: Triangle Counting Acceleration With Processing-In-MRAM Architecture. CoRR abs/2007.10702 (2020) - [i13]Pengcheng Dai, Jianlei Yang, Xucheng Ye, Xingzhou Cheng, Junyu Luo, Linghao Song, Yiran Chen, Weisheng Zhao:
SparseTrain: Exploiting Dataflow Sparsity for Efficient Convolutional Neural Networks Training. CoRR abs/2007.13595 (2020)
2010 – 2019
- 2019
- [j58]Tinish Bhattacharya, Sai Li, Yangqi Huang, Wang Kang, Weisheng Zhao, Manan Suri:
Low-Power (1T1N) Skyrmionic Synapses for Spiking Neuromorphic Systems. IEEE Access 7: 5034-5044 (2019) - [j57]Liang Chang, Zhaohao Wang, Youguang Zhang, Weisheng Zhao:
Multi-Port 1R1W Transpose Magnetic Random Access Memory by Hierarchical Bit-Line Switching. IEEE Access 7: 110463-110471 (2019) - [j56]Junfeng Qiao, Weisheng Zhao:
Efficient technique for ab-initio calculation of magnetocrystalline anisotropy energy. Comput. Phys. Commun. 238: 203-213 (2019) - [j55]Yinglin Zhao, Peng Ouyang, Wang Kang, Shouyi Yin, Youguang Zhang, Shaojun Wei, Weisheng Zhao:
An STT-MRAM Based in Memory Architecture for Low Power Integral Computing. IEEE Trans. Computers 68(4): 617-623 (2019) - [j54]Jianlei Yang, Xueyan Wang, Qiang Zhou, Zhaohao Wang, Hai Li, Yiran Chen, Weisheng Zhao:
Exploiting Spin-Orbit Torque Devices As Reconfigurable Logic for Circuit Obfuscation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(1): 57-69 (2019) - [j53]Guanda Wang, Yue Zhang, Beibei Zhang, Bi Wu, Jiang Nan, Xueying Zhang, Zhizhong Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Zhaohao Wang, Youguang Zhang, Weisheng Zhao:
Ultra-Dense Ring-Shaped Racetrack Memory Cache Design. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(1): 215-225 (2019) - [j52]Hao Cai, You Wang, Lirida Alves de Barros Naviner, Xinning Liu, Weiwei Shan, Jun Yang, Weisheng Zhao:
Addressing Failure and Aging Degradation in MRAM/MeRAM-on-FDSOI Integration. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(1): 239-250 (2019) - [j51]Chengzhi Wang, Deming Zhang, Lang Zeng, Erya Deng, Jie Chen, Weisheng Zhao:
A Novel MTJ-Based Non-Volatile Ternary Content-Addressable Memory for High-Speed, Low-Power, and High-Reliable Search Operation. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(4): 1454-1464 (2019) - [j50]Bi Wang, Zhaohao Wang, Bi Wu, Yumeng Bai, Kaihua Cao, Yuanfu Zhao, Youguang Zhang, Weisheng Zhao:
Novel Radiation Hardening Read/Write Circuits Using Feedback Connections for Spin-Orbit Torque Magnetic Random Access Memory. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(5): 1853-1862 (2019) - [j49]Fan Wang, Weisheng Zhao:
One-to-one disjoint path covers in hypercubes with faulty edges. J. Supercomput. 75(8): 5583-5595 (2019) - [j48]Bi Wu, Beibei Zhang, Yuanqing Cheng, Ying Wang, Dijun Liu, Weisheng Zhao:
An Adaptive Thermal-Aware ECC Scheme for Reliable STT-MRAM LLC Design. IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1851-1860 (2019) - [j47]Liang Chang, Xin Ma, Zhaohao Wang, Youguang Zhang, Yufei Ding, Weisheng Zhao, Yuan Xie:
DASM: Data-Streaming-Based Computing in Nonvolatile Memory Architecture for Embedded System. IEEE Trans. Very Large Scale Integr. Syst. 27(9): 2046-2059 (2019) - [j46]Liang Chang, Xin Ma, Zhaohao Wang, Youguang Zhang, Yuan Xie, Weisheng Zhao:
PXNOR-BNN: In/With Spin-Orbit Torque MRAM Preset-XNOR Operation-Based Binary Neural Networks. IEEE Trans. Very Large Scale Integr. Syst. 27(11): 2668-2679 (2019) - [c117]Zongxia Guo, Kaihua Cao, Kewen Shi, Weisheng Zhao:
Ultra-low power consumption Spintronics Devices. ASICON 2019: 1-4 - [c116]Zheng Liang, Guangyu Sun, Wang Kang, Xing Chen, Weisheng Zhao:
ZUMA: Enabling Direct Insertion/Deletion Operations with Emerging Skyrmion Racetrack Memory. DAC 2019: 158 - [c115]Runze Liu, Jianlei Yang, Yiran Chen, Weisheng Zhao:
eSLAM: An Energy-Efficient Accelerator for Real-Time ORB-SLAM on FPGA Platform. DAC 2019: 193 - [c114]Liang Chang, Xin Ma, Zhaohao Wang, Youguang Zhang, Weisheng Zhao, Yuan Xie:
CORN: In-Buffer Computing for Binary Neural Network. DATE 2019: 384-389 - [c113]Hao Cai, Menglin Han, Weiwei Shan, Jun Yang, You Wang, Wang Kang, Weisheng Zhao:
Voltage-Controlled Magnetoelectric Memory Bit-cell Design With Assisted Body-bias in FD-SOI. ACM Great Lakes Symposium on VLSI 2019: 135-140 - [c112]Yu Pan, Peng Ouyang, Yinglin Zhao, Shouyi Yin, Youguang Zhang, Shaojun Wei, Weisheng Zhao:
A Skyrmion Racetrack Memory based Computing In-memory Architecture for Binary Neural Convolutional Network. ACM Great Lakes Symposium on VLSI 2019: 271-274 - [c111]Biao Pan, Kang Wang, Xing Chen, Jinyu Bai, Jianlei Yang, Sai Li, Youguang Zhang, Weisheng Zhao:
Magnetic Skyrmion-Based Neural Recording System Design for Brain Machine Interface. ISCAS 2019: 1-5 - [c110]Biao Pan, Kang Wang, Xing Chen, Jinyu Bai, Jianlei Yang, Youguang Zhang, Weisheng Zhao:
SR-WTA: Skyrmion Racing Winner-Takes-All Module for Spiking Neural Computing. ISCAS 2019: 1-5 - [c109]Lang Zeng, Zuodong Zhang, Haoxuan Chen, Tianqi Gao, Deming Zhang, Mingzhi Long, Youguang Zhang, Weisheng Zhao:
Modulation and Demodulation of Digital Frequency Shift Keying System Based on Spin Torque Nano Oscillator with Voltage Controlled Magnetic Anisotropy Effect. ISCAS 2019: 1-5 - [c108]Liang Chang, Zhaohao Wang, Youguang Zhang, Weisheng Zhao:
Ultra-fast and Energy-efficient Write-Computing Operation for Neuromorphic Computing. ISOCC 2019: 140-141 - [c107]Hao Cai, Honglan Jiang, Menglin Han, Zhaohao Wang, You Wang, Jun Yang, Jie Han, Leibo Liu, Weisheng Zhao:
Pj-AxMTJ: Process-in-memory with Joint Magnetization Switching for Approximate Computing in Magnetic Tunnel Junction. ISVLSI 2019: 111-115 - [c106]Yinglin Zhao, Jianlei Yang, Xiaotao Jia, Xueyan Wang, Zhaohao Wang, Wang Kang, Youguang Zhang, Weisheng Zhao:
Exploiting Near-Memory Processing Architectures for Bayesian Neural Networks Acceleration. ISVLSI 2019: 203-206 - [c105]Yue Zhang, Jiang Nan, Guanda Wang, Xueying Zhang, Youguang Zhang, Weisheng Zhao:
Shaped Content Addressable Memory Based On Spin Orbit Torque Driven Chiral Domain Wall Motions. NANOARCH 2019: 1-2 - [c104]Rashid Ali, You Wang, Zhengyi Hou, Haoyuan Ma, Youguang Zhang, Weisheng Zhao:
Process Variation-Resilient STT-MTJ based TRNG using Linear Correcting Codes. NANOARCH 2019: 1-6 - [c103]Wang Kang, He Zhang, Weisheng Zhao:
Spintronic Memories: From Memory to Computing-in-Memory. NANOARCH 2019: 1-2 - [c102]Guanda Wang, Yue Zhang, Zhe Huang, Jinkai Wang, Kun Zhang, Zhizhong Zhang, Youguang Zhang, Weisheng Zhao:
Thermal Stable and Fast Perpendicular Shape Anisotropy Magnetic Tunnel Junction. NANOARCH 2019: 1-6 - [c101]Jinkai Wang, Yue Zhang, Chenyu Lian, Guanda Wang, Kun Zhang, Xiulong Wu, Youguang Zhang, Weisheng Zhao:
High speed and reliable Sensing Scheme with Three Voltages for STT-MRAM. NANOARCH 2019: 1-6 - [c100]Chengzhi Wang, Deming Zhang, Lang Zeng, Kaili Zhang, Youguang Zhang, Weisheng Zhao:
Low-Power, High-Speed and High-Density Magnetic Non-Volatile SRAM Design with Voltage-Gated Spin-Orbit Torque. NANOARCH 2019: 1-6 - [e1]Houman Homayoun, Baris Taskin, Tinoosh Mohsenin, Weisheng Zhao:
Proceedings of the 2019 on Great Lakes Symposium on VLSI, GLSVLSI 2019, Tysons Corner, VA, USA, May 9-11, 2019. ACM 2019, ISBN 978-1-4503-6252-8 [contents] - [i12]Xiaotao Jia, Jianlei Yang, Pengcheng Dai, Runze Liu, Yiran Chen, Weisheng Zhao:
SPINBIS: Spintronics based Bayesian Inference System with Stochastic Computing. CoRR abs/1902.06886 (2019) - [i11]Runze Liu, Jianlei Yang, Yiran Chen, Weisheng Zhao:
eSLAM: An Energy-Efficient Accelerator for Real-Time ORB-SLAM on FPGA Platform. CoRR abs/1906.05096 (2019) - [i10]Xucheng Ye, Jianlei Yang, Pengcheng Dai, Yiran Chen, Weisheng Zhao:
Accelerating CNN Training by Sparsifying Activation Gradients. CoRR abs/1908.00173 (2019) - [i9]Ziyi Wang, Zhaohao Wang, Yansong Xu, Bi Wu, Weisheng Zhao:
Erase-hidden and Drivability-improved Magnetic Non-Volatile Flip-Flops with NAND-SPIN Devices. CoRR abs/1912.06986 (2019) - 2018
- [j45]He Zhang, Wang Kang, Youguang Zhang, Meng-Fan Chang, Weisheng Zhao:
A Full-Sensing-Margin Dual-Reference Sensing Scheme for Deeply-Scaled STT-RAM. IEEE Access 6: 64250-64260 (2018) - [j44]Weisheng Zhao, Xiaolu Gao, Heping Zhang:
Construction for Trees without vertices contained in all minimum dominating sets. Ars Comb. 138: 3-16 (2018) - [j43]Fan Wang, Weisheng Zhao:
Matchings extend to Hamiltonian cycles in 5-cube. Discuss. Math. Graph Theory 38(1): 217-231 (2018) - [j42]Weisheng Zhao, Heping Zhang:
Upper bounds on the bondage number of the strong product of a graph and a tree. Int. J. Comput. Math. 95(3): 511-527 (2018) - [j41]Weisheng Zhao, Fan Wang, Heping Zhang:
Construction for trees with unique minimum dominating sets. Int. J. Comput. Math. Comput. Syst. Theory 3(3): 204-213 (2018) - [j40]Yinglin Zhao, Jianlei Yang, Weisheng Zhao, Aida Todri-Sanial, Yuanqing Cheng:
Power Supply Noise Aware Task Scheduling on Homogeneous 3D MPSoCs Considering the Thermal Constraint. J. Comput. Sci. Technol. 33(5): 966-983 (2018) - [j39]Shaohua Yan, Zhiqiang Cao, Zongxia Guo, Zhenyi Zheng, Anni Cao, Yue Qi, Qunwen Leng, Weisheng Zhao:
Design and Fabrication of Full Wheatstone-Bridge-Based Angular GMR Sensors. Sensors 18(6): 1832 (2018) - [j38]Peng Ouyang, Shouyi Yin, Leibo Liu, Youguang Zhang, Weisheng Zhao, Shaojun Wei:
A Fast and Power-Efficient Hardware Architecture for Visual Feature Detection in Affine-SIFT. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3362-3375 (2018) - [c99]He Zhang, Wang Kang, Zhaohao Wang, Erya Deng, Youguang Zhang, Weisheng Zhao:
High-Density and Fast-Configuration Non-Volatile Look-Up Table Based on NAND-Like Spintronic Memory. APCCAS 2018: 382-385 - [c98]Menglin Han, Hao Cai, Jun Yang, Lirida A. B. Naviner, You Wang, Weisheng Zhao:
Stability and Variability Emphasized STT-MRAM Sensing Circuit With Performance Enhancement. APCCAS 2018: 386-389 - [c97]Chengzhi Wang, Deming Zhang, Lang Zeng, Jie Chen, Weisheng Zhao:
A Novel 15T-4MTJ based Non-volatile Ternary Content-Addressable Memory Cell for High-Speed, Low-Power and High-Reliable Search Operation. APCCAS 2018: 431-434 - [c96]Fan Chen, Zheng Li, Wang Kang, Weisheng Zhao, Hai Li, Yiran Chen:
Process variation aware data management for magnetic skyrmions racetrack memory. ASP-DAC 2018: 221-226 - [c95]Xiaotao Jia, Jianlei Yang, Zhaohao Wang, Yiran Chen, Hai Helen Li, Weisheng Zhao:
Spintronics based stochastic computing for efficient Bayesian inference system. ASP-DAC 2018: 580-585 - [c94]Wang Kang, Xing Chen, Daoqian Zhu, Sai Li, Yangqi Huang, Youguang Zhang, Weisheng Zhao:
Magnetic skyrmions for future potential memory and logic applications: Alternative information carriers. DATE 2018: 119-124 - [c93]Hao Cai, Menglin Han, You Wang, Lirida A. B. Naviner, Xinning Liu, Jun Yang, Weisheng Zhao:
Reliability Emphasized MTJ/CMOS Hybrid Circuit Towards Ultra-Low Power. DCIS 2018: 1-5 - [c92]Wenzhi Fu, Jianlei Yang, Pengcheng Dai, Yiran Chen, Weisheng Zhao:
A Scalable Pipelined Dataflow Accelerator for Object Region Proposals on FPGA Platform. FPT 2018: 346-349 - [c91]You Wang, Yue Zhang, Youguang Zhang, Weisheng Zhao, Hao Cai, Lirida A. B. Naviner:
Design Space Exploration of Magnetic Tunnel Junction based Stochastic Computing in Deep Learning. ACM Great Lakes Symposium on VLSI 2018: 403-408 - [c90]Hao Cai, You Wang, Wang Kang, Lirida A. B. Naviner, Weiwei Shan, Jun Yang, Weisheng Zhao:
Enabling Resilient Voltage-Controlled MeRAM Using Write Assist Techniques. ISCAS 2018: 1-5 - [c89]Bing Li, Fan Chen, Wang Kang, Weisheng Zhao, Yiran Chen, Hai Li:
Design and Data Management for Magnetic Racetrack Memory. ISCAS 2018: 1-4 - [c88]Chen Liu, Yuanqing Cheng, Ying Wang, Youguang Zhang, Weisheng Zhao:
NEAR: A Novel Energy Aware Replacement Policy for STT-MRAM LLCs. ISCAS 2018: 1-5 - [c87]Zhaohao Wang, Zuwei Li, Yang Liu, Simin Li, Liang Chang, Wang Kang, Youguang Zhang, Weisheng Zhao:
Progresses and challenges of spin orbit torque driven magnetization switching and application (Invited). ISCAS 2018: 1-5 - [c86]Bi Wang, Zhaohao Wang, Kaihua Cao, Youguang Zhang, Yuanfu Zhao, Weisheng Zhao:
Radiation hardening design for spin-orbit torque magnetic random access memory. ISCAS 2018: 1-4 - [c85]Hao Cai, You Wang, Wang Kang, Lirida A. B. Naviner, Xinning Liu, Jun Yang, Weisheng Zhao:
MRAM-on-FDSOI Integration: A Bit-Cell Perspective. ISVLSI 2018: 263-268 - [c84]Liuyang Zhang, Wang Kang, Hao Cai, Peng Ouyang, Lionel Torres, Youguang Zhang, Aida Todri-Sanial, Weisheng Zhao:
A Robust Dual Reference Computing-in-Memory Implementation and Design Space Exploration Within STT-MRAM. ISVLSI 2018: 275-280 - [c83]Bi Wu, Xiaolong Zhang, Yuanqing Cheng, Zhaohao Wang, Dijun Liu, Youguang Zhang, Weisheng Zhao:
Write Energy Optimization for STT-MRAM Cache with Data Pattern Characterization. ISVLSI 2018: 333-338 - [c82]Sai Li, Wang Kang, Xing Chen, Jinyu Bai, Biao Pan, Youguang Zhang, Weisheng Zhao:
Emerging Neuromorphic Computing Paradigms Exploring Magnetic Skyrmions. ISVLSI 2018: 539-544 - [c81]Chaoxin Ding, Wang Kang, He Zhang, Youguang Zhang, Weisheng Zhao:
A Novel Cross-point MRAM with Diode Selector Capable of High-Density, High-Speed, and Low-Power In-Memory Computation. NANOARCH 2018: 72-78 - [c80]Deming Zhang, Yanchun Hou, Chengzhi Wang, Jie Chen, Lang Zeng, Weisheng Zhao:
Hardware Acceleration Implementation of Sparse Coding Algorithm with Spintronic Devices. NANOARCH 2018: 79-85 - [c79]Wang Kang, Xing Chen, Daoqian Zhu, Xichao Zhang, Yan Zhou, Keni Qiu, Youguang Zhang, Weisheng Zhao:
A Comparative Study on Racetrack Memories: Domain Wall vs. Skyrmion. NVMSA 2018: 7-12 - [c78]Erya Deng, Zhaohao Wang, Wang Kang, Shaoqian Wei, Weisheng Zhao:
Multi-bit nonvolatile flip-flop based on NAND-like spin transfer torque MRAM. VLSI-SoC 2018: 184-187 - [i8]Jianlei Yang, Xueyan Wang, Qiang Zhou, Zhaohao Wang, Hai Li, Yiran Chen, Weisheng Zhao:
Exploiting Spin-Orbit Torque Devices as Reconfigurable Logic for Circuit Obfuscation. CoRR abs/1802.02789 (2018) - [i7]Wenzhi Fu, Jianlei Yang, Pengcheng Dai, Yiran Chen, Weisheng Zhao:
A Scalable Pipelined Dataflow Accelerator for Object Region Proposals on FPGA Platform. CoRR abs/1810.12137 (2018) - 2017
- [j37]Weisheng Zhao, Fan Wang, Xiaolu Gao, Hao Li:
Bondage number of the strong product of two trees. Discret. Appl. Math. 230: 133-145 (2017) - [j36]Wang Kang, Liang Chang, Zhaohao Wang, Weifeng Lv, Guangyu Sun, Weisheng Zhao:
Pseudo-Differential Sensing Framework for STT-MRAM: A Cross-Layer Perspective. IEEE Trans. Computers 66(3): 531-544 (2017) - [j35]Wang Kang, Tingting Pang, Weifeng Lv, Weisheng Zhao:
Dynamic Dual-Reference Sensing Scheme for Deep Submicrometer STT-MRAM. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(1): 122-132 (2017) - [j34]Hao Cai, You Wang, Lirida Alves de Barros Naviner, Weisheng Zhao:
Robust Ultra-Low Power Non-Volatile Logic-in-Memory Circuits in FD-SOI Technology. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(4): 847-857 (2017) - [c77]Jiaqi Wei, Liang Chang, Zhaohao Wang, Xiaoyang Lin, Kaihua Cao, Hushan Cui, Wang Kang, Haoxuan Chen, Lang Zeng, Youguang Zhang, Chao Zhao, Weisheng Zhao:
Ultrafast spintronic integrated circuits. ASICON 2017: 1021-1024 - [c76]Wang Kang, Liang Chang, Youguang Zhang, Weisheng Zhao:
Voltage-controlled MRAM for working memory: Perspectives and challenges. DATE 2017: 542-547 - [c75]Yuanzhuo Qu, Jie Han, Bruce F. Cockburn, Witold Pedrycz, Yue Zhang, Weisheng Zhao:
A true random number generator based on parallel STT-MTJs. DATE 2017: 606-609 - [c74]Hao Cai, You Wang, Lirida A. B. Naviner, Wang Kang, Weisheng Zhao:
Energy Efficient Magnetic Tunnel Junction Based Hybrid LSI Using Multi-Threshold UTBB-FD-SOI Device. ACM Great Lakes Symposium on VLSI 2017: 23-28 - [c73]Wang Kang, Zhaohao Wang, He Zhang, Sai Li, Youguang Zhang, Weisheng Zhao:
Advanced Low Power Spintronic Memories beyond STT-MRAM. ACM Great Lakes Symposium on VLSI 2017: 299-304 - [c72]Liang Chang, Zhaohao Wang, Alvin Oliver Glova, Jishen Zhao, Youguang Zhang, Yuan Xie, Weisheng Zhao:
PRESCOTT: Preset-based cross-point architecture for spin-orbit-torque magnetic random access memory. ICCAD 2017: 245-252 - [c71]Bi Wu, Yuanqing Cheng, Pengcheng Dai, Jianlei Yang, Youguang Zhang, Dijun Liu, Ying Wang, Weisheng Zhao:
Thermosiphon: A thermal aware NUCA architecture for write energy reduction of the STT-MRAM based LLCs. ICCAD 2017: 474-481 - [c70]Wang Kang, He Zhang, Peng Ouyang, Youguang Zhang, Weisheng Zhao:
Programmable Stateful In-Memory Computing Paradigm via a Single Resistive Device. ICCD 2017: 613-616 - [c69]Hao Cai, You Wang, Lirida A. B. Naviner, Weisheng Zhao:
Novel Pulsed-Latch Replacement in Non-Volatile Flip-Flop Core. ISVLSI 2017: 57-61 - [c68]Xiaowan Qin, Lang Zeng, Tianqi Gao, Deming Zhang, Mingzhi Long, Youguang Zhang, Weisheng Zhao:
Proposal for novel magnetic memory device with spin momentum locking materials. NANOARCH 2017: 45-46 - [c67]Zuodong Zhang, Lang Zeng, Tianqi Gao, Deming Zhang, Xiaowan Qin, Mingzhi Long, Youguang Zhang, Haiming Yu, Weisheng Zhao:
Frequency modulation of spin torque nano oscillator with voltage controlled magnetic anisotropy effect. NANOARCH 2017: 47-48 - [c66]Guanda Wang, Yue Zhang, Zhizhong Zhang, Jiang Nan, Zhenyi Zheng, Yu Wang, Lang Zeng, Youguang Zhang, Weisheng Zhao:
Compact modeling of high spin transfer torque efficiency double-barrier magnetic tunnel junction. NANOARCH 2017: 49-54 - [c65]Liang Chang, Zhaohao Wang, Youguang Zhang, Weisheng Zhao:
Reconfigurable processing in memory architecture based on spin orbit torque. NANOARCH 2017: 95-96 - [c64]Qi An, Sébastien Le Beux, Ian O'Connor, Jacques-Olivier Klein, Weisheng Zhao:
Arithmetic Logic Unit based on all-spin logic devices. NEWCAS 2017: 317-320 - [c63]Wenlong Cai, Kaihua Cao, Mengxing Wang, Shouzhong Peng, Jiaqi Zhou, Anni Cao, Boyu Zhang, Lezhi Wang, Yu Zhang, Jiaqi Wei, Xiaobin He, Hushan Cui, Chao Zhao, Weisheng Zhao:
Interfacial property tuning of heavy metal/CoFeB for large density STT-MRAM. NVMTS 2017: 1-4 - [i6]Xiaotao Jia, Jianlei Yang, Zhaohao Wang, Yiran Chen, Hai Li, Weisheng Zhao:
Spintronics based Stochastic Computing for Efficient Bayesian Inference System. CoRR abs/1711.01125 (2017) - 2016
- [j33]Weisheng Zhao, Heping Zhang:
The bondage number of the strong product of a complete graph with a path and a special starlike tree. Discret. Math. Algorithms Appl. 8(1): 1650006:1-1650006:14 (2016) - [j32]Yi Ran, Kang Wang, Youguang Zhang, Jacques-Olivier Klein, Weisheng Zhao:
Read disturbance issue and design techniques for nanoscale STT-MRAM. J. Syst. Archit. 71: 2-11 (2016) - [j31]You Wang, Hao Cai, Lirida A. B. Naviner, Xiaoxuan Zhao, Yue Zhang, Mariem Slimani, Jacques-Olivier Klein, Weisheng Zhao:
A process-variation-resilient methodology of circuit design by using asymmetrical forward body bias in 28 nm FDSOI. Microelectron. Reliab. 64: 26-30 (2016) - [j30]Wang Kang, Yangqi Huang, Xichao Zhang, Yan Zhou, Weisheng Zhao:
Skyrmion-Electronics: An Overview and Outlook. Proc. IEEE 104(10): 2040-2061 (2016) - [j29]Deming Zhang, Lang Zeng, Kaihua Cao, Mengxing Wang, Shouzhong Peng, Yue Zhang, Youguang Zhang, Jacques-Olivier Klein, Yu Wang, Weisheng Zhao:
All Spin Artificial Neural Networks Based on Compound Spintronic Synapse and Neuron. IEEE Trans. Biomed. Circuits Syst. 10(4): 828-836 (2016) - [j28]Jianlei Yang, Peiyuan Wang, Yaojun Zhang, Yuanqing Cheng, Weisheng Zhao, Yiran Chen, Hai (Helen) Li:
Radiation-Induced Soft Error Analysis of STT-MRAM: A Device to Circuit Approach. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(3): 380-393 (2016) - [j27]Yue Zhang, Chao Zhang, Jiang Nan, Zhizhong Zhang, Xueying Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Guangyu Sun, Weisheng Zhao:
Perspectives of Racetrack Memory for Large-Capacity On-Chip Memory: From Device to System. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(5): 629-638 (2016) - [j26]Bi Wu, Yuanqing Cheng, Jianlei Yang, Aida Todri-Sanial, Weisheng Zhao:
Temperature Impact Analysis and Access Reliability Enhancement for 1T1MTJ STT-RAM. IEEE Trans. Reliab. 65(4): 1755-1768 (2016) - [j25]Yuanqing Cheng, Aida Todri-Sanial, Jianlei Yang, Weisheng Zhao:
Alleviating Through-Silicon-Via Electromigration for 3-D Integrated Circuits Taking Advantage of Self-Healing Effect. IEEE Trans. Very Large Scale Integr. Syst. 24(11): 3310-3322 (2016) - [c62]Wang Kang, Tingting Pang, Bi Wu, Weifeng Lv, Youguang Zhang, Guangyu Sun, Weisheng Zhao:
PDS: pseudo-differential sensing scheme for STT-MRAM. DAC 2016: 120:1-120:6 - [c61]Lang Zeng, Deming Zhang, Youguang Zhang, Fanghui Gong, Tianqi Gao, Sa Tu, Haiming Yu, Weisheng Zhao:
Spin wave based synapse and neuron for ultra low power neuromorphic computation system. ISCAS 2016: 918-921 - [c60]Liuyang Zhang, Aida Todri-Sanial, Wang Kang, Youguang Zhang, Lionel Torres, Yuanqing Cheng, Weisheng Zhao:
Quantitative evaluation of reliability and performance for STT-MRAM. ISCAS 2016: 1150-1153 - [c59]He Zhang, Wang Kang, Tingting Pang, Weifeng Lv, Youguang Zhang, Weisheng Zhao:
Dual reference sensing scheme with triple steady states for deeply scaled STT-MRAM. NANOARCH 2016: 1-6 - [c58]Liang Chang, Zhaohao Wang, Yuqian Gao, Wang Kang, Youguang Zhang, Weisheng Zhao:
Evaluation of spin-Hall-assisted STT-MRAM for cache replacement. NANOARCH 2016: 73-78 - [c57]Erya Deng, Lorena Anghel, Guillaume Prenat, Weisheng Zhao:
Multi-context non-volatile content addressable memory using magnetic tunnel junctions. NANOARCH 2016: 103-108 - [c56]You Wang, Hao Cai, Lirida A. B. Naviner, Jacques-Olivier Klein, Jianlei Yang, Weisheng Zhao:
A novel circuit design of true random number generator using magnetic tunnel junction. NANOARCH 2016: 123-128 - [c55]Zhizhong Zhang, Yue Zhang, Lei Yue, Li Su, Yichuan Shi, Youguang Zhang, Weisheng Zhao:
Ultra-low power all spin logic device acceleration based on voltage controlled magnetic anisotropy. NANOARCH 2016: 141-142 - [c54]Qian Shi, Zhaohao Wang, Yuqian Gao, Liang Chang, Wang Kang, Youguang Zhang, Weisheng Zhao:
A spin Hall effect-based multi-level cell for MRAM. NANOARCH 2016: 143-144 - [c53]Deming Zhang, Lang Zeng, Youguang Zhang, Weisheng Zhao, Jacques-Olivier Klein:
Stochastic spintronic device based synapses and spiking neurons for neuromorphic computation. NANOARCH 2016: 173-178 - [c52]Hao Cai, You Wang, Lirida A. B. Naviner, Zhaohao Wang, Weisheng Zhao:
Approximate computing in MOS/spintronic non-volatile full-adder. NANOARCH 2016: 203-208 - [i5]Wang Kang, Yangqi Huang, Xichao Zhang, Yan Zhou, Weifeng Lv, Weisheng Zhao:
Skyrmions as Compact, Robust and Energy-Efficient Interconnects for Domain Wall (DW)-based Systems. CoRR abs/1601.03085 (2016) - [i4]Wang Kang, Chentian Zheng, Yangqi Huang, Xichao Zhang, Yan Zhou, Weifeng Lv, Weisheng Zhao:
Complementary Skyrmion Racetrack Memory with Voltage Manipulation. CoRR abs/1602.08799 (2016) - [i3]Yangqi Huang, Wang Kang, Xichao Zhang, Yan Zhou, Weisheng Zhao:
Magnetic skyrmion-based synaptic devices. CoRR abs/1608.07955 (2016) - 2015
- [j24]Jianping Ou, Weisheng Zhao:
On restricted edge connectivity of strong product graphs. Ars Comb. 123: 55-64 (2015) - [j23]Wang Kang, Liuyang Zhang, Weisheng Zhao, Jacques-Olivier Klein, Youguang Zhang, Dafine Ravelosona, Claude Chappert:
Yield and Reliability Improvement Techniques for Emerging Nonvolatile STT-MRAM. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(1): 28-39 (2015) - [j22]Djaafar Chabi, Weisheng Zhao, Damien Querlioz, Jacques-Olivier Klein:
On-Chip Universal Supervised Learning Methods for Neuro-Inspired Block of Memristive Nanodevices. ACM J. Emerg. Technol. Comput. Syst. 11(4): 34:1-34:20 (2015) - [j21]Wang Kang, Yue Zhang, Zhaohao Wang, Jacques-Olivier Klein, Claude Chappert, Dafine Ravelosona, Gefei Wang, Youguang Zhang, Weisheng Zhao:
Spintronics: Emerging Ultra-Low-Power Circuits and Systems beyond MOS Technology. ACM J. Emerg. Technol. Comput. Syst. 12(2): 16:1-16:42 (2015) - [j20]Mengxing Wang, Yue Zhang, Xiaoxuan Zhao, Weisheng Zhao:
Tunnel Junction with Perpendicular Magnetic Anisotropy: Status and Challenges. Micromachines 6(8): 1023-1045 (2015) - [j19]You Wang, Hao Cai, Lirida A. B. Naviner, Yue Zhang, Jacques-Olivier Klein, Weisheng Zhao:
Compact thermal modeling of spin transfer torque magnetic tunnel junction. Microelectron. Reliab. 55(9-10): 1649-1653 (2015) - [j18]Adrien F. Vincent, Jerome Larroque, Nicolas Locatelli, Nesrine Ben Romdhane, Olivier Bichler, Christian Gamrat, Weisheng Zhao, Jacques-Olivier Klein, Sylvie Galdin-Retailleau, Damien Querlioz:
Spin-Transfer Torque Magnetic Memory as a Stochastic Memristive Synapse for Neuromorphic Systems. IEEE Trans. Biomed. Circuits Syst. 9(2): 166-174 (2015) - [j17]Erya Deng, Yue Zhang, Wang Kang, Bernard Dieny, Jacques-Olivier Klein, Guillaume Prenat, Weisheng Zhao:
Synchronous 8-bit Non-Volatile Full-Adder based on Spin Transfer Torque Magnetic Tunnel Junction. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(7): 1757-1765 (2015) - [j16]Yiran Chen, Kiyoung Choi, Weisheng Zhao:
Guest Editorial for Special Issue on Emerging Memory Technologies - Modeling, Design, and Applications for Multi-Scale Computing. IEEE Trans. Multi Scale Comput. Syst. 1(3): 125-126 (2015) - [c51]Kaihua Cao, Heng Zhao, Mengxing Wang, Weisheng Zhao:
Spin orbit torques for ultra-low power computing. ASICON 2015: 1-4 - [c50]Bonan Yan, Yaojun Zhang, Enes Eken, Wujie Wen, Weisheng Zhao, Yiran Chen:
Recent progresses of STT memory design and applications. ASICON 2015: 1-4 - [c49]Chao Zhang, Guangyu Sun, Weiqi Zhang, Fan Mi, Hai Li, Weisheng Zhao:
Quantitative modeling of racetrack memory, a tradeoff among area, performance, and power. ASP-DAC 2015: 100-105 - [c48]Nicolas Locatelli, Adrien F. Vincent, Alice Mizrahi, Joseph S. Friedman, Damir Vodenicarevic, Joo-Von Kim, Jacques-Olivier Klein, Weisheng Zhao, Julie Grollier, Damien Querlioz:
Spintronic devices as key elements for energy-efficient neuroinspired architectures. DATE 2015: 994-999 - [c47]Guangyu Sun, Chao Zhang, Hehe Li, Yue Zhang, Weiqi Zhang, Yizi Gu, Yinan Sun, Jacques-Olivier Klein, Dafine Ravelosona, Yongpan Liu, Weisheng Zhao, Huazhong Yang:
From device to system: cross-layer design exploration of racetrack memory. DATE 2015: 1018-1023 - [c46]Bonan Yan, Zheng Li, Yaojun Zhang, Jianlei Yang, Hai Li, Weisheng Zhao, Pierre Chor-Fung Chia:
A High-Speed Robust NVM-TCAM Design Using Body Bias Feedback. ACM Great Lakes Symposium on VLSI 2015: 69-74 - [c45]Chao Zhang, Guangyu Sun, Xian Zhang, Weiqi Zhang, Weisheng Zhao, Tao Wang, Yun Liang, Yongpan Liu, Yu Wang, Jiwu Shu:
Hi-fi playback: tolerating position errors in shift operations of racetrack memory. ISCA 2015: 694-706 - [c44]Yue Zhang, Chao Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Guangyu Sun, Weisheng Zhao:
Perspectives of racetrack memory based on current-induced domain wall motion: From device to system. ISCAS 2015: 381-384 - [c43]Nicolas Locatelli, Damir Vodenicarevic, Weisheng Zhao, Jacques-Olivier Klein, Julie Grollier, Damien Querlioz:
Vortex-based spin transfer oscillator compact model for IC design. ISCAS 2015: 589-592 - [c42]Zheng Li, Bonan Yan, Lun Yang, Weisheng Zhao, Yiran Chen, Hai Li:
A new self-reference sensing scheme for TLC MRAM. ISCAS 2015: 593-596 - [c41]Lun Yang, Yuanqing Cheng, Yuhao Wang, Hao Yu, Weisheng Zhao, Aida Todri-Sanial:
A body-biasing of readout circuit for STT-RAM with improved thermal reliability. ISCAS 2015: 1530-1533 - [c40]Deming Zhang, Lang Zeng, Yuanzhuo Qu, Youguang Zhang, Mengxing Wang, Weisheng Zhao, Tianqi Tang, Yu Wang:
Energy-efficient neuromorphic computation based on compound spin synapse with stochastic learning. ISCAS 2015: 1538-1541 - [c39]Liuyang Zhang, Wang Kang, Youguang Zhang, Yuanqing Cheng, Lang Zeng, Jacques-Olivier Klein, Weisheng Zhao:
Channel Modeling and Reliability Enhancement Design Techniques for STT-MRAM. ISVLSI 2015: 461-466 - [c38]Bi Wu, Yuanqing Cheng, Ying Wang, Aida Todri-Sanial, Guangyu Sun, Lionel Torres, Weisheng Zhao:
An architecture-level cache simulation framework supporting advanced PMA STT-MRAM. NANOARCH 2015: 7-12 - [c37]Erya Deng, You Wang, Zhaohao Wang, Jacques-Olivier Klein, Bernard Dieny, Guillaume Prenat, Weisheng Zhao:
Robust magnetic full-adder with voltage sensing 2T/2MTJ cell. NANOARCH 2015: 27-32 - [c36]Qi An, Li Su, Jacques-Olivier Klein, Sébastien Le Beux, Ian O'Connor, Weisheng Zhao:
Full-adder circuit design based on all-spin logic device. NANOARCH 2015: 163-168 - [c35]Lirida Alves de Barros Naviner, Hao Cai, You Wang, Weisheng Zhao, Arwa Ben Dhia:
Stochastic computation with Spin Torque Transfer Magnetic Tunnel Junction. NEWCAS 2015: 1-4 - [c34]Yi Ran, Wang Kang, Youguang Zhang, Jacques-Olivier Klein, Weisheng Zhao:
Read disturbance issue for nanoscale STT-MRAM. NVMSA 2015: 1-6 - [c33]Tingting Pang, Wang Kang, Yi Ran, Youguang Zhang, Weifeng Lv, Weisheng Zhao:
Nonvolatile radiation hardened DICE latch. NVMTS 2015: 1-4 - [c32]Deming Zhang, Lang Zeng, Fanghui Gong, Tianqi Gao, Shaolong Gao, Youguang Zhang, Weisheng Zhao:
Realization of neural coding by stochastic switching of magnetic tunnel junction. NVMTS 2015: 1-4 - 2014
- [j15]Weisheng Zhao, Jianping Ou:
On restricted edge-connectivity of lexicographic product graphs. Int. J. Comput. Math. 91(8): 1618-1626 (2014) - [j14]Djaafar Chabi, Damien Querlioz, Weisheng Zhao, Jacques-Olivier Klein:
Robust learning approach for neuro-inspired nanoscale crossbar architecture. ACM J. Emerg. Technol. Comput. Syst. 10(1): 5:1-5:20 (2014) - [j13]Weisheng Zhao, Jean-Michel Portal, Wang Kang, Mathieu Moreau, Yue Zhang, Hassen Aziza, Jacques-Olivier Klein, Zhaohao Wang, Damien Querlioz, Damien Deleruyelle, Marc Bocquet, Dafine Ravelosona, Christophe Muller, Claude Chappert:
Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells. J. Parallel Distributed Comput. 74(6): 2484-2496 (2014) - [j12]You Wang, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Lirida A. B. Naviner, Weisheng Zhao:
Compact model of magnetic tunnel junction with stochastic spin transfer torque switching for reliability analyses. Microelectron. Reliab. 54(9-10): 1774-1778 (2014) - [j11]Weisheng Zhao, Mathieu Moreau, Erya Deng, Yue Zhang, Jean-Michel Portal, Jacques-Olivier Klein, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Damien Querlioz, Nesrine Ben Romdhane, Dafine Ravelosona, Claude Chappert:
Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(2): 443-454 (2014) - [j10]Djaafar Chabi, Weisheng Zhao, Erya Deng, Yue Zhang, Nesrine Ben Romdhane, Jacques-Olivier Klein, Claude Chappert:
Ultra Low Power Magnetic Flip-Flop Based on Checkpointing/Power Gating and Self-Enable Mechanisms. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(6): 1755-1765 (2014) - [c31]Wang Kang, Weisheng Zhao, Zhaohao Wang, Jacques-Olivier Klein, Yue Zhang, Djaafar Chabi, Youguang Zhang, Dafine Ravelosona, Claude Chappert:
An overview of spin-based integrated circuits. ASP-DAC 2014: 676-683 - [c30]Yue Zhang, Weisheng Zhao, Jacques-Olivier Klein, Wang Kang, Damien Querlioz, Youguang Zhang, Dafine Ravelosona, Claude Chappert:
Spintronics for low-power computing. DATE 2014: 1-6 - [c29]Zhaohao Wang, Weisheng Zhao, Wang Kang, Youguang Zhang, Jacques-Olivier Klein, Claude Chappert:
Ferroelectric tunnel memristor-based neuromorphic network with 1T1R crossbar architecture. IJCNN 2014: 29-34 - [c28]Adrien F. Vincent, Jerome Larroque, Weisheng Zhao, Nesrine Ben Romdhane, Olivier Bichler, Christian Gamrat, Jacques-Olivier Klein, Sylvie Galdin-Retailleau, Damien Querlioz:
Spin-transfer torque magnetic memory as a stochastic memristive synapse. ISCAS 2014: 1074-1077 - [c27]Djaafar Chabi, Zhaohao Wang, Weisheng Zhao, Jacques-Olivier Klein:
On-chip supervised learning rule for ultra high density neural crossbar using memristor for synapse and neuron. NANOARCH 2014: 7-12 - [c26]Nesrine Ben Romdhane, Weisheng Zhao, Yue Zhang, Jacques-Olivier Klein, Z. R. Wang, Dafine Ravelosona:
Design and analysis of Racetrack memory based on magnetic domain wall motion in nanowires. NANOARCH 2014: 71-76 - [c25]Wang Kang, Weisheng Zhao, Lun Yang, Jacques-Olivier Klein, Youguang Zhang, Dafine Ravelosona:
One-step majority-logic-decodable codes enable STT-MRAM for high speed working memories. NVMSA 2014: 1-6 - 2013
- [j9]Li Zhang, Weisheng Zhao, Yiqi Zhuang, Junlin Bao, Hualian Tang, Cong Li, Xin Xiang:
Design and analysis of the reference cells for STT-MRAM. IEICE Electron. Express 10(12): 20130352 (2013) - [j8]Wang Kang, Weisheng Zhao, Zhaohao Wang, Yue Zhang, Jacques-Olivier Klein, Youguang Zhang, Claude Chappert, Dafine Ravelosona:
A low-cost built-in error correction circuit design for STT-MRAM reliability improvement. Microelectron. Reliab. 53(9-11): 1224-1229 (2013) - [j7]Olivier Bichler, Weisheng Zhao, Fabien Alibart, Stéphane Pleutin, Stéphane Lenfant, Dominique Vuillaume, Christian Gamrat:
Pavlov's Dog Associative Learning Demonstrated on Synaptic-Like Organic Transistors. Neural Comput. 25(2): 549-566 (2013) - [j6]Hong-Phuc Trinh, Weisheng Zhao, Jacques-Olivier Klein, Yue Zhang, Dafine Ravelosona, Claude Chappert:
Magnetic Adder Based on Racetrack Memory. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(6): 1469-1477 (2013) - [c24]Jean-Michel Portal, Mathieu Moreau, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao:
Analytical study of complementary memristive synchronous logic gates. NANOARCH 2013: 70-75 - [c23]Djaafar Chabi, Weisheng Zhao, Yue Zhang, Jacques-Olivier Klein, Claude Chappert:
Low power magnetic flip-flop based on checkpointing and self-enable mechanism. NEWCAS 2013: 1-4 - [c22]Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao, Mathieu Moreau, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller:
Synchronous full-adder based on complementary resistive switching memory cells. NEWCAS 2013: 1-4 - [c21]Weisheng Zhao, Guillaume Prenat, Jacques-Olivier Klein, Bernard Dieny, Claude Chappert, Dafine Ravelosona:
Emerging hybrid logic circuits based on non-volatile magnetic memories. NEWCAS 2013: 1-4 - [c20]Weisheng Zhao, Jacques-Olivier Klein, Zhaohao Wang, Yue Zhang, Nesrine Ben Romdhane, Damien Querlioz, Dafine Ravelosona, Claude Chappert:
Spin-electronics based logic fabrics. VLSI-SoC 2013: 174-179 - [i2]Olivier Bichler, Weisheng Zhao, Fabien Alibart, Stéphane Pleutin, Stéphane Lenfant, Dominique Vuillaume, Christian Gamrat:
Pavlov's dog associative learning demonstrated on synaptic-like organic transistors. CoRR abs/1302.3261 (2013) - 2012
- [j5]Weisheng Zhao, Yue Zhang, Thibaut Devolder, Jacques-Olivier Klein, Dafine Ravelosona, Claude Chappert, Pascale Mazoyer:
Failure and reliability analysis of STT-MRAM. Microelectron. Reliab. 52(9-10): 1848-1852 (2012) - [c19]Weisheng Zhao, Damien Querlioz, Jacques-Olivier Klein, Djaafar Chabi, Claude Chappert:
Nanodevice-based novel computing paradigms and the neuromorphic approach. ISCAS 2012: 2509-2512 - [c18]Yahya Lakys, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert:
MRAM crossbar based configurable logic block. ISCAS 2012: 2945-2948 - [c17]Weisheng Zhao, Yue Zhang, Jacques-Olivier Klein, Damien Querlioz, Djaafar Chabi, Dafine Ravelosona, Claude Chappert, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller:
Crossbar architecture based on 2R complementary resistive switching memory cell. NANOARCH 2012: 85-92 - [c16]Damien Querlioz, Weisheng Zhao, Philippe Dollfus, Jacques-Olivier Klein, Olivier Bichler, Christian Gamrat:
Bioinspired networks with nanoscale memristive devices that combine the unsupervised and supervised learning approaches. NANOARCH 2012: 203-210 - [i1]Weisheng Zhao, Sumanta Chaudhuri, Celso Accoto, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer:
Cross-point architecture for spin transfer torque magnetic random access memory. CoRR abs/1202.1782 (2012) - 2011
- [j4]Weisheng Zhao, Thibaut Devolder, Yahya Lakys, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer:
Design considerations and strategies for high-reliable STT-MRAM. Microelectron. Reliab. 51(9-11): 1454-1458 (2011) - [j3]Si-Yu Liao, Jean-Marie Retrouvey, Guillaume Agnus, Weisheng Zhao, Cristell Maneux, Sébastien Fregonese, Thomas Zimmer, Djaafar Chabi, Arianna Filoramo, Vincent Derycke, Christian Gamrat, Jacques-Olivier Klein:
Design and Modeling of a Neuro-Inspired Learning Circuit Using Nanotube-Based Memory Devices. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(9): 2172-2181 (2011) - [c15]Yahya Lakys, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert:
Magnetic Look-Up Table (MLUT) Featuring Radiation Hardness, High Performance and Low Power. ARC 2011: 275-280 - [c14]Lionel Torres, Weisheng Zhao:
Magnetic memory (MRAM), a new area for 2D and 3D SoC/SiP design. ACM Great Lakes Symposium on VLSI 2011: 429-430 - [c13]Weisheng Zhao, Lionel Torres, Yoann Guillemenet, Luis Vitório Cargnini, Yahya Lakys, Jacques-Olivier Klein, Dafine Ravelosona, Gilles Sassatelli, Claude Chappert:
Design of MRAM based logic circuits and its applications. ACM Great Lakes Symposium on VLSI 2011: 431-436 - [c12]Djaafar Chabi, Weisheng Zhao, Damien Querlioz, Jacques-Olivier Klein:
Robust neural logic block (NLB) based on memristor crossbar array. NANOARCH 2011: 137-143 - [c11]Weisheng Zhao, Lionel Torres, Luis Vitório Cargnini, Raphael Martins Brum, Yue Zhang, Yoann Guillemenet, Gilles Sassatelli, Yahya Lakys, Jacques-Olivier Klein, Daniel Etiemble, Dafine Ravelosona, Claude Chappert:
High Performance SoC Design Using Magnetic Logic and Memory. VLSI-SoC (Selected Papers) 2011: 10-33 - [c10]Weisheng Zhao, Yue Zhang, Yahya Lakys, Jacques-Olivier Klein, Daniel Etiemble, D. Revelosona, Claude Chappert, Lionel Torres, Luis Vitório Cargnini, Raphael Martins Brum, Yoann Guillemenet, Gilles Sassatelli:
Embedded MRAM for high-speed computing. VLSI-SoC 2011: 37-42 - 2010
- [c9]Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer:
High Density Asynchronous LUT Based on Non-volatile MRAM Technology. FPL 2010: 374-379 - [c8]Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer:
Design of embedded MRAM macros for memory-in-logic applications. ACM Great Lakes Symposium on VLSI 2010: 155-158 - [c7]Olivier Bichler, Weisheng Zhao, Christian Gamrat, Fabien Alibart, Stéphane Pleutin, Dominique Vuillaume:
Development of a functional model for the Nanoparticle-Organic Memory transistor. ISCAS 2010: 1663-1666 - [c6]Guillaume Agnus, Arianna Filoramo, Jean-Philippe Bourgoin, Vincent Derycke, Weisheng Zhao:
Carbon nanotube-based programmable devices for adaptive architectures. ISCAS 2010: 1667-1670
2000 – 2009
- 2009
- [j2]Weisheng Zhao, Eric Belhaire, Claude Chappert, Pascale Mazoyer:
Spin transfer torque (STT)-MRAM-based runtime reconfiguration FPGA circuit. ACM Trans. Embed. Comput. Syst. 9(2): 14:1-14:16 (2009) - [j1]Weisheng Zhao, Eric Belhaire, Claude Chappert, Bernard Dieny, Guillaume Prenat:
TAS-MRAM-Based Low-Power High-Speed Runtime Reconfiguration (RTR) FPGA. ACM Trans. Reconfigurable Technol. Syst. 2(2): 8:1-8:19 (2009) - [c5]Weisheng Zhao, Christian Gamrat, Yves Lhuillier:
Nanocomputing Block based Multi-Context FPGA. ERSA 2009: 297-298 - [c4]Weisheng Zhao, Guillaume Agnus, Vincent Derycke, Arianna Filoramo, Christian Gamrat, Jean-Philippe Bourgoin:
Functional Model of Carbon Nanotube Programmable Resistors for Hybrid Nano/CMOS Circuit Design. NanoNet 2009: 105-110 - 2008
- [c3]Weisheng Zhao, Eric Belhaire, Claude Chappert, Pascale Mazoyer:
Spintronic Device Based Non-volatile Low Standby Power SRAM. ISVLSI 2008: 40-45 - 2007
- [c2]Weisheng Zhao, Eric Belhaire, Bernard Dieny, Guillaume Prenat, Claude Chappert:
TAS-MRAM based Non-volatile FPGA logic circuit. FPT 2007: 153-160 - [c1]Guillaume Prenat, Mourad El Baraji, Wei Guo, Ricardo Sousa, Liliana Buda-Prejbeanu, Bernard Dieny, Virgile Javerliac, Jean-Pierre Nozieres, Weisheng Zhao, Eric Belhaire:
CMOS/Magnetic Hybrid Architectures. ICECS 2007: 190-193
Coauthor Index
[j113] [j111] [j106] [c160] [j96] [j86] [j84] [c146] [c142] [c140] [c139] [c137] [i19] [j68] [c126] [c125] [j58] [j55] [c116] [c113] [c111] [c110] [c106] [c103] [j45] [c99] [c96] [c94] [c90] [c89] [c87] [c85] [c84] [c82] [c81] [c79] [c78] [j36] [j35] [c77] [c76] [c74] [c73] [c70] [j32] [j30] [c62] [c60] [c59] [c58] [c54] [i5] [i4] [i3] [j23] [j21] [j17] [c39] [c34] [c33] [j13] [c31] [c30] [c29] [c25] [j8]
[j53] [c64] [j32] [j31] [j29] [j27] [c56] [c53] [j23] [j22] [j21] [j19] [j18] [j17] [c48] [c47] [c44] [c43] [c39] [c37] [c36] [c34] [j14] [j13] [j12] [j11] [j10] [c31] [c30] [c29] [c28] [c27] [c26] [c25] [j8] [j6] [c24] [c23] [c22] [c21] [c20] [j5] [c19] [c18] [c17] [c16] [i1] [j4] [j3] [c15] [c13] [c12] [c11] [c10] [c9] [c8]
Lirida A. B. Naviner
aka: Lirida Alves de Barros Naviner
aka: Lirida Alves de Barros Naviner
[j107] [c160] [j103] [j99] [j98] [c148] [j86] [c144] [i23] [j78] [j77] [c135] [c133] [j68] [j63] [j62] [c121] [c119] [j57] [j54] [j53] [j50] [j47] [j46] [c114] [c108] [c107] [c106] [i9] [c99] [c95] [c87] [c86] [c83] [c78] [i8] [j36] [c77] [c73] [c72] [c65] [i6] [c58] [c54] [c52] [j21] [c37] [j13] [c31] [c29] [c27] [j8] [c20]
[j114] [j112] [j105] [c161] [c159] [c158] [c155] [i31] [i30] [i29] [i28] [j103] [j98] [c151] [i27] [i26] [i25] [j89] [j88] [j87] [c145] [i24] [i23] [i22] [j75] [c141] [c129] [i21] [i20] [i18] [i17] [j71] [j69] [j66] [j64] [j63] [j62] [c128] [c127] [c122] [c119] [i16] [i15] [i14] [i13] [j54] [c115] [c111] [c110] [c106] [i12] [i11] [i10] [j40] [c95] [c92] [i8] [i7] [c71] [i6] [j28] [j26] [j25] [c56] [c46]
[j107] [j105] [j103] [j99] [i23] [c140] [c135] [c134] [j73] [j72] [j68] [j62] [c125] [c124] [c121] [c120] [c119] [j57] [j55] [j53] [j50] [j47] [j46] [c114] [c112] [c111] [c110] [c109] [c108] [c106] [c105] [c104] [c102] [c101] [c100] [j45] [j38] [c99] [c94] [c91] [c88] [c87] [c86] [c84] [c83] [c82] [c81] [c79] [c77] [c76] [c73] [c72] [c71] [c70] [c68] [c67] [c66] [c65] [j32] [j29] [c62] [c61] [c60] [c59] [c58] [c55] [c54] [c53] [j23] [j21] [c40] [c39] [c34] [c33] [c32] [c31] [c30] [c29] [c25] [j8]
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