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Douglas Pastorello

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2000 – 2009

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2006
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Michael H. Perrott, Yunteng Huang, Rex T. Baird, Bruno W. Garlepp, Douglas Pastorello, Eric T. King, Qicheng Yu, Dan B. Kasha, Philip Steiner, Ligang Zhang, Jerrell P. Hein, Bruce Del Signore:
A 2.5-Gb/s Multi-Rate 0.25-$\mu$m CMOS Clock and Data Recovery Circuit Utilizing a Hybrid Analog/Digital Loop Filter and All-Digital Referenceless Frequency Acquisition. IEEE J. Solid State Circuits 41(12): 2930-2944 (2006)

1980 – 1989

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1989
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Jeffrey R. Fox, Douglas Pastorello:
The role of synthesis in an ASIC design environment. ICCD 1989: 249-254

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