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ORCIDFan Yang 0001
Person information
- affiliation: Fudan University, State Key Lab of ASIC & System, School of Microelectronics, Shanghai, China
Other persons with the same name
- Fan Yang — disambiguation page
- Fan Yang 0002 — Cornell University, Ithaca, NY, USA
- Fan Yang 0003 — FernUniversität Hagen, Faculty of Mathematics and Computer Science, Germany (and 1 more)
- Fan Yang 0004
![[0000-0003-0392-6522]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0003-0392-6522")
— Utrecht University, The Netherlands (and 2 more) - Fan Yang 0005 — Tsinghua University, Department of Automation, Beijing, China (and 1 more)
- Fan Yang 0006 — Hong Kong University of Science and Technology, Department of Electronic and Computer Engineering, Clear Water Bay, Hong Kong
- Fan Yang 0007 — Beihang University, School of Biological Science and Medical Engineering, Beijing, China
- Fan Yang 0008 — Tongji University, School of Aerospace Engineering and Applied Mechanics, Shanghai, China (and 1 more)
- Fan Yang 0009 — Zhejiang Sci-Tech University, Department of Mathematics, Hangzhou, China
- Fan Yang 0010 — Xiamen University, Department of Automation, China
- Fan Yang 0011 — Huangshan University, School of Information and Engineering, Huangshan City, China
- Fan Yang 0012 — Southeast University, Instrument and Meter Engineering, Nanjing, China
- Fan Yang 0013 — New York University Shanghai, Economics Area, China (and 1 more)
- Fan Yang 0014 — Nantong University, School of Geographical Sciences, China (and 1 more)
- Fan Yang 0015 — University of Chicago, Department of Computer Science, IL, USA
- Fan Yang 0016 — University of Maryland, College Park, MD, USA
- Fan Yang 0017 — University of Paris-Saclay, France
- Fan Yang 0018 — University of Birmingham, UK
- Fan Yang 0019 — University Bourgogne Franche-Comté, CNRS, Arts et Métiers, Dijon, France (and 1 more)
- Fan Yang 0020 — Space Engineering University, Beijing, China
- Fan Yang 0021 — Chongqing University, College of Communication Engineering, Chongqing Engineering Laboratory of High Performance Integrated Circuits, China
- Fan Yang 0022 — Nuance Communications, Inc. (and 1 more)
- Fan Yang 0023 — Wake Forest University, Department of Computer Science, Winston-Salem, NC, USA (and 3 more)
- Fan Yang 0024 — Microsoft Research Asia, Beijing, China (and 1 more)
- Fan Yang 0025 — Wuhan University of Science and Technology, City College, China (and 1 more)
- Fan Yang 0026 — Lanzhou University of Technology, School of Science, China (and 1 more)
- Fan Yang 0027 — Tsinghua University, Department of Electronic Engineering, TNList, Beijing, China (and 2 more)
- Fan Yang 0028 — Wuhan University, State Key Laboratory of Information Engineering in Surveying, Mapping and Remote Sensing, China (and 1 more)
- Fan Yang 0029 — China University of Geosciences Beijing, School of Earth Sciences and Resources, China (and 1 more)
- Fan Yang 0030 — Huaqiao University, College of Mechanical Engineering and Automation, Xiamen, China (and 1 more)
- Fan Yang 0031 — Chongqing University of Technology, School of Electrical and Electronic Engineering, China
- Fan Yang 0032 — Nara Institute of Science and Technology, Division of Information Science, Japan
- Fan Yang 0033 — Xi'an Jiaotong University, China (and 2 more)
- Fan Yang 0034 — Zhongnan University of Economics and Law, School of Information and Safety Engineering, Wuhan, China (and 1 more)
- Fan Yang 0035 — Temple University, Department of Computer and Information Sciences, Philadelphia, PA, USA
- Fan Yang 0036 — Beijing Jiaotong University, School of Electronic and Information Engineering, China
- Fan Yang 0037 — Hubei Technology of University, School of Computer Science, Wuhan, China
- Fan Yang 0038 — University of Tokyo, Japan
- Fan Yang 0039 — Jiangxi University of Finance and Economics, School of Software and Internet of Things Engineering, Nanchang, China
- Fan Yang 0040 — Northwestern Polytechnical University, School of Computer Science and Engineering, Xi'an, China
- Fan Yang 0041 — Nanjing University of Aeronautics and Astronautics, College of Aerospace Engineering / State Key Laboratory of Mechanics and Control of Mechanical Structures, China (and 1 more)
- Fan Yang 0042 — Jiangxi Science and Technology Normal University, School of Communications and Electronics, Nanchang, China
- Fan Yang 0043 — Xiamen University, School of Informatics, China
- Fan Yang 0044 — Central South University of Forestry and Technology, School of Computer and Information Engineering, Changsha, China (and 1 more)
- Fan Yang 0045 — Chongqing University, School of Electrical Engineering, State Key Laboratory of Power Transmission Equipment and System Security and New Technology, China
- Fan Yang 0046 — Beijing University of Posts and Telecommunications, State Key Laboratory of Networking and Switching Technology, China
- Fan Yang 0047 — Beijing University of Posts and Telecommunications, MoE Key Laboratory of Universal Wireless Communications, China
- Fan Yang 0048 — Xi'an University of Posts and Telecommunications, School of Communication and Information, China
- Fan Yang 0049 — Chinese Academy of Science, Institute of Computing Technology, Beijing, China
- Fan Yang 0050 — Monash University, Faculty of Business and Economics, Melbourne, VIC, Australia
- Fan Yang 0051 — imec-DistriNet, KU Leuven, Belgium
- Fan Yang 0052 — State Grid Hubei Electric Power Company, Electric Power Research Institute, Wuhan, China
- Fan Yang 0053 — Peking University, National Engineering Laboratory for Video Technology, Beijing, China
- Fan Yang 0054 — Inception Institute of Artificial Intelligence, Abu Dhabi, UAE (and 2 more)
- Fan Yang 0055 — University of British Columbia, School of Engineering, Kelowna, BC, Canada (and 1 more)
- Fan Yang 0056 — Southeast University, School of Information Science and Engineering, National Mobile Communications Research Laboratory, Nanjing, China (and 1 more)
- Fan Yang 0057 — State University of New York at Buffalo, NY, USA
- Fan Yang 0058 — Carnegie Mellon University, Pittsburgh, PA, USA
- Fan Yang 0059 — DeepCode Robotics Co. Ltd. (and 1 more)
- Fan Yang 0060 — Avago Technologies, San Jose, CA, USA (and 2 more)
- Fan Yang 0061 — Wuhan University, LIEMARS, China
- Fan Yang 0062 — Beihang University, College of Software, Beijing, China
- Fan Yang 0063 — Hefei University of Technology, School of Computer and Information, China
- Fan Yang 0064 — Southwest University, College of Electronic and Information Engineering, Chongqing Key Laboratory of Nonlinear Circuits and Intelligent Information Processing, Chongqing, China
- Fan Yang 0065 — Guangxi University of Science and Technology, School of Computer Science and Communication Engineering, Liuzhou, China (and 1 more)
- Fan Yang 0066 — Hebei University of Technology, School of Electronic and Information Engineering, China
- Fan Yang 0067 — Jiangsu Normal University, School of Mathematics and Statistics, Xuzhou, China (and 1 more)
- Fan Yang 0068 — Shandong University, Cheeloo College of Medicine, School of Public Health, Department of Epidemiology and Biostatistics, Jinan, China
- Fan Yang 0069 — University of Electronic Science and Technology of China, School of Information and Communication Engineering, Chengdu, China (and 1 more)
- Fan Yang 0070 — Huazhong University of Science and Technology, School of Electrical and Electronic Engineering, State Key Laboratory of Advanced Electromagnetic Engineering and Technology, Wuhan, China
- Fan Yang 0071 — Nanjing University of Finance and Economics, College of Information Engineering, China
- Fan Yang 0072 — Beijing University of Posts and Telecommunications, MOE Key Laboratory of Universal Wireless Communications, China
- Fan Yang 0073 — Southwest Petroleum University, School of Electrical Engineering and Information, Chengdu, China
- Fan Yang 0074 — Jiangsu University of Science and Technology, Department of Mathematics and Physics, Zhenjiang, China (and 1 more)
- Fan Yang 0075 — University of Houston, Department of Computer Science, TX, USA
- Fan Yang 0076 — eBay Inc., San Jose, CA, USA
- Fan Yang 0077 — Peking University, Institute of Microelectronics, MOE Key Laboratory of Microelectronic Devices and Circuits, Beijing, China
- Fan Yang 0078 — Beijing University of Posts and Telecommunications, Pattern Recognition and Intelligent Vision Laboratory, China
- Fan Yang 0079 — Beihang University, School of Reliability and Systems Engineering, Science and Technology on Reliability and Environmental Engineering Laboratory, Beijing, China
- Fan Yang 0080 — Carnegie Mellon University, PA, USA
- Fan Yang 0081 — Tencent AI Lab
- Fan Yang 0082 — South China University of Technology, Guangzhou, China
- Fan Yang 0083 — Tsinghua University, School of Software, Beijing, China
- Fan Yang 0084 — Amazon.com
- Fan Yang 0085 — Shandong University, Data Science Institute, School of Mathematics, Jinan, China
- Fan Yang 0086 — Tsinghua University, Department of Electronic Engineering, Shenzhen International Graduate School, China
- Fan Yang 0087 — Meituan-Dianping Group, Beijing, China (and 1 more)
- Fan Yang 0088 — Huazhong University of Science and Technology, HUST, School of Artificial Intelligence and Automation, Wuhan, Hubei, China
- Fan Yang 0089 — SenseTime Research
- Fan Yang 0090 — University of Illinois Urbana-Champaign, IL, USA
- Fan Yang 0091 — Chinese University of Hong Kong, Department of Computer Science and Engineering, Hong Kong
- Fan Yang 0092 — ETH Zurich, Robotic Systems Lab, Switzerland (and 1 more)
- Fan Yang 0093 — Nankai University, Tianjin, China
- Fan Yang 0094 — KuaiShou Inc., Beijing, China
- Fan Yang 0095 — University of Technology Sydney, Australia
- Fan Yang 0096 — CAS, Institute of Computing Technology, Beijing, China (and 1 more)
- Fan Yang 0097 — University of Electronic Science and Technology of China, School of Information and Communication Engineering, Chengdu, China (and 1 more)
- Fan Yang 0098 — Beijing Institute of Technology, School of Mechanical Engineering, China
- Fan Yang 0099 — Harbin University of Science and Technology, Electrical and Electronic Engineering Department, China (and 1 more)
Other persons with a similar name
- Yang Fan Chiang
- Yang Fan
- Yang-Hang Fan
- Yang-Hsin Fan
- Fengfan Yang (aka: Feng-fan Yang)
- HaoFan Yang (aka: Hao-Fan Yang) — La Trobe University, Department of Computer Science and Information Technology, Melbourne, VIC, Australia (and 1 more)
- Qi-Fan Yang
- Yifan Yang (aka: Yi-Fan Yang) — disambiguation page
- Shys-Fan Yang-Mao
- Fan Yang-Turner
- show all similar names
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2020 – today
- 2024
[j47]Zhenyu Xu, Hailin Xu, Zhouyang Lu, Yingying Zhao, Rui Zhu, Yujiang Wang, Mingzhi Dong, Yuhu Chang, Qin Lv, Robert P. Dick, Fan Yang, Tun Lu, Ning Gu, Li Shang:
Can Large Language Models Be Good Companions?: An LLM-Based Eyewear System with Conversational Common Ground. Proc. ACM Interact. Mob. Wearable Ubiquitous Technol. 8(2): 87:1-87:41 (2024)- [j46]Tianchen Gu, Wangzhen Li, Aidong Zhao, Zhaori Bi, Xudong Li, Fan Yang, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng:
BBGP-sDFO: Batch Bayesian and Gaussian Process Enhanced Subspace Derivative Free Optimization for High-Dimensional Analog Circuit Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(2): 417-430 (2024) - [j45]Binwu Zhu, Su Zheng, Ziyang Yu, Guojin Chen, Yuzhe Ma, Fan Yang, Bei Yu, Martin D. F. Wong:
L2O-ILT: Learning to Optimize Inverse Lithography Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(3): 944-955 (2024) - [j44]Lihao Liu, Fan Yang, Li Shang, Xuan Zeng:
GNN-Cap: Chip-Scale Interconnect Capacitance Extraction Using Graph Neural Network. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(4): 1206-1217 (2024) - [j43]Xuyang Zhao, Tianning Gao, Aidong Zhao, Zhaori Bi, Changhao Yan, Fan Yang, Sheng-Guo Wang, Dian Zhou, Xuan Zeng:
ROI-HIT: Region of Interest-Driven High-Dimensional Microarchitecture Design Space Exploration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(11): 4178-4189 (2024) - [j42]Nanlin Guo, Fulin Peng, Jiahe Shi, Fan Yang, Jun Tao, Xuan Zeng:
Yield Optimization for Analog Circuits over Multiple Corners via Bayesian Neural Networks: Enhancing Circuit Reliability under Environmental Variation. ACM Trans. Design Autom. Electr. Syst. 29(1): 12:1-12:17 (2024) - [j41]Aidong Zhao, Tianchen Gu, Zhaori Bi, Fan Yang, Changhao Yan, Xuan Zeng, Zixiao Lin, Wenchuang Walter Hu, Dian Zhou:
D3PBO: Dynamic Domain Decomposition-based Parallel Bayesian Optimization for Large-scale Analog Circuit Sizing. ACM Trans. Design Autom. Electr. Syst. 29(3): 44:1-44:25 (2024) - [j40]Changxu Liu, Hao Zhou, Patrick Dai, Li Shang, Fan Yang:
PriorMSM: An Efficient Acceleration Architecture for Multi-Scalar Multiplication. ACM Trans. Design Autom. Electr. Syst. 29(5): 1-26 (2024) - [j39]Yiting Liu, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang:
Hierarchical Graph Learning-Based Floorplanning With Dirichlet Boundary Conditions. IEEE Trans. Very Large Scale Integr. Syst. 32(5): 810-822 (2024) - [c88]Zihao Chen, Songlei Meng, Fan Yang, Li Shang, Xuan Zeng:
MACRO: Multi-agent Reinforcement Learning-based Cross-layer Optimization of Operational Amplifier. ASPDAC 2024: 423-428 - [c87]Ruiyu Lyu, Yuan Meng, Aidong Zhao, Zhaori Bi, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
A Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation : (Invited Paper). ASPDAC 2024: 671-678 - [c86]Xuyang Zhao, Zhaori Bi, Changhao Yan, Fan Yang, Ye Lu, Dian Zhou, Xuan Zeng:
Asynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing. ASPDAC 2024: 872-877 - [c85]Jiangnan Yu, Fan Yang, Hanfei Wang, Yuxuan Qiao, Zheng Wu, Xiankui Xiong, Xiao Yao, Haidong Yao, Yecheng Zhang:
FullSparse: A Sparse-Aware GEMM Accelerator with Online Sparsity Prediction. CF 2024 - [c84]Zihao Chen, Jiangli Huang, Yiting Liu, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng:
Artisan: Automated Operational Amplifier Design via Domain-specific Large Language Model. DAC 2024: 39:1-39:6 - [c83]Changxu Liu, Hao Zhou, Lan Yang, Jiamin Xu, Patrick Dai, Fan Yang:
Gypsophila: A Scalable and Bandwidth-Optimized Multi-Scalar Multiplication Architecture. DAC 2024: 94:1-94:6 - [c82]Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Dian Zhou, Xuan Zeng:
Efficient ILT via Multigrid-Schwartz Method. DAC 2024: 195:1-195:6 - [c81]Tianchen Gu, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng:
HiMOSS: A Novel High-dimensional Multi-objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing. DAC 2024: 233:1-233:6 - [c80]Handa Sun, Zhaori Bi, Wenning Jiang, Ye Lu, Changhao Yan, Fan Yang, Wenchuang Hu, Sheng-Guo Wang, Dian Zhou, Xuan Zeng:
EVDMARL: Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design Migration. DAC 2024: 284:1-284:6 - [c79]Tianchen Gu, Jiaqi Wang, Zhaori Bi, Changhao Yan, Fan Yang, Yajie Qin, Tao Cui, Xuan Zeng:
tSS-BO: Scalable Bayesian Optimization for Analog Circuit Sizing via Truncated Subspace Sampling. DATE 2024: 1-6 - [c78]Yuan Meng, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Wenchuang Hu, Dian Zhou, Xuan Zeng:
Circuits Physics Constrained Predictor of Static IR Drop with Limited Data. DATE 2024: 1-2 - [c77]Zheng Wu, Xiaoling Yi, Li Shang, Fan Yang:
SenseDSE: Sensitivity-Based Performance Evaluation for Design Space Exploration of Microarchitecture. DATE 2024: 1-6 - [c76]Changxu Liu, Danqing Tang, Jie Song, Hao Zhou, Shoumeng Yan, Fan Yang:
HMNTT: A Highly Efficient MDC-NTT Architecture for Privacy-preserving Applications. ACM Great Lakes Symposium on VLSI 2024: 7-12 - [i12]Yubin Shi, Yixuan Chen, Mingzhi Dong, Xiaochen Yang, Dongsheng Li, Yujiang Wang, Robert P. Dick, Qin Lv, Yingying Zhao, Fan Yang, Tun Lu, Ning Gu, Li Shang:
Train Faster, Perform Better: Modular Adaptive Training in Over-Parameterized Models. CoRR abs/2405.07527 (2024) - [i11]Hongyang Pan, Cunqing Lan, Yiting Liu, Zhiang Wang, Li Shang, Xuan Zeng, Fan Yang, Keren Zhu:
Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement. CoRR abs/2408.07886 (2024) - [i10]Jintao Li, Haochang Zhi, Ruiyu Lyu, Wangzhen Li, Zhaori Bi, Keren Zhu, Yanhan Zeng, Weiwei Shan, Changhao Yan, Fan Yang, Yun Li, Xuan Zeng:
AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis. CoRR abs/2409.08534 (2024) - [i9]Chenyu Wang, Shuo Yan, Yixuan Chen, Yujiang Wang, Mingzhi Dong, Xiaochen Yang, Dongsheng Li, Robert P. Dick, Qin Lv, Fan Yang, Tun Lu, Ning Gu, Li Shang:
Denoising Reuse: Exploiting Inter-frame Motion Consistency for Efficient Video Latent Generation. CoRR abs/2409.12532 (2024) - 2023
- [j38]Xiangyao Qi, Qi Lu, Wentao Pan, Yingying Zhao, Rui Zhu, Mingzhi Dong, Yuhu Chang, Qin Lv, Robert P. Dick, Fan Yang, Tun Lu, Ning Gu, Li Shang:
CASES: A Cognition-Aware Smart Eyewear System for Understanding How People Read. Proc. ACM Interact. Mob. Wearable Ubiquitous Technol. 7(3): 115:1-115:31 (2023) - [j37]Biao He, Shuhan Zhang, Yifan Wang, Tianning Gao, Fan Yang, Changhao Yan, Dian Zhou, Zhaori Bi, Xuan Zeng:
A Batched Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-Fidelity Modeling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(2): 347-359 (2023) - [j36]Chunqiao Li, Chengtao An, Zhengqi Gao, Fan Yang, Yangfeng Su, Xuan Zeng:
Unleashing the Power of Graph Spectral Sparsification for Power Grid Analysis via Incomplete Cholesky Factorization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(9): 3053-3066 (2023) - [j35]Jialin Lu, Liangbo Lei, Jiangli Huang, Fan Yang, Li Shang, Xuan Zeng:
Automatic Op-Amp Generation From Specification to Layout. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4378-4390 (2023) - [j34]Jiangli Huang, Chuyu Wang, Yuyang Yan, Cong Tao, Fan Yang, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Xuan Zeng:
An Analog Circuit Building Block Generator via Nested Multi-Fidelity Modeling. IEEE Trans. Circuits Syst. I Regul. Pap. 70(8): 3280-3293 (2023) - [j33]Jialin Lu, Yijie Li, Fan Yang, Li Shang, Xuan Zeng:
High-Level Topology Synthesis Method for Δ-Σ Modulators via Bi-Level Bayesian Optimization. IEEE Trans. Circuits Syst. II Express Briefs 70(12): 4389-4393 (2023) - [j32]Chunqiao Li, Chengtao An, Fan Yang, Xuan Zeng:
ESPSim: An Efficient Scalable Power Grid Simulator Based on Parallel Algebraic Multigrid. ACM Trans. Design Autom. Electr. Syst. 28(1): 5:1-5:31 (2023) - [j31]Yiting Liu, Ziyi Ju, Zhengming Li, Mingzhi Dong, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang:
GraphPlanner: Floorplanning with Graph Neural Network. ACM Trans. Design Autom. Electr. Syst. 28(2): 21:1-21:24 (2023) - [j30]Igor L. Markov, Fan Yang, Li Shang, Hai Zhou:
Guest Editor's Introduction: Machine Learning for VLSI Physical Design. ACM Trans. Design Autom. Electr. Syst. 28(4): 48:1-48:3 (2023) - [c75]Chengtao An, Chunqiao Li, Xiangqi Li, Yangfeng Su, Fan Yang, Xuan Zeng:
FPDsim: A Structural Simulator For Power Grid Analysis Of Flat Panel Display. DAC 2023: 1-6 - [c74]Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Xuan Zeng:
Efficient ILT via Multi-level Lithography Simulation. DAC 2023: 1-6 - [c73]Xiaoling Yi, Jialin Lu, Xiankui Xiong, Dong Xu, Li Shang, Fan Yang:
Graph Representation Learning for Microarchitecture Design Space Exploration. DAC 2023: 1-6 - [c72]Aidong Zhao, Xianan Wang, Zixiao Lin, Zhaori Bi, Xudong Li, Changhao Yan, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng:
cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis. DAC 2023: 1-6 - [c71]Zihao Chen, Fan Yang, Li Shang, Xuan Zeng:
Automated and Agile Design of Layout Hotspot Detector via Neural Architecture Search. DATE 2023: 1-6 - [c70]Jiangnan Yu, Fan Yang, Xiaoling Yi, Chixiao Chen, Jun Tao, Dong Xu, Xiankui Xiong, Haitao Yang:
TPNoC: An Efficient Topology Reconfigurable NoC Generator. ACM Great Lakes Symposium on VLSI 2023: 77-82 - [c69]Ruiyao Pu, Yiwei Sun, Pei-Hsin Ho, Fan Yang, Li Shang, Xuan Zeng:
Sphinx: A Hybrid Boolean Processor-FPGA Hardware Emulation System. ICCAD 2023: 1-9 - [c68]Yixuan Chen, Yubin Shi, Mingzhi Dong, Xiaochen Yang, Dongsheng Li, Yujiang Wang, Robert P. Dick, Qin Lv, Yingying Zhao, Fan Yang, Ning Gu, Li Shang:
Over-parameterized Model Optimization with Polyak-Łojasiewicz Condition. ICLR 2023 - [c67]Zihao Chen, Songlei Meng, Fan Yang, Li Shang, Xuan Zeng:
TOTAL: Topology Optimization of Operational Amplifier via Reinforcement Learning. ISQED 2023: 1-8 - [c66]Yubin Shi, Yixuan Chen, Mingzhi Dong, Xiaochen Yang, Dongsheng Li, Yujiang Wang, Robert P. Dick, Qin Lv, Yingying Zhao, Fan Yang, Tun Lu, Ning Gu, Li Shang:
Train Faster, Perform Better: Modular Adaptive Training in Over-Parameterized Models. NeurIPS 2023 - [i8]Zhenyu Xu, Hailin Xu, Zhouyang Lu, Yingying Zhao, Rui Zhu, Yujiang Wang, Mingzhi Dong, Yuhu Chang, Qin Lv, Robert P. Dick, Fan Yang, Tun Lu, Ning Gu, Li Shang:
Can Large Language Models Be Good Companions? An LLM-Based Eyewear System with Conversational Common Ground. CoRR abs/2311.18251 (2023) - 2022
- [j29]Yingying Zhao, Yuhu Chang, Yutian Lu, Yujiang Wang, Mingzhi Dong, Qin Lv, Robert P. Dick, Fan Yang, Tun Lu, Ning Gu, Li Shang:
Do Smart Glasses Dream of Sentimental Visions?: Deep Emotionship Analysis for Eyewear Devices. Proc. ACM Interact. Mob. Wearable Ubiquitous Technol. 6(1): 38:1-38:29 (2022) - [j28]Yingying Zhao, Ning Li, Wentao Pan, Yujiang Wang, Mingzhi Dong, Sharon Xianghua Ding, Qin Lv, Robert P. Dick, Dongsheng Li, Fan Yang, Tun Lu, Ning Gu, Li Shang:
Unveiling Causal Attention in Dogs' Eyes with Smart Eyewear. Proc. ACM Interact. Mob. Wearable Ubiquitous Technol. 6(4): 199:1-199:33 (2022) - [j27]Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
An Efficient Batch-Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multiobjective Acquisition Ensemble. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(1): 1-14 (2022) - [j26]Ran Chen, Wei Zhong, Haoyu Yang, Hao Geng, Fan Yang, Xuan Zeng, Bei Yu:
Faster Region-Based Hotspot Detection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(3): 669-680 (2022) - [j25]Hao Geng, Haoyu Yang, Lu Zhang, Fan Yang, Xuan Zeng, Bei Yu:
Hotspot Detection via Attention-Based Deep Layout Metric Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(8): 2685-2698 (2022) - [j24]Xiaodong Wang, Changhao Yan, Yuzhe Ma, Bei Yu, Fan Yang, Dian Zhou, Xuan Zeng:
Analog Circuit Yield Optimization via Freeze-Thaw Bayesian Optimization Technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4887-4900 (2022) - [j23]Sanbao Su, Chang Meng, Fan Yang, Xiaolong Shen, Leibin Ni, Wei Wu, Zhihang Wu, Junfeng Zhao, Weikang Qian:
VECBEE: A Versatile Efficiency-Accuracy Configurable Batch Error Estimation Method for Greedy Approximate Logic Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 5085-5099 (2022) - [j22]Yiyang Jiang, Fan Yang, Bei Yu, Dian Zhou, Xuan Zeng:
Efficient Layout Hotspot Detection via Neural Architecture Search. ACM Trans. Design Autom. Electr. Syst. 27(6): 62:1-62:16 (2022) - [c65]Wenyang Liu, Tianxiang Wu, Tianyang Yan, Fan Yang, Yong Chen, Shunli Ma:
A 26-38GHz Ultra-Wideband Balanced Frequency Doubler in 0.15µ m GaAs pHEMT Process. APCCAS 2022: 337-340 - [c64]Jingyao Zhao, Changhao Yan, Zhaori Bi, Fan Yang, Xuan Zeng, Dian Zhou:
A Novel and Efficient Bayesian Optimization Approach for Analog Designs with Multi-Testbench. ASP-DAC 2022: 86-91 - [c63]Xiaodong Wang, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng:
An efficient yield optimization method for analog circuits via gaussian process classification and varying-sigma sampling. DAC 2022: 625-630 - [c62]Yiting Liu, Ziyi Ju, Zhengming Li, Mingzhi Dong, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang:
Floorplanning with graph attention. DAC 2022: 1303-1308 - [c61]Jialin Lu, Liangbo Lei, Fan Yang, Li Shang, Xuan Zeng:
Topology Optimization of Operational Amplifier in Continuous Space via Graph Embedding. DATE 2022: 142-147 - [c60]Shuyuan Sun, Yiyang Jiang, Fan Yang, Bei Yu, Xuan Zeng:
Efficient Hotspot Detection via Graph Neural Network. DATE 2022: 1233-1238 - [c59]Yixuan Chen, Yubin Shi, Dongsheng Li, Yujiang Wang, Mingzhi Dong, Yingying Zhao, Robert P. Dick, Qin Lv, Fan Yang, Li Shang:
Recursive Disentanglement Network. ICLR 2022 - [c58]Xiaoling Yi, Jiangnan Yu, Zheng Wu, Xiankui Xiong, Dong Xu, Chixiao Chen, Jun Tao, Fan Yang:
NNASIM: An Efficient Event-Driven Simulator for DNN Accelerators with Accurate Timing and Area Models. ISCAS 2022: 2806-2810 - [c57]Xu Fu, Changhao Yan, Zhaori Bi, Fan Yang, Dian Zhou, Xuan Zeng:
A Batch Bayesian Optimization Approach For Analog Circuit Synthesis Based On Multi-Points Selection Criterion. ISCAS 2022: 2886-2890 - [c56]Zheng Wu, Wuzhen Xie, Xiaoling Yi, Haitao Yang, Ruiyao Pu, Xiankui Xiong, Haidong Yao, Chixiao Chen, Jun Tao, Fan Yang:
An Automated Compiler for RISC-V Based DNN Accelerator. ISCAS 2022: 3097-3101 - [c55]Hao Jiang, Fan Yang, Changhao Yan, Xuan Zeng:
SAT-based Scheduling Algorithm for High-level Synthesis Considering Resource Sharing. ISCAS 2022: 3244-3248 - [c54]Shuyuan Sun, Yiyang Jiang, Fan Yang, Xuan Zeng:
Adversarial Sample Generation for Lithography Hotspot Detection. ISCAS 2022: 3503-3506 - [c53]Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
LinEasyBO: Scalable Bayesian Optimization Approach for Analog Circuit Synthesis via One-Dimensional Subspaces. MLCAD 2022: 27-34 - [i7]Yingying Zhao, Yuhu Chang, Yutian Lu, Yujiang Wang, Mingzhi Dong, Qin Lv, Robert P. Dick, Fan Yang, Tun Lu, Ning Gu, Li Shang:
Do Smart Glasses Dream of Sentimental Visions? Deep Emotionship Analysis for Eyewear Devices. CoRR abs/2201.09933 (2022) - 2021
- [j21]Yiyang Jiang, Fan Yang, Bei Yu, Dian Zhou, Xuan Zeng:
Efficient Layout Hotspot Detection via Binarized Residual Neural Network Ensemble. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(7): 1476-1488 (2021) - [c52]Yingqi Li, Fan Yang, Changhao Yan, Xuan Zeng:
Efficient High-Level Synthesis of Approximate Computing Circuits via Multi-fidelity Modeling. ASICON 2021: 1-4 - [c51]Jiangli Huang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
A Robust Batch Bayesian Optimization for Analog Circuit Synthesis via Local Penalization. ASP-DAC 2021: 146-151 - [c50]Jialin Lu, Liangbo Lei, Fan Yang, Changhao Yan, Xuan Zeng:
Automated Compensation Scheme Design for Operational Amplifier via Bayesian Optimization. DAC 2021: 517-522 - [c49]Hao Geng, Fan Yang, Xuan Zeng, Bei Yu:
When Wafer Failure Pattern Classification Meets Few-shot Learning and Self-Supervised Learning. ICCAD 2021: 1-8 - [c48]Cheng Zeng, Fan Yang, Xuan Zeng:
Accelerate Logic Re-simulation on GPU via Gate/Event Parallelism and State Compression. ICCAD 2021: 1-8 - [c47]Binwu Zhu, Ran Chen, Xinyun Zhang, Fan Yang, Xuan Zeng, Bei Yu, Martin D. F. Wong:
Hotspot Detection via Multi-task Learning and Transformer Encoder. ICCAD 2021: 1-8 - [c46]Jiangli Huang, Shuhan Zhang, Cong Tao, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
Bayesian Optimization Approach for Analog Circuit Design Using Multi-Task Gaussian Process. ISCAS 2021: 1-5 - [i6]Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng:
An Efficient Asynchronous Batch Bayesian Optimization Approach for Analog Circuit Synthesis. CoRR abs/2106.14683 (2021) - [i5]Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
An Efficient Batch Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-objective Acquisition Ensemble. CoRR abs/2106.15412 (2021) - [i4]Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
LinEasyBO: Scalable Bayesian Optimization Approach for Analog Circuit Synthesis via One-Dimensional Subspaces. CoRR abs/2109.00617 (2021) - 2020
- [j20]Yiyang Jiang, Fan Yang, Hengliang Zhu, Dian Zhou, Xuan Zeng:
Nonlinear CNN: improving CNNs with quadratic convolutions. Neural Comput. Appl. 32(12): 8507-8516 (2020) - [j19]Yufeng Li, Yan Li, I-Chyn Wey, Deqiang Cheng, Fan Yang, Xuan Zeng, Jie Chen:
Improved Low-Power Cost-Effective DCT Implementation Based on Markov Random Field and Stochastic Logic. IEEE Trans. Circuits Syst. Video Technol. 30(10): 3803-3813 (2020) - [c45]Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng:
Bayesian Methods for the Yield Optimization of Analog and SRAM Circuits. ASP-DAC 2020: 440-445 - [c44]Xiaodong Wang, Tianchen Gu, Changhao Yan, Xiulong Wu, Fan Yang, Sheng-Guo Wang, Dian Zhou, Xuan Zeng:
An Efficient and Robust Yield Optimization Method for High-dimensional SRAM Circuits. DAC 2020: 1-6 - [c43]Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng:
An Efficient Asynchronous Batch Bayesian Optimization Approach for Analog Circuit Synthesis. DAC 2020: 1-6 - [c42]Biao He, Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
An Efficient Bayesian Optimization Approach for Analog Circuit Synthesis via Sparse Gaussian Process Modeling. DATE 2020: 67-72 - [c41]Hao Geng, Haoyu Yang, Lu Zhang, Jin Miao, Fan Yang, Xuan Zeng, Bei Yu:
Hotspot Detection via Attention-based Deep Layout Metric Learning. ICCAD 2020: 16:1-16:8 - [c40]Binbin Liu, Fan Yang, Dian Zhou, Xuan Zeng:
An Efficient Memory Partitioning Approach for Multi-Pattern Data Access in STT-RAM. ISCAS 2020: 1-4 - [c39]Jialin Lu, Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng:
A Mixed-Variable Bayesian Optimization Approach for Analog Circuit Synthesis. ISCAS 2020: 1-4 - [c38]Weijing Wen, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng:
Learning Low-Rank Structured Sparsity in Recurrent Neural Networks. ISCAS 2020: 1-4
2010 – 2019
- 2019
- [j18]Wensong Li, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou:
An Efficient Memory Partitioning Approach for Multi-Pattern Data Access via Data Reuse. ACM Trans. Reconfigurable Technol. Syst. 12(1): 1:1-1:22 (2019) - [j17]Xiang Ge, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou:
An Efficient FPGA Implementation of Orthogonal Matching Pursuit With Square-Root-Free QR Decomposition. IEEE Trans. Very Large Scale Integr. Syst. 27(3): 611-623 (2019) - [c37]Huaidong Gao, Fan Yang, Dian Zhou, Xuan Zeng:
Parallel Global Placement on CPU via Parallel Reduction. ASICON 2019: 1-4 - [c36]Weijing Wen, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng:
Learning Sparse Patterns in Deep Neural Networks. ASICON 2019: 1-4 - [c35]Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, Xiangdong Hu:
An Efficient Multi-fidelity Bayesian Optimization Approach for Analog Circuit Synthesis. DAC 2019: 64 - [c34]Yiyang Jiang, Fan Yang, Hengliang Zhu, Bei Yu, Dian Zhou, Xuan Zeng:
Efficient Layout Hotspot Detection via Binarized Residual Neural Network. DAC 2019: 147 - [c33]Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network. DATE 2019: 1463-1468 - [c32]Zhengqi Gao, Jun Tao, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng:
Efficient Performance Trade-off Modeling for Analog Circuit based on Bayesian Neural Network. ICCAD 2019: 1-8 - [i3]Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, Xiangdong Hu:
An Efficient Multi-fidelity Bayesian Optimization Approach for Analog Circuit Synthesis. CoRR abs/1912.00392 (2019) - [i2]Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network. CoRR abs/1912.00402 (2019) - 2018
- [j16]Yan Li, Yufeng Li, I-Chyn Wey, Jianhao Hu, Fan Yang, Xuan Zeng, Xiaoxue Jiang, Jie Chen:
Low-Power Noise-Immune Nanoscale Circuit Design Using Coding-Based Partial MRF Method. IEEE J. Solid State Circuits 53(8): 2389-2398 (2018) - [j15]Mengshuo Wang, Wenlong Lv, Fan Yang, Changhao Yan, Wei Cai, Dian Zhou, Xuan Zeng:
Efficient Yield Optimization for Analog and SRAM Circuits via Gaussian Process Regression and Adaptive Yield Estimation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 1929-1942 (2018) - [j14]Wenlong Lyu, Pan Xue, Fan Yang, Changhao Yan, Zhiliang Hong, Xuan Zeng, Dian Zhou:
An Efficient Bayesian Optimization Approach for Automated Optimization of Analog Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(6): 1954-1967 (2018) - [j13]Yan Li, Yufeng Li, Jie Han, Jianhao Hu, Fan Yang, Xuan Zeng, Bruce F. Cockburn, Jie Chen:
Feedback-Based Low-Power Soft-Error-Tolerant Design for Dual-Modular Redundancy. IEEE Trans. Very Large Scale Integr. Syst. 26(8): 1585-1589 (2018) - [j12]Ye Zhang, Wenlong Lyu, Wai-Shing Luk, Fan Yang, Hai Zhou, Dian Zhou, David Z. Pan, Xuan Zeng:
Cut Redistribution and Insertion for Advanced 1-D Layout Design via Network Flow Optimization. IEEE Trans. Very Large Scale Integr. Syst. 26(9): 1613-1626 (2018) - [c31]Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
Multi-objective bayesian optimization for analog/RF circuit synthesis. DAC 2018: 11:1-11:6 - [c30]Wensong Li, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou:
An efficient data reuse strategy for multi-pattern data access. ICCAD 2018: 118 - [c29]Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
Batch Bayesian Optimization via Multi-objective Acquisition Ensemble for Automated Analog Circuit Design. ICML 2018: 3312-3320 - 2017
- [j11]Fan Yang, Subarna Sinha, Charles C. Chiang, Xuan Zeng, Dian Zhou:
Improved Tangent Space-Based Distance Metric for Lithographic Hotspot Classification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(9): 1545-1556 (2017) - [j10]Jincheng Su, Fan Yang, Xuan Zeng, Dian Zhou, Jie Chen:
Efficient Memory Partitioning for Parallel Data Access in FPGA via Data Reuse. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(10): 1674-1687 (2017) - [c28]Xiang Ge, Hengliang Zhu, Fan Yang, Lingli Wang, Xuan Zeng:
Parallel sparse LU decomposition using FPGA with an efficient cache architecture. ASICON 2017: 259-262 - [c27]Kaixuan Zhang, Li Ding, Yujie Cai, Wenbo Yin, Fan Yang, Jun Tao, Lingli Wang:
A high performance real-time edge detection system with NEON. ASICON 2017: 847-850 - [c26]Ye Zhang, Wai-Shing Luk, Fan Yang, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng:
Network flow based cut redistribution and insertion for advanced 1D layout design. ASP-DAC 2017: 360-365 - [c25]Mengshuo Wang, Fan Yang, Changhao Yan, Xuan Zeng, Xiangdong Hu:
Efficient Bayesian Yield Optimization Approach for Analog and SRAM Circuits. DAC 2017: 11:1-11:6 - [c24]Wenlong Lv, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
Subgradient based multiple-starting-point algorithm for non-smooth optimization of analog circuits. DATE 2017: 1195-1200 - [c23]Fan Yang, Charles C. Chiang, Xuan Zeng, Dian Zhou:
Efficient SVM-based hotspot detection using spectral clustering. ISCAS 2017: 1-4 - [c22]Yunfeng Yang, Fan Yang, Wai-Shing Luk, Changhao Yan, Xuan Zeng, Xiangdong Hu:
Layout decomposition for hybrid E-beam and DSA double patterning lithography. ISCAS 2017: 1-4 - [c21]Ye Zhang, Fan Yang, Dian Zhou, Xuan Zeng, Xiangdong Hu:
A grid-based detailed routing algorithm for advanced 1D process. ISCAS 2017: 1-4 - [c20]Shuhan Zhang, Fan Yang, Xuan Zeng, Dian Zhou, Shun Li, Xiangdong Hu:
Efficient spectral graph sparsification via Krylov-subspace based spectral perturbation analysis. ISCAS 2017: 1-4 - 2016
- [j9]Qicheng Huang, Xiao Li, Chenlei Fang, Fan Yang, Yangfeng Su, Xuan Zeng:
An aggregating based model order reduction method for power grids. Integr. 55: 449-454 (2016) - [c19]Chenjie Yang, Fan Yang, Xuan Zeng, Dian Zhou:
An efficient trajectory-based algorithm for model order reduction of nonlinear systems via localized projection and global interpolation. ASP-DAC 2016: 551-556 - [c18]Qicheng Huang, Chenlei Fang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li:
Efficient performance modeling via Dual-Prior Bayesian Model Fusion for analog and mixed-signal circuits. DAC 2016: 8:1-8:6 - [c17]Chenlei Fang, Qicheng Huang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li:
Efficient performance modeling of analog integrated circuits via kernel density based sparse regression. DAC 2016: 10:1-10:6 - [c16]Bo Peng, Fan Yang, Changhao Yan, Xuan Zeng, Dian Zhou:
Efficient multiple starting point optimization for automated analog circuit optimization via recycling simulation data. DATE 2016: 1417-1422 - [c15]Jincheng Su, Fan Yang, Xuan Zeng, Dian Zhou:
Efficient Memory Partitioning for Parallel Data Access via Data Reuse. FPGA 2016: 138-147 - [c14]Zhelun Yu, Jincheng Su, Fan Yang, Yangfeng Su, Xuan Zeng, Dian Zhou, Weiping Shi:
Fast compressive sensing reconstruction algorithm on FPGA using Orthogonal Matching Pursuit. ISCAS 2016: 249-252 - [c13]Xuan Zeng, Chenlei Fang, Qicheng Huang, Fan Yang, Dian Zhou, Wei Cai, Weiping Shi:
High-speed link verification based on statistical inference. ISCAS 2016: 906-909 - [i1]Junyi Li, Fulin Peng, Fan Yang, Xuan Zeng:
A Memristor Crossbar-Based Computation Scheme with High Precision. CoRR abs/1611.03264 (2016) - 2015
- [j8]Xingbao Zhou, Wai-Shing Luk, Hai Zhou, Fan Yang, Changhao Yan, Xuan Zeng:
Multi-parameter clock skew scheduling. Integr. 48: 129-137 (2015) - [j7]Xiao Li, Fan Yang, Dake Wu, Zhenya Zhou, Xuan Zeng:
MOS Table Models for Fast and Accurate Simulation of Analog and Mixed-Signal Circuits Using Efficient Oscillation-Diminishing Interpolations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(9): 1481-1494 (2015) - [c12]Qicheng Huang, Xiao Li, Fan Yang, Xuan Zeng, Xin Li:
SIPredict: Efficient post-layout waveform prediction via System Identification. ASP-DAC 2015: 460-465 - [c11]Qicheng Huang, Xiao Li, Chenlei Fang, Fan Yang, Yangfeng Su, Xuan Zeng:
PGMOR: An Efficient Model Order Reduction Method for Power Grids. CAD/Graphics 2015: 242-243 - [c10]Qicheng Huang, Chenlei Fang, Fan Yang, Xuan Zeng, Xin Li:
Efficient multivariate moment estimation via Bayesian model fusion for analog and mixed-signal circuits. DAC 2015: 169:1-169:6 - [c9]Chenlei Fang, Qicheng Huang, Fan Yang, Xuan Zeng, Xin Li, Chenjie Gu:
Efficient bit error rate estimation for high-speed link by Bayesian model fusion. DATE 2015: 1024-1029 - 2014
- [j6]Xingbao Zhou, Fan Yang, Hai Zhou, Min Gong, Hengliang Zhu, Ye Zhang, Xuan Zeng:
Efficient Statistical Timing Analysis for Circuits with Post-Silicon Tunable Buffers. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(11): 2227-2235 (2014) - [c8]Chenlei Fang, Fan Yang, Xuan Zeng, Xin Li:
BMF-BD: Bayesian Model Fusion on Bernoulli Distribution for Efficient Yield Estimation of Integrated Circuits. DAC 2014: 29:1-29:6 - 2013
- [c7]Liuxi Qian, Dian Zhou, Xuan Zeng, Fan Yang, Shengguo Wang:
A parallel sparse linear system solver for large-scale circuit simulation based on Schur Complement. ASICON 2013: 1-4 - 2012
- [c6]Yangfeng Su, Fan Yang, Xuan Zeng:
AMOR: an efficient aggregating based model order reduction method for many-terminal interconnect circuits. DAC 2012: 295-300 - [c5]Jing Guo, Fan Yang, Subarna Sinha, Charles C. Chiang, Xuan Zeng:
Improved tangent space based distance metric for accurate lithographic hotspot classification. DAC 2012: 1173-1178 - 2011
- [j5]Zhihua Gui, Fan Yang, Xuan Zeng:
Stochastic Non-homogeneous Arnoldi Method for Analysis of On-Chip Power Grid Networks under Process Variations. IEICE Trans. Electron. 94-C(4): 504-510 (2011) - [j4]Zyad Hassan, Nicholas Allec, Fan Yang, Li Shang, Robert P. Dick, Xuan Zeng:
Full-Spectrum Spatial-Temporal Dynamic Thermal Analysis for Nanometer-Scale Integrated Circuits. IEEE Trans. Very Large Scale Integr. Syst. 19(12): 2276-2289 (2011) - 2010
- [j3]Xuan Zeng, Fan Yang, Yangfeng Su, Wei Cai:
NHAR: A non-homogeneous Arnoldi method for fast simulation of RCL circuits with a large number of ports. Int. J. Circuit Theory Appl. 38(8): 845-865 (2010) - [j2]Ke Zong, Fan Yang, Xuan Zeng:
A Wavelet-Collocation-Based Trajectory Piecewise-Linear Algorithm for Time-Domain Model-Order Reduction of Nonlinear Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(11): 2981-2990 (2010) - [c4]Xiaoda Pan, Fan Yang, Xuan Zeng, Yangfeng Su:
An efficient transistor-level piecewise-linear macromodeling approach for model order reduction of nonlinear circuits. DATE 2010: 1673-1676
2000 – 2009
- 2009
- [j1]Xu Luo, Fan Yang, Xuan Zeng, Jun Tao, Hengliang Zhu, Wei Cai:
A Modified Nested Sparse Grid Based Adaptive Stochastic Collocation Method for Statistical Static Timing Analysis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(12): 3024-3034 (2009) - [c3]Yinghai Lu, Li Shang, Hai Zhou, Hengliang Zhu, Fan Yang, Xuan Zeng:
Statistical reliability analysis under process variation and aging effects. DAC 2009: 514-519 - 2007
- [c2]Fan Yang, Xuan Zeng, Yangfeng Su, Dian Zhou:
RLCSYN: RLC Equivalent Circuit Synthesis for Structure-Preserved Reduced-order Model of Interconnect. ISCAS 2007: 2710-2713 - 2006
- [c1]Jun Tao, Xuan Zeng, Fan Yang, Yangfeng Su, Lihong Feng, Wei Cai, Dian Zhou, Charles C. Chiang:
A one-shot projection method for interconnects with process variations. ISCAS 2006
Coauthor Index
[j46] [j44] [j43] [j42] [j41] [j39] [c88] [c87] [c86] [c84] [c82] [c81] [c80] [c79] [c78] [i11] [i10] [j37] [j36] [j35] [j34] [j33] [j32] [j31] [c75] [c74] [c72] [c71] [c69] [c67] [j27] [j26] [j25] [j24] [j22] [c64] [c63] [c62] [c61] [c60] [c57] [c55] [c54] [c53] [j21] [c52] [c51] [c50] [c49] [c48] [c47] [c46] [i6] [i5] [i4] [j20] [j19] [c45] [c44] [c43] [c42] [c41] [c40] [c39] [c38] [j18] [j17] [c37] [c36] [c35] [c34] [c33] [c32] [i3] [i2] [j16] [j15] [j14] [j13] [j12] [c31] [c30] [c29] [j11] [j10] [c28] [c26] [c25] [c24] [c23] [c22] [c21] [c20] [j9] [c19] [c18] [c17] [c16] [c15] [c14] [c13] [i1] [j8] [j7] [c12] [c11] [c10] [c9] [j6] [c8] [c7] [c6] [c5] [j5] [j4] [j3] [j2] [c4] [j1] [c3] [c2] [c1]
[j46] [j43] [j41] [c87] [c86] [c84] [c82] [c81] [c80] [c78] [j37] [j34] [c72] [j27] [j24] [j22] [c64] [c63] [c57] [c53] [j21] [c51] [c46] [i6] [i5] [i4] [j20] [c45] [c44] [c43] [c42] [c40] [c39] [c38] [j18] [j17] [c37] [c36] [c35] [c34] [c33] [c32] [i3] [i2] [j15] [j14] [j12] [c31] [c30] [c29] [j11] [j10] [c26] [c24] [c23] [c21] [c20] [c19] [c18] [c17] [c16] [c15] [c14] [c13] [c7] [c2] [c1]
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