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2020 – today
- 2024
[c19]Dewmini Sudara Marakkalage, Eleonora Testa, Walter Lau Neto, Alan Mishchenko, Giovanni De Micheli, Luca G. Amarù:
Scalable Sequential Optimization Under Observability Don't Cares. DATE 2024: 1-6- 2023
- [i2]Dewmini Sudara Marakkalage, Eleonora Testa, Walter Lau Neto, Alan Mishchenko, Giovanni De Micheli, Luca G. Amarù:
Scalable Sequential Optimization Under Observability Don't Cares. CoRR abs/2311.09967 (2023) - 2021
- [j5]Dewmini Sudara Marakkalage
, Eleonora Testa, Heinz Riener, Alan Mishchenko, Mathias Soeken, Giovanni De Micheli:
Three-Input Gates for Logic Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(10): 2184-2188 (2021) - [c18]Eleonora Testa, Siang-Yun Lee, Heinz Riener, Giovanni De Micheli:
Algebraic and Boolean Optimization Methods for AQFP Superconducting Circuits. ASP-DAC 2021: 779-785 - [c17]Luca Gaetano Amarù, Vinicius N. Possani, Eleonora Testa, Felipe S. Marranghello, Christopher Casares, Jiong Luo, Patrick Vuillod, Alan Mishchenko, Giovanni De Micheli:
LUT-Based Optimization For ASIC Design Flow. DAC 2021: 871-876 - 2020
- [b1]Eleonora Testa:
Data Structures and Algorithms for Logic Synthesis in Advanced Technologies. EPFL, Switzerland, 2020 - [j4]Eleonora Testa, Luca G. Amarù, Mathias Soeken, Alan Mishchenko, Patrick Vuillod, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Extending Boolean Methods for Scalable Logic Synthesis. IEEE Access 8: 226828-226844 (2020) - [c16]Luca G. Amarù, Felipe S. Marranghello, Eleonora Testa, Christopher Casares, Vinicius N. Possani, Jiong Luo, Patrick Vuillod, Alan Mishchenko, Giovanni De Micheli:
SAT-Sweeping Enhanced for Logic Synthesis. DAC 2020: 1-6 - [c15]Eleonora Testa, Samantha Lubaba Noor, Odysseas Zografos, Mathias Soeken, Francky Catthoor, Azad Naeemi, Giovanni De Micheli:
Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic : (Special Session Paper). DATE 2020: 133-138 - [c14]Eleonora Testa, Mathias Soeken, Heinz Riener, Luca G. Amarù, Giovanni De Micheli:
A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks. DATE 2020: 568-573 - [i1]Eleonora Testa, Mathias Soeken, Heinz Riener, Luca G. Amarù, Giovanni De Micheli:
A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks. IACR Cryptol. ePrint Arch. 2020: 706 (2020)
2010 – 2019
- 2019
- [j3]Eleonora Testa, Mathias Soeken, Luca Gaetano Amarù, Giovanni De Micheli:
Logic Synthesis for Established and Emerging Computing. Proc. IEEE 107(1): 165-184 (2019) - [j2]Eleonora Testa, Mathias Soeken, Luca Gaetano Amarù, Winston Haaswijk, Giovanni De Micheli:
Mapping Monotone Boolean Functions into Majority. IEEE Trans. Computers 68(5): 791-797 (2019) - [c13]Heinz Riener, Eleonora Testa, Winston Haaswijk, Alan Mishchenko, Luca G. Amarù, Giovanni De Micheli, Mathias Soeken:
Scalable Generic Logic Synthesis: One Approach to Rule Them All. DAC 2019: 70 - [c12]Eleonora Testa, Mathias Soeken, Luca G. Amarù, Giovanni De Micheli:
Reducing the Multiplicative Complexity in Logic Networks for Cryptography and Security Applications. DAC 2019: 74 - [c11]Eleonora Testa, Luca G. Amarù, Mathias Soeken, Alan Mishchenko, Patrick Vuillod, Jiong Luo, Christopher Casares, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Scalable Boolean Methods in a Modern Synthesis Flow. DATE 2019: 1643-1648 - [c10]Heinz Riener, Eleonora Testa, Winston Haaswijk, Alan Mishchenko, Luca G. Amarù, Giovanni De Micheli, Mathias Soeken:
Logic Optimization of Majority-Inverter Graphs. MBMV 2019: 1-4 - [c9]Mathias Soeken, Eleonora Testa, D. Michael Miller:
A Hybrid Method for Spectral Translation Equivalent Boolean Functions. PACRIM 2019: 1-6 - 2018
- [j1]Mathias Soeken, Eleonora Testa, Alan Mishchenko, Giovanni De Micheli:
Pairs of majority-decomposing functions. Inf. Process. Lett. 139: 35-38 (2018) - [c8]Mathias Soeken, Winston Haaswijk, Eleonora Testa, Alan Mishchenko, Luca Gaetano Amarù, Robert K. Brayton, Giovanni De Micheli:
Practical exact synthesis. DATE 2018: 309-314 - [c7]Luca G. Amarù, Eleonora Testa, Miguel Couceiro, Odysseas Zografos, Giovanni De Micheli, Mathias Soeken:
Majority logic synthesis. ICCAD 2018: 79 - [c6]Heinz Riener, Eleonora Testa, Luca G. Amarù, Mathias Soeken, Giovanni De Micheli:
Size Optimization of MIGs with an Application to QCA and STMG Technologies. NANOARCH 2018: 157-162 - 2017
- [c5]Luca Gaetano Amarù, Mathias Soeken, Winston Haaswijk, Eleonora Testa, Patrick Vuillod, Jiong Luo, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Multi-level logic benchmarks: An exactness study. ASP-DAC 2017: 157-162 - [c4]Odysseas Zografos, A. De Meester, Eleonora Testa, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Luca Gaetano Amarù, Praveen Raghavan, Francky Catthoor, Rudy Lauwereins:
Wave pipelining for majority-based beyond-CMOS technologies. DATE 2017: 1306-1311 - [c3]Winston Haaswijk, Eleonora Testa, Mathias Soeken, Giovanni De Micheli:
Classifying Functions with Exact Synthesis. ISMVL 2017: 272-277 - [c2]Eleonora Testa, Odysseas Zografos, Mathias Soeken, Adrien Vaysset, Mauricio Manfrini, Rudy Lauwereins, Giovanni De Micheli:
Inverter Propagation and Fan-Out Constraints for Beyond-CMOS Majority-Based Technologies. ISVLSI 2017: 164-169 - 2016
- [c1]Eleonora Testa, Mathias Soeken, Odysseas Zografos, Luca Gaetano Amarù, Praveen Raghavan, Rudy Lauwereins, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Inversion optimization in Majority-Inverter Graphs. NANOARCH 2016: 15-20
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last updated on 2025-01-21 00:23 CET by the dblp team
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