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2020 – today
- 2024
[j5]Tingyuan Liang
, Gengjie Chen, Jieru Zhao, Sharad Sinha, Wei Zhang:
AMF-Placer 2.0: Open-Source Timing-Driven Analytical Mixed-Size Placer for Large-Scale Heterogeneous FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(9): 2769-2782 (2024)- 2022
- [j4]Haocheng Li, Wing-Kai Chow, Gengjie Chen, Bei Yu, Evangeline F. Y. Young:
Pin-Accessible Legalization for Mixed-Cell-Height Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(1): 143-154 (2022) - [c17]Zhongdong Qi, Jingchong Zhang, Gengjie Chen, Hailong You:
Effective and Efficient Detailed Routing with Adaptive Rip-up Scheme and Pin Access Refinement. ACM Great Lakes Symposium on VLSI 2022: 165-168 - [i2]Tingyuan Liang, Gengjie Chen, Jieru Zhao, Sharad Sinha, Wei Zhang:
AMF-Placer 2.0: Open Source Timing-driven Analytical Mixed-size Placer for Large-scale Heterogeneous FPGA. CoRR abs/2210.08682 (2022) - 2021
- [c16]Wei Li, Yuxiao Qu, Gengjie Chen, Yuzhe Ma, Bei Yu:
TreeNet: Deep Point Cloud Embedding for Routing Tree Construction. ASP-DAC 2021: 164-169 - [c15]Benzheng Li, Qi Du, Dingcheng Liu, Jingchong Zhang, Gengjie Chen, Hailong You:
Placement for Wafer-Scale Deep Learning Accelerator. ASP-DAC 2021: 665-670 - [c14]Jinwei Liu, Gengjie Chen, Evangeline F. Y. Young:
REST: Constructing Rectilinear Steiner Minimum Tree via Reinforcement Learning. DAC 2021: 1135-1140 - [c13]Tingyuan Liang, Gengjie Chen, Jieru Zhao, Sharad Sinha, Wei Zhang:
AMF-Placer: High-Performance Analytical Mixed-size Placer for FPGA. ICCAD 2021: 1-9 - 2020
- [j3]Gengjie Chen, Evangeline F. Y. Young:
SALT: Provably Good Routing Topology by a Novel Steiner Shallow-Light Tree Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(6): 1217-1230 (2020) - [j2]Gengjie Chen, Chak-Wa Pui, Haocheng Li, Evangeline F. Y. Young:
Dr. CU: Detailed Routing by Sparse Grid Graph and Minimum-Area-Captured Path Search. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(9): 1902-1915 (2020)
2010 – 2019
- 2019
- [c12]Gengjie Chen, Chak-Wa Pui, Haocheng Li, Jingsong Chen, Bentian Jiang, Evangeline F. Y. Young:
Detailed routing by sparse grid graph and minimum-area-captured path search. ASP-DAC 2019: 754-760 - [c11]Jingsong Chen, Jinwei Liu, Gengjie Chen, Dan Zheng, Evangeline F. Y. Young:
MARCH: MAze Routing Under a Concurrent and Hierarchical Scheme for Buses. DAC 2019: 216 - [c10]Bentian Jiang, Xiaopeng Zhang, Ran Chen, Gengjie Chen, Peishan Tu, Wei Li, Evangeline F. Y. Young, Bei Yu:
FIT: Fill Insertion Considering Timing. DAC 2019: 221 - [c9]Gengjie Chen, Evangeline F. Y. Young:
Dim Sum: Light Clock Tree by Small Diameter Sum. DATE 2019: 174-179 - [c8]Haocheng Li, Gengjie Chen, Bentian Jiang, Jingsong Chen, Evangeline F. Y. Young:
Dr. CU 2.0: A Scalable Detailed Routing Framework with Correct-by-Construction Design Rule Satisfaction. ICCAD 2019: 1-7 - 2018
- [j1]Gengjie Chen, Chak-Wa Pui, Wing-Kai Chow, Ka-Chun Lam, Jian Kuang, Evangeline F. Y. Young, Bei Yu:
RippleFPGA: Routability-Driven Simultaneous Packing and Placement for Modern FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 2022-2035 (2018) - [c7]Chak-Wa Pui, Peishan Tu, Haocheng Li, Gengjie Chen, Evangeline F. Y. Young:
A two-step search engine for large scale boolean matching under NP3 equivalence. ASP-DAC 2018: 592-598 - [c6]Haocheng Li, Wing-Kai Chow, Gengjie Chen, Evangeline F. Y. Young, Bei Yu:
Routability-driven and fence-aware legalization for mixed-cell-height circuits. DAC 2018: 150:1-150:6 - 2017
- [c5]Gengjie Chen, Jian Kuang, Zhiliang Zeng, Hang Zhang, Evangeline F. Y. Young, Bei Yu:
Minimizing Thermal Gradient and Pumping Power in 3D IC Liquid Cooling Network Design. DAC 2017: 70:1-70:6 - [c4]Gengjie Chen, Peishan Tu, Evangeline F. Y. Young:
SALT: Provably good routing topology by a novel steiner shallow-light tree algorithm. ICCAD 2017: 569-576 - [c3]Chak-Wa Pui, Gengjie Chen, Yuzhe Ma, Evangeline F. Y. Young, Bei Yu:
Clock-aware ultrascale FPGA placement with machine learning routability prediction: (Invited paper). ICCAD 2017: 929-936 - 2016
- [c2]Chak-Wa Pui, Gengjie Chen, Wing-Kai Chow, Ka-Chun Lam, Jian Kuang, Peishan Tu, Hang Zhang, Evangeline F. Y. Young, Bei Yu:
RippleFPGA: a routability-driven placement for large-scale heterogeneous FPGAs. ICCAD 2016: 67 - 2015
- [c1]Gengjie Chen, Pierre-Luc St-Charles, Wassim Bouachir, Guillaume-Alexandre Bilodeau, Robert Bergevin:
Reproducible evaluation of Pan-Tilt-Zoom tracking. ICIP 2015: 2055-2059 - [i1]Gengjie Chen, Pierre-Luc St-Charles, Wassim Bouachir, Thomas Joeisseint, Guillaume-Alexandre Bilodeau, Robert Bergevin:
Reproducible Evaluation of Pan-Tilt-Zoom Tracking. CoRR abs/1505.04502 (2015)
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