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2020 – today
- 2024
[c9]C. Harshitha, Sundarapalli Harikrishna, Peddakotla Rohith, Sandeep Chandran
, Rajshekar Kalayappan:
On Decomposing Complex Test Cases for Efficient Post-silicon Validation. ASPDAC 2024: 256-261- [c8]Shruthi Karunakar, Meenakshi Atkade, Akash Poptani, Rajshekar Kalayappan, Sandeep Chandran:
CASH: Criticality-Aware Split Hybrid L1 Data Cache. ACM Great Lakes Symposium on VLSI 2024: 50-56 - [c7]Amrutha Benny, Sandeep Chandran, Rajshekar Kalayappan, Ramchandra Phawade, Piyush P. Kurur:
faRM-LTL: A Domain-Specific Architecture for Flexible and Accelerated Runtime Monitoring of LTL Properties. RV 2024: 109-127 - 2023
- [c6]Akash Poptani, Abhishek Mittal, Rishit Saiya, Rajshekar Kalayappan, Sandeep Chandran:
SANNA: Secure Acceleration of Neural Network Applications. VLSID 2023: 337-342 - [i2]Rajshekar Kalayappan, Sandeep Chandran:
Dynamic Ineffectuality-based Clustered Architectures. CoRR abs/2304.12762 (2023)
2010 – 2019
- 2019
- [c5]Neetu Jindal, Sandeep Chandran, Preeti Ranjan Panda, Sanjiva Prasad, Abhay Mitra, Kunal Singhal, Shubham Gupta, Shikhar Tuli:
DHOOM: Reusing Design-for-Debug Hardware for Online Monitoring. DAC 2019: 99 - 2017
- [j3]Sandeep Chandran, Preeti Ranjan Panda, Smruti R. Sarangi, Ayan Bhattacharyya, Deepak Chauhan, Sharad Kumar:
Managing Trace Summaries to Minimize Stalls During Postsilicon Validation. IEEE Trans. Very Large Scale Integr. Syst. 25(6): 1881-1894 (2017) - 2016
- [j2]Sandeep Chandran, Smruti R. Sarangi, Preeti Ranjan Panda:
Area-Aware Cache Update Trackers for Postsilicon Validation. IEEE Trans. Very Large Scale Integr. Syst. 24(5): 1794-1807 (2016) - [c4]Sandeep Chandran, Preeti Ranjan Panda, Deepak Chauhan, Sharad Kumar, Smruti R. Sarangi:
Extending trace history through tapered summaries in post-silicon validation. ASP-DAC 2016: 737-742 - [c3]Sandeep Chandran, Eldhose Peter, Preeti Ranjan Panda, Smruti R. Sarangi:
A Generic Implementation of Barriers Using Optical Interconnects. VLSID 2016: 349-354 - 2015
- [i1]Sandeep Chandran, Eldhose Peter, Preeti Ranjan Panda, Smruti R. Sarangi:
Fundamental Results for a Generic Implementation of Barriers using Optical Interconnects. CoRR abs/1510.00220 (2015) - 2014
- [j1]Sandeep Chandran, Prathmesh Kallurkar, Parul Gupta, Smruti R. Sarangi:
Architectural Support for Handling Jitterin Shared Memory Based Parallel Applications. IEEE Trans. Parallel Distributed Syst. 25(5): 1166-1176 (2014) - 2013
- [c2]Sandeep Chandran, Smruti R. Sarangi, Preeti Ranjan Panda:
Space sensitive cache dumping for post-silicon validation. DATE 2013: 497-502
2000 – 2009
- 2002
- [c1]Sandeep Chandran, R. Russell Rhinehart:
Heuristic random optimizer-version II. ACC 2002: 2589-2594
Coauthor Index
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