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2020 – today
- 2024
[j4]Junyao Wang
, Haocheng Xu, Yonatan Gizachew Achamyeleh, Sitao Huang, Mohammad Abdullah Al Faruque:
HyperDetect: A Real-Time Hyperdimensional Solution for Intrusion Detection in IoT Networks. IEEE Internet Things J. 11(8): 14844-14856 (2024)- [c28]Kun Wu, Mert Hidayetoglu, Xiang Song, Sitao Huang, Da Zheng, Israt Nisa, Wen-Mei Hwu:
Hector: An Efficient Programming and Compilation Framework for Implementing Relational Graph Neural Networks in GPU Architectures. ASPLOS (3) 2024: 528-544 - [c27]Ye Qiao, Haocheng Xu, Yifan Zhang, Sitao Huang:
MicroNAS: Zero-Shot Neural Architecture Search for MCUs. DATE 2024: 1-2 - [c26]Xiaoyu Niu, Yanjun Zhang, Yifan Zhang, Hongzheng Tian, Bo Yu, Shaoshan Liu, Sitao Huang:
Accelerating Autonomous Path Planning on FPGAs with Sparsity-Aware HW/SW Co-Optimizations. FPGA 2024: 42 - [i19]Ye Qiao, Haocheng Xu, Yifan Zhang, Sitao Huang:
MicroNAS: Zero-Shot Neural Architecture Search for MCUs. CoRR abs/2401.08996 (2024) - [i18]Ye Qiao, Haocheng Xu, Sitao Huang:
TG-NAS: Leveraging Zero-Cost Proxies with Transformer and Graph Convolution Networks for Efficient Neural Architecture Search. CoRR abs/2404.00271 (2024) - [i17]Jingcheng Li, Ye Qiao, Haocheng Xu, Sitao Huang:
RSEND: Retinex-based Squeeze and Excitation Network with Dark Region Detection for Efficient Low Light Image Enhancement. CoRR abs/2406.09656 (2024) - [i16]Kun Wu, Jeongmin Brian Park, Xiaofan Zhang, Mert Hidayetoglu, Vikram Sharma Mailthody, Sitao Huang, Steven S. Lumetta, Wen-Mei W. Hwu:
TBA: Faster Large Language Model Training Using SSD-Based Activation Offloading. CoRR abs/2408.10013 (2024) - [i15]Ye Qiao, Haocheng Xu, Yifan Zhang, Sitao Huang:
MONAS: Efficient Zero-Shot Neural Architecture Search for MCUs. CoRR abs/2408.15034 (2024) - [i14]Haocheng Xu, Haotian Hu, Sitao Huang:
Optimizing High-Level Synthesis Designs with Retrieval-Augmented Large Language Models. CoRR abs/2410.07356 (2024) - [i13]Haocheng Xu, Faraz Tahmasebi, Ye Qiao, Hongzheng Tian, Hyoukjun Kwon, Sitao Huang:
Optimized Spatial Architecture Mapping Flow for Transformer Accelerators. CoRR abs/2410.07407 (2024) - 2023
- [j3]Genghan Zhang, Yuetong Zhao, Yanting Tao, Zhongming Yu, Guohao Dai, Sitao Huang, Yuan Wen, Pavlos Petoumenos, Yu Wang:
Sgap: towards efficient sparse tensor algebra compilation for GPU. CCF Trans. High Perform. Comput. 5(2): 210-227 (2023) - [c25]Junyao Wang, Hanning Chen, Mariam Issa, Sitao Huang, Mohsen Imani:
Late Breaking Results: Scalable and Efficient Hyperdimensional Computing for Network Intrusion Detection. DAC 2023: 1-2 - [c24]Junyao Wang, Sitao Huang, Mohsen Imani:
DistHD: A Learner-Aware Dynamic Encoding Method for Hyperdimensional Classification. DAC 2023: 1-6 - [c23]Yifan Zhang, Arnav Vaibhav Malawade, Xiaofang Zhang, Yuhui Li, DongHwan Seong, Mohammad Abdullah Al Faruque, Sitao Huang:
CARMA: Context-Aware Runtime Reconfiguration for Energy-Efficient Sensor Fusion. ISLPED 2023: 1-6 - [i12]Kun Wu, Mert Hidayetoglu, Xiang Song, Sitao Huang, Da Zheng, Israt Nisa, Wen-Mei W. Hwu:
PIGEON: Optimizing CUDA Code Generator for End-to-End Training and Inference of Relational Graph Neural Networks. CoRR abs/2301.06284 (2023) - [i11]Junyao Wang, Sitao Huang, Mohsen Imani:
DistHD: A Learner-Aware Dynamic Encoding Method for Hyperdimensional Classification. CoRR abs/2304.05503 (2023) - [i10]Junyao Wang, Hanning Chen, Mariam Issa, Sitao Huang, Mohsen Imani:
Late Breaking Results: Scalable and Efficient Hyperdimensional Computing for Network Intrusion Detection. CoRR abs/2304.06728 (2023) - [i9]Yifan Zhang, Arnav Vaibhav Malawade, Xiaofang Zhang, Yuhui Li, DongHwan Seong, Mohammad Abdullah Al Faruque, Sitao Huang:
CARMA: Context-Aware Runtime Reconfiguration for Energy-Efficient Sensor Fusion. CoRR abs/2306.15748 (2023) - 2022
- [i8]Xiaofan Zhang, Yao Chen, Cong Hao, Sitao Huang, Yuhong Li, Deming Chen:
Efficient Machine Learning, Compilers, and Optimizations for Embedded Systems. CoRR abs/2206.03326 (2022) - [i7]Mang Yu, Sitao Huang, Deming Chen:
Chimera: A Hybrid Machine Learning Driven Multi-Objective Design Space Exploration Tool for FPGA High-Level Synthesis. CoRR abs/2207.07917 (2022) - [i6]Genghan Zhang, Yuetong Zhao, Yanting Tao, Zhongming Yu, Guohao Dai, Sitao Huang, Yuan Wen, Pavlos Petoumenos, Yu Wang:
Sgap: Towards Efficient Sparse Tensor Algebra Compilation for GPU. CoRR abs/2209.02882 (2022) - 2021
- [b1]Sitao Huang:
High-efficiency and high-usability heterogeneous hardware acceleration with FPGAs. University of Illinois Urbana-Champaign, USA, 2021 - [j2]Seungwon Min, Kun Wu, Sitao Huang, Mert Hidayetoglu, Jinjun Xiong, Eiman Ebrahimi, Deming Chen, Wen-mei W. Hwu:
Large Graph Convolutional Network Training with GPU-Oriented Data Communication Architecture. Proc. VLDB Endow. 14(11): 2087-2100 (2021) - [j1]Sitao Huang, Kun Wu, Hyunmin Jeong, Chengyue Wang, Deming Chen, Wen-Mei Hwu:
PyLog: An Algorithm-Centric Python-Based FPGA Programming and Synthesis Flow. IEEE Trans. Computers 70(12): 2015-2028 (2021) - [c22]Sitao Huang, Aayush Ankit, Plínio Silveira, Rodrigo Antunes, Sai Rahul Chalamalasetti, Izzat El Hajj, Dong Eun Kim, Glaucimar Aguiar, Pedro Bruel, Sergey Serebryakov, Cong Xu, Can Li, Paolo Faraboschi, John Paul Strachan, Deming Chen, Kaushik Roy, Wen-Mei W. Hwu, Dejan S. Milojicic:
Mixed Precision Quantization for ReRAM-based DNN Inference Accelerators. ASP-DAC 2021: 372-377 - [c21]Kartik Hegde, Po-An Tsai, Sitao Huang, Vikas Chandra, Angshuman Parashar, Christopher W. Fletcher:
Mind mappings: enabling efficient algorithm-accelerator mapping space search. ASPLOS 2021: 943-958 - [c20]Chengyue Wang, Sitao Huang, Wen-Mei Hwu, Deming Chen:
Extending HLS with High-Level Descriptive Language for Configurable Algorithm-Level Spatial Structure Design. FCCM 2021: 261 - [c19]Sitao Huang, Kun Wu, Hyunmin Jeong, Chengyue Wang, Deming Chen, Wen-Mei Hwu:
PyLog: An Algorithm-Centric Python-Based FPGA Programming and Synthesis Flow. FPGA 2021: 227-228 - [c18]Enliang Li, Subho S. Banerjee, Sitao Huang, Ravishankar K. Iyer, Deming Chen:
Improved GPU Implementations of the Pair-HMM Forward Algorithm for DNA Sequence Alignment. ICCD 2021: 299-306 - [c17]Mang Yu, Sitao Huang, Deming Chen:
Chimera: A Hybrid Machine Learning-Driven Multi-Objective Design Space Exploration Tool for FPGA High-Level Synthesis. IDEAL 2021: 524-536 - [c16]Sitao Huang, Kun Wu, Sai Rahul Chalamalasetti, Izzat El Hajj, Cong Xu, Paolo Faraboschi, Deming Chen:
A Python-based High-Level Programming Flow for CPU-FPGA Heterogeneous Systems : (Invited Paper). PEHC@SC 2021: 20-26 - [i5]Seungwon Min, Kun Wu, Sitao Huang, Mert Hidayetoglu, Jinjun Xiong, Eiman Ebrahimi, Deming Chen, Wen-Mei W. Hwu:
PyTorch-Direct: Enabling GPU Centric Data Access for Very Large Graph Neural Network Training with Irregular Accesses. CoRR abs/2101.07956 (2021) - [i4]Kartik Hegde, Po-An Tsai, Sitao Huang, Vikas Chandra, Angshuman Parashar, Christopher W. Fletcher:
Mind Mappings: Enabling Efficient Algorithm-Accelerator Mapping Space Search. CoRR abs/2103.01489 (2021) - [i3]Seungwon Min, Kun Wu, Sitao Huang, Mert Hidayetoglu, Jinjun Xiong, Eiman Ebrahimi, Deming Chen, Wen-Mei W. Hwu:
Large Graph Convolutional Network Training with GPU-Oriented Data Communication Architecture. CoRR abs/2103.03330 (2021)
2010 – 2019
- 2019
- [c15]Simon Garcia De Gonzalo, Sitao Huang, Juan Gómez-Luna, Simon D. Hammond, Onur Mutlu, Wen-Mei Hwu:
Automatic Generation of Warp-Level Primitives and Atomic Instructions for Fast and Portable Parallel Reduction on GPUs. CGO 2019: 73-84 - [c14]Cong Hao, Xiaofan Zhang, Yuhong Li, Sitao Huang, Jinjun Xiong, Kyle Rupnow, Wen-Mei Hwu, Deming Chen:
FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edge. DAC 2019: 206 - [c13]Seungwon Min, Sitao Huang, Mohamed El-Hadedy, Jinjun Xiong, Deming Chen, Wen-Mei Hwu:
Analysis and Optimization of I/O Cache Coherency Strategies for SoC-FPGA Device. FPL 2019: 301-306 - [c12]Sitao Huang, Carl Pearson, Rakesh Nagi, Jinjun Xiong, Deming Chen, Wen-Mei W. Hwu:
Accelerating Sparse Deep Neural Networks on FPGAs. HPEC 2019: 1-7 - [c11]Ashutosh Dhar, Sitao Huang, Jinjun Xiong, Damir A. Jamsek, Bruno Mesnet, Jian Huang, Nam Sung Kim, Wen-Mei W. Hwu, Deming Chen:
Near-Memory and In-Storage FPGA Acceleration for Emerging Cognitive Computing Workloads. ISVLSI 2019: 68-75 - [c10]Sitao Huang, Li-Wen Chang, Izzat El Hajj, Simon Garcia De Gonzalo, Juan Gómez-Luna, Sai Rahul Chalamalasetti, Mohamed El-Hadedy, Dejan S. Milojicic, Onur Mutlu, Deming Chen, Wen-Mei W. Hwu:
Analysis and Modeling of Collaborative Execution Strategies for Heterogeneous CPU-FPGA Architectures. ICPE 2019: 79-90 - [i2]Cong Hao, Xiaofan Zhang, Yuhong Li, Sitao Huang, Jinjun Xiong, Kyle Rupnow, Wen-Mei Hwu, Deming Chen:
FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edge. CoRR abs/1904.04421 (2019) - [i1]Seungwon Min, Sitao Huang, Mohamed El-Hadedy, Jinjun Xiong, Deming Chen, Wen-Mei Hwu:
Analysis and Optimization of I/O Cache Coherency Strategies for SoC-FPGA Device. CoRR abs/1908.01261 (2019) - 2018
- [c9]Sitao Huang, Mohamed El-Hadedy, Cong Hao, Qin Li, Vikram S. Mailthody, Ketan Date, Jinjun Xiong, Deming Chen, Rakesh Nagi, Wen-Mei Hwu:
Triangle Counting and Truss Decomposition using FPGA. HPEC 2018: 1-7 - [c8]Po-Sen Huang, Chong Wang, Sitao Huang, Dengyong Zhou, Li Deng:
Towards Neural Phrase-based Machine Translation. ICLR (Poster) 2018 - [c7]Joao Ambrosi, Aayush Ankit, Rodrigo Antunes, Sai Rahul Chalamalasetti, Soumitra Chatterjee, Izzat El Hajj, Guilherme Fachini, Paolo Faraboschi, Martin Foltin, Sitao Huang, Wen-Mei Hwu, Gustavo Knuppe, Sunil Vishwanathpur Lakshminarasimha, Dejan S. Milojicic, Mohan Parthasarathy, Filipe Ribeiro, Lucas Rosa, Kaushik Roy, Plínio Silveira, John Paul Strachan:
Hardware-Software Co-Design for an Analog-Digital Accelerator for Machine Learning. ICRC 2018: 1-13 - 2017
- [c6]Sitao Huang, Gowthami Jayashri Manikandan, Anand Ramachandran, Kyle Rupnow, Wen-mei W. Hwu, Deming Chen:
Hardware Acceleration of the Pair-HMM Algorithm for DNA Variant Calling. FPGA 2017: 275-284 - [c5]Li-Wen Chang, Juan Gómez-Luna, Izzat El Hajj, Sitao Huang, Deming Chen, Wen-mei W. Hwu:
Collaborative Computing for Heterogeneous Integrated Systems. ICPE 2017: 385-388 - 2016
- [c4]Gowthami Jayashri Manikandan, Sitao Huang, Kyle Rupnow, Wen-mei W. Hwu, Deming Chen:
Acceleration of the Pair-HMM Algorithm for DNA Variant Calling. FCCM 2016: 137 - 2014
- [c3]Yuliang Sun, Zilong Wang, Sitao Huang, Lanjun Wang, Yu Wang, Rong Luo, Huazhong Yang:
Accelerating frequent item counting with FPGA. FPGA 2014: 109-112 - 2013
- [c2]Zilong Wang, Sitao Huang, Lanjun Wang, Hao Li, Yu Wang, Huazhong Yang:
Accelerating subsequence similarity search based on dynamic time warping distance with FPGA. FPGA 2013: 53-62 - [c1]Sitao Huang, Guohao Dai, Yuliang Sun, Zilong Wang, Yu Wang, Huazhong Yang:
DTW-Based Subsequence Similarity Search on AMD Heterogeneous Computing Platform. HPCC/EUC 2013: 1054-1063
Coauthor Index
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last updated on 2024-11-19 21:44 CET by the dblp team
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