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ORCIDHe Qian
Person information
Other persons with a similar name
- Hong-Qian He
- Maria Qian Ying He
- Qian He — disambiguation page
- Qian-Qian He
- Qianhua He (aka: Qian-Hua He)
- Shu-Qian He
- Steve (Qian) He
- Qian He 0001
![[0000-0001-9728-7113]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0001-9728-7113")
— Shanghai Institute of Microsystem and Information Technology, China - Qian He 0002 — University of Electronic Science and Technology of China, Chengdu, China (and 1 more)
- Jia-he Qian
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2020 – today
- 2024
[c31]Yuan He, Chengxiang Ma, Xiangchao Ma, Yilong Huang, Qianze Zheng, Yue Xi, Qiumeng Wei, Jianing Li, Xiaodong He, Yongqin Wu, Weihai Bu, Kai Zheng, Jin Kang, Jianshi Tang, Bin Gao, Dong Wu, He Qian, Huaqiang Wu:
A 3.75Mb Embedded RRAM IP on 40nm High-Voltage CMOS Technology. IMW 2024: 1-4- [c30]Ruofei Hu, Jianshi Tang, Yue Xi, Zhixing Jiang, Yuyao Lu, Chengxiang Ma, Junchen Li, Bin Gao, He Qian, Huaqiang Wu:
Statistical Modeling of Time-Dependent Post-Programming Conductance Drift in Analog RRAM. IRPS 2024: 1-6 - [c29]Ziyi Liu, Yiwei Du, Renrong Liang, Zhigang Zhang, Liyang Pan, Jianshi Tang, Renrong Liang, Bin Gao, Qi Hu, Jun Xu, He Qian, Huaqiang Wu, Yuegang Zhang:
A Dual-Gate Vertical Channel IGZO Transistor for BEOL Stackable 3D Parallel Integration for Memory and Computing Applications. VLSI Technology and Circuits 2024: 1-2 - 2023
- [j22]Yuyi Liu, Bin Gao, Jianshi Tang, Huaqiang Wu, He Qian:
Architecture-circuit-technology co-optimization for resistive random access memory-based computation-in-memory chips. Sci. China Inf. Sci. 66(10) (2023) - [j21]Ruihua Yu, Wenqiang Zhang, Bin Gao, Yiwen Geng, Peng Yao, Yuyi Liu, Qingtian Zhang, Jianshi Tang, Dong Wu, Hu He, Ning Deng, He Qian, Huaqiang Wu:
CLEAR: a full-stack chip-in-loop emulator for analog RRAM based computing-in-memory system. Sci. China Inf. Sci. 66(12) (2023) - [j20]Yudeng Lin, Qingtian Zhang, Bin Gao, Jianshi Tang, Peng Yao, Chongxuan Li, Shiyu Huang, Zhengwu Liu, Ying Zhou, Yuyi Liu, Wenqiang Zhang, Jun Zhu, He Qian, Huaqiang Wu:
Uncertainty quantification via a memristor Bayesian deep neural network for risk-sensitive reinforcement learning. Nat. Mac. Intell. 5(7): 714-723 (2023) - [j19]Yibei Zhang, Qingtian Zhang, Qi Qin, Wenbin Zhang, Yue Xi, Zhixing Jiang, Jianshi Tang, Bin Gao, He Qian, Huaqiang Wu:
An RRAM retention prediction framework using a convolutional neural network based on relaxation behavior. Neuromorph. Comput. Eng. 3(1): 14011 (2023) - [j18]Hanwen Gong, Hu He, Liyang Pan, Bin Gao, Jianshi Tang, Sining Pan, Jianing Li, Peng Yao, Dabin Wu, He Qian, Huaqiang Wu:
An Error-Free 64KB ReRAM-Based nvSRAM Integrated to a Microcontroller Unit Supporting Real-Time Program Storage and Restoration. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 5339-5351 (2023) - [j17]Yudeng Lin, Jianshi Tang, Bin Gao, Qi Qin, Qingtian Zhang, He Qian, Huaqiang Wu:
A High-Speed and High-Efficiency Diverse Error Margin Write-Verify Scheme for an RRAM-Based Neuromorphic Hardware Accelerator. IEEE Trans. Circuits Syst. II Express Briefs 70(4): 1366-1370 (2023) - [j16]Yudeng Lin, Jianshi Tang, Bin Gao, Qingtian Zhang, He Qian, Huaqiang Wu:
BETTER: Bayesian-Based Training and Lightweight Transfer Architecture for Reliable and High-Speed Memristor Neural Network Deployment. IEEE Trans. Circuits Syst. II Express Briefs 70(6): 1846-1850 (2023) - [j15]Hanwen Gong, Hu He, Bin Gao, Jianshi Tang, Jian Yu, Dabin Wu, Junren Chen, Qingtian Zhang, Xing Mou, He Qian, Huaqiang Wu:
A 1-Mb Programming Configurable ReRAM Fully Integrating Into a 32-Bit Microcontroller Unit. IEEE Trans. Circuits Syst. II Express Briefs 70(8): 2734-2738 (2023) - [c28]Siyao Yang, Bin Gao, Jianshi Tang, Feng Xu, Peng Yao, He Qian, Huaqiang Wu:
Impact of Programming Process on Temperature Coefficient in Analog RRAM. ICICDT 2023: 141-144 - [c27]Hanwen Gong, Hu He, Bin Gao, Jianshi Tang, Qingtian Zhang, He Qian, Huaqiang Wu:
ACCLAIM: An End-to-End SystemC-AMS Simulation Framework for Analog In-Memory-Computing. ICTA 2023: 134-135 - [c26]Awang Ma, Bin Gao, Xing Mou, Peng Yao, Yiwei Du, Jianshi Tang, He Qian, Huaqiang Wu:
Thermal Induced Retention Degradation of RRAM-based Neuromorphic Computing Chips. IRPS 2023: 1-6 - [c25]Jiaming Li, Bin Gao, Ruihua Yu, Peng Yao, Jianshi Tang, He Qian, Huaqiang Wu:
A Spatial-Designed Computing-In-Memory Architecture Based on Monolithic 3D Integration for High-Performance Systems. NANOARCH 2023: 4:1-4:6 - [c24]Yiwei Du, Jianshi Tang, Yijun Li, Yue Xi, Bin Gao, He Qian, Huaqiang Wu:
Monolithic 3D Integration of FeFET, Hybrid CMOS Logic and Analog RRAM Array for Energy-Efficient Reconfigurable Computing-In-Memory Architecture. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j14]Weier Wan, Rajkumar Kubendran, Clemens J. S. Schaefer, Sukru Burc Eryilmaz, Wenqiang Zhang, Dabin Wu, Stephen R. Deiss, Priyanka Raina, He Qian, Bin Gao, Siddharth Joshi, Huaqiang Wu, H.-S. Philip Wong, Gert Cauwenberghs:
A compute-in-memory chip based on resistive random-access memory. Nat. 608(7923): 504-512 (2022) - [c23]Xiangpeng Liang, Yanan Zhong, Xinyi Li, Heyi Huang, Tingyu Li, Jianshi Tang, Bin Gao, He Qian, Huaqiang Wu, Hadi Heidari:
A Physical Reservoir Computing Model Based on Volatile Memristor for Temporal Signal Processing. ICECS 2022 2022: 1-4 - [i3]Zhenxuan Zhao, Jianshi Tang, Jian Yuan, Yijun Li, Yuan Dai, Jian Yao, Qingtian Zhang, Sanchuan Ding, Tingyu Li, Ruirui Zhang, Yu Zheng, Zhengyou Zhang, Song Qiu, Qingwen Li, Bin Gao, Ning Deng, He Qian, Fei Xing, Zheng You, Huaqiang Wu:
Large-Scale Integrated Flexible Tactile Sensor Array for Sensitive Smart Robotic Touch. CoRR abs/2208.10933 (2022) - 2021
- [j13]Wenqiang Zhang, Bin Gao, Peng Yao, Jianshi Tang, He Qian, Huaqiang Wu:
Array-level boosting method with spatial extended allocation to improve the accuracy of memristor based computing-in-memory chips. Sci. China Inf. Sci. 64(6) (2021) - [j12]Bohan Lin, Yachuan Pang, Bin Gao, Jianshi Tang, Dong Wu, Ting-Wei Chang, Wei-En Lin, Xiaoyu Sun, Shimeng Yu, Meng-Fan Chang, He Qian, Huaqiang Wu:
A Highly Reliable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source. IEEE J. Solid State Circuits 56(5): 1641-1650 (2021) - [j11]Yue Xi, Bin Gao, Jianshi Tang, An Chen, Meng-Fan Chang, Xiaobo Sharon Hu, Jan Van der Spiegel, He Qian, Huaqiang Wu:
In-memory Learning with Analog Resistive Switching Memory: A Review and Perspective. Proc. IEEE 109(1): 14-42 (2021) - [j10]Yan Liao, Bin Gao, Peng Yao, Wenqiang Zhang, Jianshi Tang, Huaqiang Wu, He Qian:
Diagonal Matrix Regression Layer: Training Neural Networks on Resistive Crossbars With Interconnect Resistance Effect. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(8): 1662-1671 (2021) - [c22]Yiwen Geng, Bin Gao, Qingtian Zhang, Wenqiang Zhang, Peng Yao, Yue Xi, Yudeng Lin, Junren Chen, Jianshi Tang, Huaqiang Wu, He Qian:
An On-chip Layer-wise Training Method for RRAM based Computing-in-memory Chips. DATE 2021: 248-251 - [c21]Wenbin Zhang, Jianshi Tang, Bin Gao, Wen Sun, Wei Liu, Kanwen Wang, Wei Wu, He Qian, Huaqiang Wu:
Impact of Bottom Electrode Roughness on the Analog Switching Characteristics in Nanoscale RRAM Array. DRC 2021: 1-2 - [c20]Yanhai Jiang, Bin Gao, Jianshi Tang, Dabin Wu, Hu He, He Qian, Huaqiang Wu:
HARNS: High-level Architectural Model of RRAM based Computing-in-memory NPU. ICTA 2021: 35-36 - [i2]Weier Wan, Rajkumar Kubendran, Clemens J. S. Schaefer, Sukru Burc Eryilmaz, Wenqiang Zhang, Dabin Wu, Stephen R. Deiss, Priyanka Raina, He Qian, Bin Gao, Siddharth Joshi, Huaqiang Wu, H.-S. Philip Wong, Gert Cauwenberghs:
Edge AI without Compromise: Efficient, Versatile and Accurate Neurocomputing in Resistive Random-Access Memory. CoRR abs/2108.07879 (2021) - 2020
- [c19]He Qian, Song Jing, Xu Hong, Wang Yong:
HABEm: Hierarchical Attribute Based Encryption with Multi-Authority for the Mobile Cloud Service. ICCC 2020: 524-529 - [c18]Wenqiang Zhang, Bin Gao, Peng Yao, Jianshi Tang, Huqiang Wu, He Qian:
A circuit-algorithm codesign method to reduce the accuracy drop of RRAM based computing-in-memory chip. ICTA 2020: 108-109 - [c17]Qi Liu, Bin Gao, Peng Yao, Dong Wu, Junren Chen, Yachuan Pang, Wenqiang Zhang, Yan Liao, Cheng-Xin Xue, Wei-Hao Chen, Jianshi Tang, Yu Wang, Meng-Fan Chang, He Qian, Huaqiang Wu:
33.2 A Fully Integrated Analog ReRAM Based 78.4TOPS/W Compute-In-Memory Chip with Fully Parallel MAC Computing. ISSCC 2020: 500-502
2010 – 2019
- 2019
- [j9]Panni Wang, Feng Xu, Bo Wang, Bin Gao, Huaqiang Wu, He Qian, Shimeng Yu:
Three-Dimensional nand Flash for Vector-Matrix Multiplication. IEEE Trans. Very Large Scale Integr. Syst. 27(4): 988-991 (2019) - [c16]Xin Si, He Qian, Meng-Fan Chang, Cheng-Xin Xue, Jian-Wei Su, Zhixiao Zhang, Sih-Han Li, Shyh-Shyuan Sheu, Heng-Yuan Lee, Ping-Cheng Chen, Huaqiang Wu:
Circuit Design Challenges in Computing-in-Memory for AI Edge Devices. ASICON 2019: 1-4 - [c15]Wenqiang Zhang, Xiaochen Peng, Huaqiang Wu, Bin Gao, Hu He, Youhui Zhang, Shimeng Yu, He Qian:
Design Guidelines of RRAM based Neural-Processing-Unit: A Joint Device-Circuit-Algorithm Analysis. DAC 2019: 140 - [c14]Huaqiang Wu, Meiran Zhao, Yuyi Liu, Peng Yao, Yue Xi, Xinyi Li, Wei Wu, Qingtian Zhang, Jianshi Tang, Bin Gao, He Qian:
Reliability Perspective on Neuromorphic Computing Based on Analog RRAM. IRPS 2019: 1-4 - [c13]Yachun Pang, Bin Gao, Dong Wu, Shengyu Yi, Qi Liu, Wei-Hao Chen, Ting-Wei Chang, Wei-En Lin, Xiaoyu Sun, Shimeng Yu, He Qian, Meng-Fan Chang, Huaqiang Wu:
A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source With <6×10-6 Native Bit Error Rate. ISSCC 2019: 402-404 - 2018
- [j8]Qingtian Zhang, Huaqiang Wu, Peng Yao, Wenqiang Zhang, Bin Gao, Ning Deng, He Qian:
Sign backpropagation: An on-chip learning algorithm for analog RRAM neuromorphic computing systems. Neural Networks 108: 217-223 (2018) - [c12]Qi Lu, Hongming Lyu, Xiaoming Wu, Huaqiang Wu, He Qian:
A Novel Graphene Double-Balanced Passive Mixer. NEMS 2018: 549-552 - 2017
- [j7]Cheng Zhu, Lei Zhang, Jinwen Geng, Xizeng Shi, He Qian:
A micro-array bio detection system based on a GMR sensor with 50-ppm sensitivity. Sci. China Inf. Sci. 60(8): 082403:1-082403:9 (2017) - [j6]Bo Wang, Bin Gao, Huaqiang Wu, He Qian:
New structure with SiO2-gate-dielectric select gates in vertical-channel three-dimensional (3D) NAND flash memory. Microelectron. Reliab. 78: 80-84 (2017) - [j5]Huaqiang Wu, Xiao Hu Wang, Bin Gao, Ning Deng, Zhichao Lu, Brent Haukness, Gary Bronner, He Qian:
Resistive Random Access Memory for Future Information Processing System. Proc. IEEE 105(9): 1770-1789 (2017) - [c11]Rui Liu, Huaqiang Wu, Yachun Pang, He Qian, Shimeng Yu:
Extending 1kb RRAM array from weak PUF to strong PUF by employment of SHA module. AsianHOST 2017: 67-72 - [c10]Xiaowei Han, Qian Jia, Hongbin Sun, Longfei Wang, Huaqiang Wu, Yimao Cai, Feng Zhang, Yongyi Xie, Fangxu Dong, Xiaoguang Wang, Xiaofei Xue, Li Pang, Xiaoqing Zhao, Mengnan Wu, Pu Bai, Qi Liu, Hangbing Lv, Bing Yu, Chao Zhao, He Qian, Ru Huang, Ming Liu, Yumei Zhou, Nanning Zheng, Qiwei Ren:
A 0.13μm 64Mb HfOx ReRAM using configurable ramped voltage write and low read-disturb sensing techniques for reliability improvement. CICC 2017: 1-4 - [c9]Shan Wang, Huaqiang Wu, Bin Gao, Ning Deng, Dong Wu, He Qian:
Optimization of writing scheme on 1T1R RRAM to achieve both high speed and good uniformity. ESSDERC 2017: 14-17 - [c8]Zixuan Chen, Huaqiang Wu, Bin Gao, Peng Yao, Xinyi Li, He Qian:
Neuromorphic Computing based on Resistive RAM. ACM Great Lakes Symposium on VLSI 2017: 311-315 - 2016
- [c7]Rui Liu, Huaqiang Wu, Yachun Pang, He Qian, Shimeng Yu:
A highly reliable and tamper-resistant RRAM PUF: Design and experimental validation. HOST 2016: 13-18 - [p1]Huaqiang Wu, Yan Liao, Bin Gao, Debanjan Jana, He Qian:
RRAM Cross-Point Arrays. 3D Flash Memories 2016: 223-260 - 2015
- [c6]Xinyi Li, Huaqiang Wu, Ning Deng, He Qian:
1S1R device with self-compliance property for high density cross-point memory applications. NVMTS 2015: 1-3 - [c5]Xiangchao Ma, Huaqiang Wu, Dong Wu, He Qian:
A 16 Mb RRAM test chip based on analog power system with tunable write pulses. NVMTS 2015: 1-3 - [c4]Peng Yao, Huaqiang Wu, Bin Gao, Guo Zhang, He Qian:
The effect of variation on neuromorphic network based on 1T1R memristor array. NVMTS 2015: 1-3 - 2014
- [c3]Huaqiang Wu, Xinyi Li, Yue Bai, Ye Zhang, Minghao Wu, Zhiping Yu, He Qian:
Stack engineering for ReRAM devices performance improvement. ISCAS 2014: 846-849 - [i1]Hongbin Chen, Fangfang Zhou, Jun Cai, Zhao Feng, He Qian:
Geometric projection-based switching policy for multiple energy harvesting transmitters. CoRR abs/1405.4642 (2014) - 2013
- [j4]Yong Chen, Pui-In Mak, Li Zhang, He Qian, Yan Wang:
A Fifth-Order 20-MHz Transistorized-LC-Ladder LPF With 58.2-dB SFDR, 68-µW/Pole/MHz Efficiency, and 0.13-mm2 Die Size in 90-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 60-II(1): 11-15 (2013) - [j3]Yong Chen, Pui-In Mak, Stefano D'Amico, Li Zhang, He Qian, Yan Wang:
A Single-Branch Third-Order Pole-Zero Low-Pass Filter With 0.014-mm2 Die Size and 0.8-kHz (1.25-nW) to 0.94-GHz (3.99-mW) Bandwidth-Power Scalability. IEEE Trans. Circuits Syst. II Express Briefs 60-II(11): 761-765 (2013) - 2011
- [j2]Chunyuan Zhou, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu, He Qian:
Injection-Locking-Based Power and Speed Optimization of CML Dividers. IEEE Trans. Circuits Syst. II Express Briefs 58-II(9): 565-569 (2011) - [c2]Hongrui Wang, Dajie Zeng, Dongxu Yang, Li Zhang, Lei Zhang, Yan Wang, He Qian, Zhiping Yu:
Understanding dynamic behavior of mm-wave CML divider with injection-locking concept. ISCAS 2011: 2885-2888
2000 – 2009
- 2006
- [c1]Yibing Liu, Zhiyong Ma, He Qian, Peng Lv:
Early Identification of Machine Fault Based on Kernel Principal Components Analysis. ICICIC (3) 2006: 149-152 - 2005
- [j1]Xiaoliang Wang, Cuimei Wang, Guoxin Hu, Junxi Wang, Junxue Ran, Cebao Fang, Jianping Li, Yiping Zeng, Jinmin Li, Xinyu Liu, He Qian:
Growth and characterization of 0.8-µm gate length AlGaN/GaN HEMTs on sapphire substrates. Sci. China Ser. F Inf. Sci. 48(6): 808-814 (2005)
Coauthor Index
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