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ORCIDIntegration, Volume 57
Volume 57, March 2017
- Jaeyoung Kim
, Pinaki Mazumder:
A robust 12T SRAM cell with improved write margin for ultra-low power applications in 40 nm CMOS. 1-10 - Maede Hemmat, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram:
Hybrid TFET-MOSFET circuit: A solution to design soft-error resilient ultra-low power digital circuit. 11-19 - Rajit Karmakar, Santanu Chattopadhyay:
Temperature and data size trade-off in dictionary based test data compression. 20-33 - George Charitopoulos, Iosif Koidis, Kyprianos Papadimitriou, Dionisios N. Pnevmatikatos:
Run-time management of systems with partially reconfigurable FPGAs. 34-44 - Hongmei Chen, Yunsheng Pan, Yongsheng Yin, Fujiang Lin:
All-digital background calibration technique for timing mismatch of time-interleaved ADCs. 45-51 - Deokjin Joo, Taewhan Kim:
Clock buffer polarity assignment under useful skew constraints. 52-61 - Milad Bahadori, Mehdi Kamal, Ali Afzali-Kusha, Yasmin Afsharnezhad, Elham Zahraie Salehi:
CL-CPA: A hybrid carry-lookahead/carry-propagate adder for low-power or high-performance operation mode. 62-68 - Jie Jin:
Resonant amplifier-based sub-harmonic mixer for zero-IF transceiver applications. 69-73 - Jui-Hung Hsieh, Jian-Hao Huang, Hung-Ren Wang:
DVFS-aware motion estimation design scheme based on bandwidth-rate-distortion optimization in application processor systems. 74-80 - Navid Rahmanikia, Amirali Amiri, Hamid Noori, Farhad Mehdipour:
Performance evaluation metrics for ring-oscillator-based temperature sensors on FPGAs: A quality factor. 81-100 - Andreas Tsimpos, Andreas Christos Demartinos, Spyridon Vlassis, George Souliotis:
Jitter tolerance calibration for high-speed serial interfaces. 101-107 - Mahshid Mojtabavi Naeini, Sreedharan Baskara Dass, Chia Yee Ooi, Tomokazu Yoneda, Michiko Inoue:
An integrated DFT solution for power reduction in scan test applications by low power gating scan cell. 108-124 - Ganesh Kumar Ganjikunta, Subhendu Kumar Sahoo:
An area-efficient and low-power 64-point pipeline Fast Fourier Transform for OFDM applications. 125-131 - Libao Deng, Baoquan Zhang, Sha Wang, Chengyu Jin:
IPRM: IP core resource multiplexing of core wrapper design for reducing test application time in DVFS-based multicore SoCs. 132-146 - Ahmet Kakacak, Aydin Emre Guzel, Ozan Cihangir, Sezer Gören, H. Fatih Ugurdag:
Fast Multiplier Generator for FPGAs with LUT based Partial Product Generation and Column/row Compression. 147-157 - Masumeh Damghanian, Seyed Javad Azhari:
A low-power 6-bit MOS CML flash ADC with a novel multi-segment encoder for UWB applications. 158-168 - Michael A. Turi, José G. Delgado-Frias:
Full-VDD and near-threshold performance of 8T FinFET SRAM cells. 169-183 - Ahmad Rahati Belabad, Seyed Ahmad Motamedi, Saeed Sharifian:
An adaptive digital predistortion for compensating nonlinear distortions in RF power amplifier with memory effects. 184-191
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