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24th IOLTS 2018: Platja D'Aro, Spain
- Dimitris Gizopoulos, Dan Alexandrescu, Mihalis Maniatakos, Panagiota Papavramidou:
24th IEEE International Symposium on On-Line Testing And Robust System Design, IOLTS 2018, Platja D'Aro, Spain, July 2-4, 2018. IEEE 2018, ISBN 978-1-5386-5992-2 - Florian Cacho, D. Nouguier, M. Arabi, X. Federspiel, Y. Carminati, M. Saliva:
Integrated Test Structures for Reliability Investigation under Dynamic Stimuli. 1-5 - Somayeh Sadeghi Kohan, Arash Vafaei, Zainalabedin Navabi:
Near-Optimal Node Selection Procedure for Aging Monitor Placement. 6-11 - T. Vayssade, Florence Azaïs, Laurent Latorre, Francois Lefevre:
Low-cost functional test of a 2.4 GHz OQPSK transmitter using standard digital ATE. 17-22 - Valentin Guiterrez, Antonio J. Ginés, Gildas Léger:
AMS-RF test quality: Assessing defect severity. 23-28 - Renato S. Feitoza, Manuel J. Barragán, Salvador Mir, Daniel Dzahini:
Reduced-code static linearity test of SAR ADCs using a built-in incremental ∑Δ converter. 29-34 - Arkady Bramnik, Yiannakis Sazeides:
To Detect or to Correct? 35-38 - Hossein Bardareh, Amir M. Hajisadeghi, Hamid R. Zarandi:
A Low-Cost Soft Error Tolerant Read Circuit for Single/Multi-Level Cross-Point RRAM Arrays. 39-40 - Honorio Martín, Luis Entrena, Sophie Dupuis, Giorgio Di Natale:
A Novel Use of Approximate Circuits to Thwart Hardware Trojan Insertion and Provide Obfuscation. 41-42 - Toshinori Hosokawa, Morito Niseki, Masayoshi Yoshimura, Hiroshi Yamazaki, Masayuki Arai, Hiroyuki Yotsuyanagi, Masaki Hashizume:
A Sequentially Untestable Fault Identification Method Based on n-Bit State Cube Justification. 43-46 - Sara Carbonara, Andrea Firrincieli, Matteo Sonza Reorda, Jan-Gerd Mess:
On the test of a COTS-based system for space applications. 47-48 - Jacopo Sini, Massimo Violante:
An Automatic Approach to Perform FMEDA Safety Assessment on Hardware Designs. 49-52 - Ryota Ishikawa, Masashi Tawada, Masao Yanagisawa, Nozomu Togawa:
An Effective Stochastic Number Duplicator and Its Evaluations Using Composite Arithmetic Circuits. 53-56 - Vasileios Tenentes, Daniele Rossi, Bashir M. Al-Hashimi:
Collective-Aware System-on-Chips for Dependable IoT Applications. 57-60 - Marcello Traiola, Alessandro Savino, Mario Barbareschi, Stefano Di Carlo, Alberto Bosio:
Predicting the Impact of Functional Approximation: from Component- to Application-Level. 61-64 - Esteve Amat, Ramon Canal, Antonio Rubio:
Modem Gain-Cell Memories in Advanced Technologies. 65-68 - Shakil Mahmud, Steve J. A. Majerus, Margot S. Damaser, Robert Karam:
Design Tradeoffs in Bioimplantable Devices: A Case Study with Bladder Pressure Monitoring. 69-72 - Andrea Floridia, Ernesto Sánchez, Nikolaos Andrikos:
Development flow of on-line Software Test Libraries for asynchronous processor cores. 73-78 - Panagiotis Georgiou, Xrysovalantis Kavousianos, Riccardo Cantoro, Matteo Sonza Reorda:
Fault-Independent Test-Generation for Software-Based Self-Testing. 79-84 - Boyang Du, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Luca Sterpone:
About the functional test of the GPGPU scheduler. 85-90 - Pascal Raiola, Michael A. Kochte, Ahmed Atteya, Laura Rodríguez Gómez, Hans-Joachim Wunderlich, Bernd Becker, Matthias Sauer:
Detecting and Resolving Security Violations in Reconfigurable Scan Networks. 91-96 - Kento Hasegawa, Masao Yanagisawa, Nozomu Togawa:
Detecting the Existence of Malfunctions in Microcontrollers Utilizing Power Analysis. 97-102 - Ameya Chaudhari, Jacob A. Abraham:
Effective Control Flow Integrity Checks for Intrusion Detection. 103-108 - Elena-Ioana Vatajelu, Lorena Anghel, Jean-Michel Portal, Marc Bocquet, Guillaume Prenat:
Resistive and Spintronic RAMs: Device, Simulation, and Applications. 109-114 - Semeen Rehman, Florian Kriebel, Bharath Srinivas Prabakaran, Faiq Khalid, Muhammad Shafique:
Hardware and Software Techniques for Heterogeneous Fault-Tolerance. 115-118 - Petra R. Maier, Uzair Sharif, Daniel Mueller-Gritschneder, Ulf Schlichtmann:
Efficient Fault Injection for Embedded Systems: As Fast as Possible but as Accurate as Necessary. 119-122 - Milos Krstic, Aleksandar Simevski, Markus Ulbricht, Stefan Weidling:
Power/Area-Optimized Fault Tolerance for Safety Critical Applications. 123-126 - Amir R. B. Behrouzian, Dip Goswami, Twan Basten:
Robust co-synthesis of embedded control systems with occasional deadline misses. 127-130 - Martin Andraud, Marian Verhelst:
From on-chip self-healing to self-adaptivity in analog/RF ICs: challenges and opportunities. 131-134 - Sujay Pandey, Suvadeep Banerjee, Abhijit Chatterjee:
Error Resilient Neuromorphic Networks Using Checker Neurons. 135-138 - Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
CMOS Characterization and Compact Modelling for Circuit Reliability Simulation. 139-142 - Victor M. van Santen, Hussam Amrouch, Jörg Henkel:
Reliability Estimations of Large Circuits in Massively-Parallel GPU-SPICE. 143-146 - Jorge Gomez, Angel Abusleme, Ioannis Vourkas, Antonio Rubio:
Resistive Switching Behavior seen from the Energy Point of View. 147-150 - Ayman A. Atallah, Ghaith Bany Hamad, Otmane Aït Mohamed:
Fault-Resilient Topology Planning and Traffic Configuration for IEEE 802.1Qbv TSN Networks. 151-156 - Martin Perner, Ulrich Schmid:
Self-Stabilizing High-Speed Communication in Multi-Synchronous GALS Architectures. 157-164 - Xuebing Cao, Liyi Xiao, Linzhe Li, Jie Li, Jiaqiang Li, Jinxiang Wang:
Soft error optimization of combinational circuit based on gate sizing and multi-objective particle swarm optimization algorithm. 165-170 - Ioannis Tsiokanos, Lev Mukhanov, Dimitrios S. Nikolopoulos, Georgios Karakonstantis:
Minimization of Timing Failures in Pipelined Designs via Path Shaping and Operand Truncation. 171-176 - Yosuke Okamura, Tohru Ishihara, Hidetoshi Onodera:
Independent N-Well And P-Well Biasing For Minimum Leakage Energy Operation. 177-182 - Athanasios Chatzidimitriou, George Papadimitriou, Dimitris Gizopoulos:
HealthLog Monitor: A Flexible System-Monitoring Linux Service. 183-188 - Stefano Esposito, Serhiy Avramenko, Massimo Violante:
Efficient Software-Based Partitioning for Commercial-off-the-Shelf NoC-based MPSoCs for Mixed-Criticality Systems. 189-194 - Sayuri Ochi, Hiroshi Yamazaki, Toshinori Hosokawa, Masayoshi Yoshimura:
A Capture Safe Static Test Compaction Method Based on Don't Cares. 195-200 - Ninghan Tian, Daniel G. Saab, Jacob A. Abraham:
ESIFT: Efficient System for Error Injection. 201-206 - Theodor Hillebrand, Steffen Paul, Dagmar Peters-Drolshagen:
A New Approach to Threshold Voltage Measurements of Transistors. 207-213 - Jean-Max Dutertre, Vincent Beroulle, Philippe Candelier, Louis-Barthelemy Faber, Marie-Lise Flottes, Philippe Gendrier, David Hély, Régis Leveugle, Paolo Maistri, Giorgio Di Natale, Athanasios Papadimitriou, Bruno Rouzeyre:
The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks. 214-219 - Alexandra Listl, Daniel Mueller-Gritschneder, Fabian Kluge, Ulf Schlichtmann:
Emulation of an ASIC Power, Temperature and Aging Monitor System for FPGA Prototyping. 220-225 - Shyue-Kung Lu, Hui-Ping Li, Kohei Miyase:
Adaptive ECC Techniques for Reliability and Yield Enhancement of Phase Change Memory. 226-227 - Toshinori Hosokawa, Hiroshi Yamazaki, Shun Takeda, Masayoshi Yoshimura:
A Test Register Assignment Method Based on Controller Augmentation to Reduce the Number of Test Patterns. 228-231 - Farah Naz Taher, Mostafa Kishani, Benjamin Carrión Schäfer:
Design and Optimization of Reliable Hardware Accelerators: Leveraging the Advantages of High-Level Synthesis. 232-235 - Lev Mukhanov, Konstantinos Tovletoglou, Dimitrios S. Nikolopoulos, Georgios Karakonstantis:
DRAM Characterization under Relaxed Refresh Period Considering System Level Effects within a Commodity Server. 236-239 - Anzhela Yu. Matrosova, Sergei Ostanin, Semen Chernyshov:
Finding False Paths for Sequential Circuits Using Operations on ROBDDs. 240-242 - Mounia Kharbouche-Harrari, Jérémy Postel-Pellerin, Gregory di Pendina, Romain Wacquez, Driss Aboulkassimi, Marc Bocquet, R. Sousa, R. Delattre, Jean-Michel Portal:
Impact of a Laser Pulse on a STT-MRAM Bitcell: Security and Reliability Issues. 243-244 - Stefano Esposito, Jacopo Sini, Massimo Violante:
Real-Time Validation of Fault-Tolerant Mixed-Criticality Systems. 245-246 - Robert Schmidt, Rehab Massoud, Jaan Raik, Alberto García Ortiz, Rolf Drechsler:
Reliability Improvements for Multiprocessor Systems by Health-Aware Task Scheduling. 247-250 - Ghislain Takam Tchendjou, Emmanuel Simeu:
Self-Healing Imager Based on Detection and Conciliation of Defective Pixels. 251-254 - Ondrej Novák:
Test Compression Using Extended Nonlinear Binary Codes. 255-256 - Muhammad Abdullah Hanif, Faiq Khalid, Rachmad Vidya Wicaksana Putra, Semeen Rehman, Muhammad Shafique:
Robust Machine Learning Systems: Reliability and Security for Deep Neural Networks. 257-260 - Md Imran Momtaz, Suvadeep Banerjee, Sujay Pandey, Jacob A. Abraham, Abhijit Chatterjee:
Cross-Layer Control Adaptation for Autonomous System Resilience. 261-264 - Anteneh Gebregiorgis, Mehdi Baradaran Tahoori:
Reliability And Performance Challenges Of Ultra-Low Voltage Caches: A Trade-Off Analysis. 265-268 - Alberto Carelli, Alessandro Vallero, Stefano Di Carlo:
Shielding Performance Monitor Counters: a double edged weapon for safety and security. 269-274 - Shervin Roshanisefat, Harshith K. Thirumala, Kris Gaj, Houman Homayoun, Avesta Sasan:
Benchmarking the Capabilities and Limitations of SAT Solvers in Defeating Obfuscation Schemes. 275-280 - Naghmeh Karimi, Jean-Luc Danger, Sylvain Guilley:
On the Effect of Aging in Detecting Hardware Trojan Horses with Template Analysis. 281-286 - Jacopo Sini, Matteo Sonza Reorda, Massimo Violante, Peter Sarson:
Towards an automatic approach for hardware verification according to ISO 26262 functional safety standard. 287-290 - Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt, Vincent Pouget, Alberto Bosio:
Performances VS Reliability: how to exploit Approximate Computing for Safety-Critical applications. 291-294
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