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ORCID27th ARITH 2020: Portland, OR, USA
- 27th IEEE Symposium on Computer Arithmetic, ARITH 2020, Portland, OR, USA, June 7-10, 2020. IEEE 2020, ISBN 978-1-7281-7120-3
- Javier Hormigo, Julio Villalba-Moreno, Sonia Gonzalez-Navarro
:
Floating-Point Fused Multiply-Add under HUB Format. 1-8 - Sylvie Boldo, Diane Gallois-Wong, Thibault Hilaire:
A Correctly-Rounded Fixed-Point-Arithmetic Dot-Product Algorithm. 9-16 - Andreas Böttcher, Keanu Kullmann, Martin Kumm:
Heuristics for the Design of Large Multipliers for FPGAs. 17-24 - Jeff Johnson:
Efficient, arbitrarily high precision hardware logarithmic arithmetic for linear algebra. 25-32 - Zhen Gu, Shuguo Li:
A Novel Method of Modular Multiplication Based on Karatsuba-like Multiplication. 33-40 - Stef Graillat, Vincent Lefèvre, Jean-Michel Muller:
Alternative Split Functions and Dekker's Product. 41-47 - Mioara Joldes, Jean-Michel Muller:
Algorithms for Manipulating Quaternions in Floating-Point Arithmetic. 48-55 - Yoann Marquer, Tania Richmond:
A Hole in the Ladder : Interleaved Variables in Iterative Conditional Branching. 56-63 - Rami Elkhatib, Reza Azarderakhsh, Mehran Mozaffari Kermani:
Highly Optimized Montgomery Multiplier for SIKE Primes on FPGA. 64-71 - Mojtaba Bisheh-Niasar, Rami El Khatib, Reza Azarderakhsh, Mehran Mozaffari Kermani:
Fast, Small, and Area-Time Efficient Architectures for Key-Exchange on Curve25519. 72-79 - Jean-Claude Bajard, Julien Eynard, Paulo Martins, Leonel Sousa, Vincent Zucca:
An asymptotically faster version of FV supported on HPR. 80-87 - Kleanthis Papachatzopoulos, Vassilis Paliouras:
Maximum Delay Models for Parallel-Prefix Adders in the Presence of Threshold Voltage Variations. 88-95 - Alberto Nannarelli:
Variable Precision 16-Bit Floating-Point Vector Unit for Embedded Processors. 96-102 - Christoph Quirin Lauter, Anastasia Volkova:
A Framework for Semi-Automatic Precision and Accuracy Analysis for Fast and Rigorous Deep Learning. 103-110 - Peter Lindstrom:
Variable-Radix Coding of the Reals. 111-116 - Samuel Coward, Theo Drane, Yoav Harel:
Automatic Design Space Exploration for an Error Tolerant Application. 117-120 - David Defour, Pablo de Oliveira Castro, Matei Istoan, Eric Petit:
Custom-Precision Mathematical Library Explorations for Code Profiling and Optimization. 121-124 - Stefan Payer, Cédric Lichtenau, Michael Klein, Kerstin Schelm, Petra Leber, Nicol Hofmann, Tina Babinsky:
SIMD Multi Format Floating-Point Unit on the IBM z15(TM). 125-128 - Mantas Mikaitis:
Issues with rounding in the GCC implementation of the ISO 18037: 2008 standard fixed-point arithmetic. 129-132 - Brian Hickmann, Jieasheng Chen, Michael Rotzin, Andrew Yang, Maciej Urbanski, Sasikanth Avancha:
Intel Nervana Neural Network Processor-T (NNP-T) Fused Floating Point Many-Term Dot Product. 133-136
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