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Douglas W. Clark
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- Clark Douglas Asay
- Douglas Clark
- Douglas B. Clark
- Douglas E. R. Clark (aka: Doug E. R. Clark)
- Douglas P. Clark
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2000 – 2009
- 2006
- [j21]Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David M. Brooks:
Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance. IEEE Micro 26(1): 119-129 (2006) - 2005
- [j20]Grant Wallace, Otto J. Anshus, Peng Bi, Han Chen, Yuqun Chen, Douglas W. Clark, Perry R. Cook, Adam Finkelstein, Thomas A. Funkhouser, Anoop Gupta, Matthew A. Hibbs, Kai Li, Zhiyan Liu, Rudrajit Samanta, Rahul Sukthankar, Olga G. Troyanskaya:
Tools and Applications for Large-Scale Display Walls. IEEE Computer Graphics and Applications 25(4): 24-33 (2005) - [j19]Qiang Wu, Philo Juang, Margaret Martonosi, Li-Shiuan Peh, Douglas W. Clark:
Formal Control Techniques for Power-Performance Management. IEEE Micro 25(5): 52-62 (2005) - [c33]Qiang Wu, Philo Juang, Margaret Martonosi, Douglas W. Clark:
Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain Processors. HPCA 2005: 178-189 - [c32]Philo Juang, Qiang Wu, Li-Shiuan Peh, Margaret Martonosi, Douglas W. Clark:
Coordinated, distributed, formal energy management of chip multiprocessors. ISLPED 2005: 127-130 - [c31]Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David M. Brooks:
A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance. MICRO 2005: 271-282 - 2004
- [j18]Philo Juang, Kevin Skadron, Margaret Martonosi, Zhigang Hu, Douglas W. Clark, Phil Diodato, Stefanos Kaxiras:
Implementing branch-predictor decay using quasi-static memory cells. ACM Trans. Archit. Code Optim. 1(2): 180-219 (2004) - [c30]Qiang Wu, Philo Juang, Margaret Martonosi, Douglas W. Clark:
Formal online methods for voltage/frequency control in multiple clock domain microprocessors. ASPLOS 2004: 248-259 - [c29]Qiang Wu, Artem Pyatakov, Alexey Spiridonov, Easwaran Raman, Douglas W. Clark, David I. August:
Exposing Memory Access Regularities Using Object-Relative Memory Profiling. CGO 2004: 315-324 - 2002
- [j17]Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Zhigang Hu, Margaret Martonosi, Douglas W. Clark:
Implementing Decay Techniques using 4T Quasi-Static Memory Cells. IEEE Comput. Archit. Lett. 1 (2002) - [c28]Zhigang Hu, Philo Juang, Kevin Skadron, Douglas W. Clark, Margaret Martonosi:
Applying Decay Strategies to Branch Predictors for Leakage Energy Savings. ICCD 2002: 442-445 - [c27]Zhigang Hu, Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Margaret Martonosi, Douglas W. Clark:
Managing leakage for transient data: decay and quasi-static 4T memory cells. ISLPED 2002: 52-55 - 2001
- [c26]Han Chen, Douglas W. Clark, Zhiyan Liu, Grant Wallace, Kai Li, Yuqun Chen:
Software Environments For Cluster-Based Display Systems. CCGRID 2001: 202-211 - 2000
- [j16]Kai Li, Han Chen, Yuqun Chen, Douglas W. Clark, Perry R. Cook, Stefanos N. Damianakis, Georg Essl, Adam Finkelstein, Thomas A. Funkhouser, Timothy C. Housel, Allison W. Klein, Zhiyan Liu, Emil Praun, Rudrajit Samanta, Ben Shedd, Jaswinder Pal Singh, George Tzanetakis, Jiannan Zheng:
Building and Using A Scalable Display Wall System. IEEE Computer Graphics and Applications 20(4): 29-37 (2000) - [j15]Kevin Skadron, Margaret Martonosi, Douglas W. Clark:
Speculative Updates of Local and Global Branch History: A Quantitative Analysis. J. Instr. Level Parallelism 2 (2000) - [c25]Kevin Skadron, Margaret Martonosi, Douglas W. Clark:
A Taxonomy of Branch Mispredictions, and Alloyed Prediction as a Robust Solution to Wrong-History Mispredictions. IEEE PACT 2000: 199-206 - [c24]Yuqun Chen, Douglas W. Clark, Adam Finkelstein, Timothy C. Housel, Kai Li:
Automatic alignment of high-resolution multi-projector display using an un-calibrated camera. IEEE Visualization 2000: 125-130
1990 – 1999
- 1999
- [j14]Kevin Skadron, Pritpal S. Ahuja, Margaret Martonosi, Douglas W. Clark:
Branch Prediction, Instruction-Window Size, and Cache Size: Performance Trade-Offs and Simulation Techniques. IEEE Trans. Computers 48(11): 1260-1281 (1999) - [c23]Yuanyuan Zhou, Limin Wang, Douglas W. Clark, Kai Li:
Thread Scheduling for Out-of-core Applications with Memory Server on Multicomputers. IOPADS 1999: 57-67 - [c22]Cheng Liao, Margaret Martonosi, Douglas W. Clark:
An Adaptive Globally-Synchronizing Clock Algorithm and its Implementation on a Myrinet-based PC Cluster. SIGMETRICS 1999: 200-201 - [c21]Cheng Liao, Margaret Martonosi, Douglas W. Clark:
Experience with an Adaptive Globally-Synchronizing Clock Algorithm. SPAA 1999: 106-114 - 1998
- [c20]Bin Wei, Douglas W. Clark, Edward W. Felten, Kai Li:
Performance Issues of a Distributed Frame Buffer on a Multicomputer. Workshop on Graphics Hardware 1998: 87-96 - [c19]Pritpal S. Ahuja, Kevin Skadron, Margaret Martonosi, Douglas W. Clark:
Multipath Execution: Opportunities and Limits. International Conference on Supercomputing 1998: 101-108 - [c18]Cheng Liao, Dongming Jiang, Liviu Iftode, Margaret Martonosi, Douglas W. Clark:
Monitoring Shared Virtual Memory Performance on a Myrinet-based PC Cluster. International Conference on Supercomputing 1998: 251-258 - [c17]Joel S. Emer, Douglas W. Clark:
Retrospective: Characterization of Processor Performance in the VAX-11/780. 25 Years ISCA: Retrospectives and Reprints 1998: 37-38 - [c16]Joel S. Emer, Douglas W. Clark:
A Characterization of Processor Performance in the VAX-11/780. 25 Years ISCA: Retrospectives and Reprints 1998: 274-283 - [c15]Matthias A. Blumrich, Richard Alpert, Yuqun Chen, Douglas W. Clark, Stefanos N. Damianakis, Cezary Dubnicki, Edward W. Felten, Liviu Iftode, Kai Li, Margaret Martonosi, Robert A. Shillner:
Design Choices in the SHRIMP System: An Empirical Study. ISCA 1998: 330-341 - [c14]Kevin Skadron, Pritpal S. Ahuja, Margaret Martonosi, Douglas W. Clark:
Improving Prediction for Procedure Returns with Return-address-stack Repair Mechanisms. MICRO 1998: 259-271 - [c13]Cheng Liao, Margaret Martonosi, Douglas W. Clark:
Performance monitoring in a Myrinet-connected SHRIMP cluster. SPDT 1998: 21-29 - 1997
- [c12]Kevin Skadron, Douglas W. Clark:
Design Issues and Tradeoffs for Write Buffers. HPCA 1997: 144-155 - 1996
- [c11]Edward W. Felten, Richard Alpert, Angelos Bilas, Matthias A. Blumrich, Douglas W. Clark, Stefanos N. Damianakis, Cezary Dubnicki, Liviu Iftode, Kai Li:
Early Experience with Message-Passing on the SHRIMP Multicomputer. ISCA 1996: 296-307 - [c10]Margaret Martonosi, Douglas W. Clark, Malena R. Mesarina:
The SHRIMP performance monitor: design and applications. SPDT 1996: 61-69 - 1995
- [c9]Gordon Stoll, Bin Wei, Douglas W. Clark, Edward W. Felten, Kai Li, Pat Hanrahan:
Evaluating Multi-Port Frame Buffer Designs for a Mesh-Connected Multicomputer. ISCA 1995: 96-105 - [c8]Pritpal S. Ahuja, Douglas W. Clark, Anne Rogers:
The performance impact of incomplete bypassing in processor pipelines. MICRO 1995: 36-45 - [c7]Bin Wei, Gordon Stoll, Douglas W. Clark, Edward W. Felten, Kai Li, Patrick M. Hanrahan:
Synchronization for a multi-port frame buffer on a mesh-connected multicomputer. PRS 1995: 81-88 - 1994
- [j13]Douglas W. Clark, Lih-Jyh Weng:
Maximal and Near-Maximal Shift Register Seqyences: Efficient Event Counters and Easy Discrete Logarithms. IEEE Trans. Computers 43(5): 560-568 (1994) - [c6]Matthias A. Blumrich, Douglas W. Clark, Cezary Dubnicki, Edward W. Felten, Kai Li, Malena R. Mesarina:
Two virtual memory mapped network interface designs. Hot Interconnects 1994: 209-217 - [e1]Forest Baskett, Douglas W. Clark:
ASPLOS-VI Proceedings - Sixth International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 4-7, 1994. ACM Press 1994, ISBN 0-89791-660-3 [contents] - 1991
- [c5]Dileep Bhandarkar, Douglas W. Clark:
Performance From Architecture: Comparing a RISC and CISC with Similar Hardware Organization. ASPLOS 1991: 310-319
1980 – 1989
- 1988
- [c4]Douglas W. Clark, Peter J. Bannon, James B. Keller:
Measuring VAX 8800 Performance with a Histogram Hardware Monitor. ISCA 1988: 176-185 - 1987
- [c3]Douglas W. Clark:
Pipelining and Performance in the VAX 8800 Processor. ASPLOS 1987: 173-177 - 1985
- [j12]Douglas W. Clark, Joel S. Emer:
Performance of the VAX-11/780 Translation Buffer: Simulation and Measurement. ACM Trans. Comput. Syst. 3(1): 31-62 (1985) - 1984
- [c2]Joel S. Emer, Douglas W. Clark:
A Characterization of Processor Performance in the VAX-11/780. ISCA 1984: 301-310 - 1983
- [j11]Douglas W. Clark:
Cache Performance in the VAX-11/780. ACM Trans. Comput. Syst. 1(1): 24-37 (1983) - 1982
- [j10]Henry M. Levy, Douglas W. Clark:
On the use of benchmarks for measuring system performance. SIGARCH Comput. Archit. News 10(6): 5-8 (1982) - [c1]Douglas W. Clark, Henry M. Levy:
Measurement and analysis of instruction use in the VAX-11/780. ISCA 1982: 9-17 - 1981
- [j9]Douglas W. Clark, Butler W. Lampson, Kenneth A. Pier:
The Memory System of a High-Performance Personal Computer. IEEE Trans. Computers 30(10): 715-733 (1981) - 1980
- [j8]Douglas W. Clark, William D. Strecker:
Comments on "the case for the reduced instruction set computer, " by Patterson and Ditzel. SIGARCH Comput. Archit. News 8(6): 34-38 (1980)
1970 – 1979
- 1979
- [j7]Daniel G. Bobrow, Douglas W. Clark:
Compact Encodings of List Structure. ACM Trans. Program. Lang. Syst. 1(2): 266-286 (1979) - [j6]Douglas W. Clark:
Measurements of Dynamic List Structure Use in Lisp. IEEE Trans. Software Eng. 5(1): 51-59 (1979) - 1978
- [j5]Douglas W. Clark:
A Fast Algorithm for Copying List Structures. Commun. ACM 21(5): 351-357 (1978) - [j4]Douglas W. Clark, C. Cordell Green:
A Note on Shared List Structure in LISP. Inf. Process. Lett. 7(6): 312-314 (1978) - 1977
- [j3]Douglas W. Clark, C. Cordell Green:
An Empirical Study of List Structure in Lisp. Commun. ACM 20(2): 78-87 (1977) - 1976
- [j2]Douglas W. Clark:
An Efficient List-Moving Algorithm Using Constant Workspace. Commun. ACM 19(6): 352-354 (1976) - 1975
- [j1]Douglas W. Clark:
A Fast Algorithm for Copying Binary Trees. Inf. Process. Lett. 4(3): 62-63 (1975)
Coauthor Index
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