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Robert Wille
Person information
- affiliation: Technical University of Munich, Germany
- affiliation (former): Johannes Kepler University Linz, Austria
- affiliation (former): University of Bremen, Germany
Other persons with a similar name
- Willem Robert van Hage — Free University of Amsterdam, Netherlands
- Paulo Roberto Wille
- Robert Willecke
- Robert Willenbring
- Robert L. Willett
- Robert Willetts
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2020 – today
- 2024
- [j99]Max Sponner, Lorenzo Servadei, Bernd Waschneck, Robert Wille, Akash Kumar:
Leveraging Temporal Patterns: Automated Augmentation to Create Temporal Early Exit Networks for Efficient Edge AI. IEEE Access 12: 169787-169804 (2024) - [j98]Fatemeh Serajeh-hassani, Mohammad Sadrosadati, Nezam Rohbani, Sebastian Pointner, Robert Wille, Hamid Sarbazi-Azad:
An Efficient FPGA Architecture with Turn-Restricted Switch Boxes. ACM Trans. Design Autom. Electr. Syst. 29(3): 42:1-42:18 (2024) - [c368]Daniel Schönberger, Stefan Hillmich, Matthias Brandl, Robert Wille:
Using Boolean Satisfiability for Exact Shuttling in Trapped-Ion Quantum Computers. ASPDAC 2024: 127-133 - [c367]Jan Drewniok, Marcel Walter, Robert Wille:
The Need for Speed: Efficient Exact Simulation of Silicon Dangling Bond Logic. ASPDAC 2024: 576-581 - [c366]Stefan Engels, Robert Wille:
Towards an Optimization Pipeline for the Design of Train Control Systems with Hybrid Train Detection (Short Paper). ATMOS 2024: 12:1-12:6 - [c365]Kevin Mato, Stefan Hillmich, Robert Wille:
Mixed-Dimensional Qudit State Preparation Using Edge-Weighted Decision Diagrams. DAC 2024: 50:1-50:6 - [c364]Rongliang Fu, Robert Wille, Tsung-Yi Ho:
RCGP: An Automatic Synthesis Framework for Reversible Quantum-Flux-Parametron Logic Circuits based on Efficient Cartesian Genetic Programming. DAC 2024: 219:1-219:6 - [c363]Ludwig Schmid, Sunghye Park, Robert Wille:
Hybrid Circuit Mapping: Leveraging the Full Spectrum of Computational Capabilities of Neutral Atom Quantum Computers. DAC 2024: 267:1-267:6 - [c362]Simon Toni Hofmann, Marcel Walter, Robert Wille:
Late Breaking Results: Wiring Reduction for Field-coupled Nanotechnologies. DAC 2024: 342:1-342:2 - [c361]Carmen G. Almudéver, Robert Wille, Fabio Sebastiano, Nadia Haider, Eduard Alarcón:
From Designing Quantum Processors to Large-Scale Quantum Computing Systems. DATE 2024: 1-10 - [c360]Maria Emmerich, Philipp Ebner, Robert Wille:
Design Automation for Organs-on-Chip. DATE 2024: 1-6 - [c359]Stefan Engels, Robert Wille:
Late Breaking Results: Iterative Design Automation for Train Control with Hybrid Train Detection. DATE 2024: 1-2 - [c358]Simon Toni Hofmann, Marcel Walter, Robert Wille:
MNT Bench: Benchmarking Software and Layout Libraries for Field-Coupled Nanocomputing. DATE 2024: 1-2 - [c357]Daniel Schönberger, Stefan Hillmich, Matthias Brandl, Robert Wille:
Towards Cycle-based Shuttling for Trapped-Ion Quantum Computers (Extended Abstract). DATE 2024: 1-2 - [c356]Marcel Walter, Jeremiah Croshaw, Samuel Sze Hang Ng, Konrad Walus, Robert A. Wolkow, Robert Wille:
Towards Atomic Defect-Aware Physical Design of Silicon Dangling Bond Logic on the H -Si $(100)-2\times 1$ Surface. DATE 2024: 1-2 - [c355]Robert Wille:
Design Automation for Quantum Computing: Intermediate Stage Report of the ERC Consolidator Grant "DAQC". DATE 2024: 1-6 - [c354]Stefan Engels, Robert Wille:
Comparing Lazy Constraint Selection Strategies in Train Routing with Moving Block Control. FedCSIS 2024: 585-590 - [c353]Max Sponner, Lorenzo Servadei, Bernd Waschneck, Robert Wille, Akash Kumar:
Harnessing Temporal Information for Efficient Edge AI. FMEC 2024: 5-13 - [c352]Georg Kruse, Theodora-Augustina Dragan, Robert Wille, Jeanette Miriam Lorenz:
Variational Quantum Circuit Design for Quantum Reinforcement Learning on Continuous Environments. ICAART (3) 2024: 393-400 - [c351]Xiangyuan Peng, Miao Tang, Huawei Sun, Kay Bierzynski, Lorenzo Servadei, Robert Wille:
MUFASA: Multi-view Fusion and Adaptation Network with Spatial Awareness for Radar Object Detection. ICANN (2) 2024: 168-184 - [c350]Shui Jiang, Rongliang Fu, Lukas Burgholzer, Robert Wille, Tsung-Yi Ho, Tsung-Wei Huang:
FlatDD: A High-Performance Quantum Circuit Simulator using Decision Diagram and Flat Array. ICPP 2024: 388-399 - [c349]Jagatheesan Kunasaikaran, Kevin Mato, Robert Wille:
A Framework for the Design and Realization of Alternative Superconducting Quantum Architectures. ISMVL 2024: 91-96 - [c348]Simon Toni Hofmann, Marcel Walter, Lorenzo Servadei, Robert Wille:
Thinking Outside the Clock: Physical Design for Field-coupled Nanocomputing with Deep Reinforcement Learning. ISQED 2024: 1-8 - [c347]Benjamin Hien, Marcel Walter, Victor M. van Santen, Florian Klemme, Shivendra Singh Parihar, Girish Pahwa, Yogesh Singh Chauhan, Hussam Amrouch, Robert Wille:
Technology Mapping for Cryogenic CMOS Circuits. ISVLSI 2024: 272-277 - [c346]Philipp Ebner, Robert Wille:
Automatic Validation and Design of Microfluidic Devices Following the ISO 22916 Standard. ISVLSI 2024: 278-283 - [c345]Huawei Sun, Hao Feng, Gianfranco Mauro, Julius Ott, Georg Stettinger, Lorenzo Servadei, Robert Wille:
Enhanced Radar Perception via Multi-Task Learning: Towards Refined Data for Sensor Fusion Applications. IV 2024: 3179-3184 - [c344]S. Bruckner, Flavio Ferrarotti, Rudolf Ramler, Robert Wille, Stefan Hillmich:
Towards Solving Short-Term Generation Scheduling Problems on Quantum Computers. PROFES (Industry-, Workshop-, and Doctoral Symposium Papers) 2024: 164-170 - [c343]Robert Wille, Lucas Berent, Tobias Forster, Jagatheesan Kunasaikaran, Kevin Mato, Tom Peham, Nils Quetschlich, Damian Rovara, Aaron Sander, Ludwig Schmid, Daniel Schönberger, Yannick Stade, Lukas Burgholzer:
The MQT Handbook : A Summary of Design Automation Tools and Software for Quantum Computing. QSW 2024: 1-8 - [c342]Deborah Volpe, Nils Quetschlich, Mariagrazia Graziano, Giovanna Turvani, Robert Wille:
Towards an Automatic Framework for Solving Optimization Problems with Quantum Computers. QSW 2024: 46-57 - [c341]Nils Quetschlich, Florian J. Kiwit, Maximilian A. Wolf, Carlos A. Riofrío, Lukas Burgholzer, Andre Luckow, Robert Wille:
Towards Application-Aware Quantum Circuit Compilation. QSW 2024: 135-142 - [c340]Aaron Sander, Ioan-Albert Florea, Lukas Burgholzer, Robert Wille:
Stripping Quantum Decision Diagrams of their Identity. QSW 2024: 168-174 - [c339]Hannes Sochor, Flavio Ferrarotti, Robert Wille:
GrammarForge: Learning Program Input Grammars for Fuzz Testing. SEFM 2024: 272-289 - [c338]Sneha Lahiri, Megha Kesh, Rupsa Mandal, Anirban Bhattacharjee, Sovan Bhattacharya, Dola Sinha, Chandan Bandyopadhyay, Laxmidhar Biswal, Robert Wille, Rolf Drechsler:
A Dynamic Programming Based Graph Traversal Approach for Efficient Implementation of Nearest Neighbor Architecture in 2D. VLSID 2024: 306-311 - [c337]Sarah Seifi, Tobias Sukianto, Maximilian Strobel, Cecilia Carbonelli, Lorenzo Servadei, Robert Wille:
XentricAI: A Gesture Sensing Calibration Approach Through Explainable and User-Centric AI. xAI (3) 2024: 232-246 - [c336]Korbinian Staudacher, Ludwig Schmid, Johannes Zeiher, Robert Wille, Dieter Kranzlmüller:
Multi-controlled Phase Gate Synthesis with ZX-calculus applied to Neutral Atom Hardware. QPL 2024: 96-116 - [d7]Lucas Berent, Lukas Burgholzer, Peter-Jan H. S. Derks, Jens Eisert, Robert Wille:
Dataset containing raw threshold and runtime simulation data for a paper evaluation on decoding quantum color codes. Version 2. Zenodo, 2024 [all versions] - [i83]Max Sponner, Lorenzo Servadei, Bernd Waschneck, Robert Wille, Akash Kumar:
Efficient Post-Training Augmentation for Adaptive Inference in Heterogeneous and Distributed IoT Environments. CoRR abs/2403.07957 (2024) - [i82]Max Sponner, Lorenzo Servadei, Bernd Waschneck, Robert Wille, Akash Kumar:
Temporal Decisions: Leveraging Temporal Correlation for Efficient Decisions in Early Exit Neural Networks. CoRR abs/2403.07958 (2024) - [i81]Huawei Sun, Hao Feng, Gianfranco Mauro, Julius Ott, Georg Stettinger, Lorenzo Servadei, Robert Wille:
Enhanced Radar Perception via Multi-Task Learning: Towards Refined Data for Sensor Fusion Applications. CoRR abs/2404.06165 (2024) - [i80]Xiaotian Xu, Kuan-Cheng Chen, Robert Wille:
HamilToniQ: An Open-Source Benchmark Toolkit for Quantum Computers. CoRR abs/2404.13971 (2024) - [i79]Kuan-Cheng Chen, Tai-Yue Li, Yun-Yuan Wang, Simon See, Chun-Chieh Wang, Robert Wille, Nan-Yow Chen, An-Cheng Yang, Chun-Yu Lin:
cuTN-QSVM: cuTensorNet-accelerated Quantum Support Vector Machine with cuQuantum SDK. CoRR abs/2405.02630 (2024) - [i78]Georg Kruse, Rodrigo Coehlo, Andreas Rosskopf, Robert Wille, Jeanette Miriam Lorenz:
Hamiltonian-based Quantum Reinforcement Learning for Neural Combinatorial Optimization. CoRR abs/2405.07790 (2024) - [i77]Yannick Stade, Ludwig Schmid, Lukas Burgholzer, Robert Wille:
An Abstract Model and Efficient Routing for Logical Entangling Gates on Zoned Neutral Atom Architectures. CoRR abs/2405.08068 (2024) - [i76]Robert Wille, Lucas Berent, Tobias Forster, Jagatheesan Kunasaikaran, Kevin Mato, Tom Peham, Nils Quetschlich, Damian Rovara, Aaron Sander, Ludwig Schmid, Daniel Schönberger, Yannick Stade, Lukas Burgholzer:
The MQT Handbook: A Summary of Design Automation Tools and Software for Quantum Computing. CoRR abs/2405.17543 (2024) - [i75]Stefan Engels, Robert Wille:
Comparing Lazy Constraint Selection Strategies in Train Routing with Moving Block Control. CoRR abs/2405.18977 (2024) - [i74]Aaron Sander, Ioan-Albert Florea, Lukas Burgholzer, Robert Wille:
Stripping Quantum Decision Diagrams of their Identity. CoRR abs/2406.11959 (2024) - [i73]Deborah Volpe, Nils Quetschlich, Mariagrazia Graziano, Giovanna Turvani, Robert Wille:
Towards an Automatic Framework for Solving Optimization Problems with Quantum Computers. CoRR abs/2406.12840 (2024) - [i72]Timo Hillmann, Lucas Berent, Armanda Ottaviano Quintavalle, Jens Eisert, Robert Wille, Joschka Roffe:
Localized statistics decoding: A parallel decoding algorithm for quantum low-density parity-check codes. CoRR abs/2406.18655 (2024) - [i71]Huawei Sun, Hao Feng, Julius Ott, Lorenzo Servadei, Robert Wille:
CaFNet: A Confidence-Driven Framework for Radar Camera Depth Estimation. CoRR abs/2407.00697 (2024) - [i70]Xiangyuan Peng, Miao Tang, Huawei Sun, Kay Bierzynski, Lorenzo Servadei, Robert Wille:
MUFASA: Multi-View Fusion and Adaptation Network with Spatial Awareness for Radar Object Detection. CoRR abs/2408.00565 (2024) - [i69]Deborah Volpe, Nils Quetschlich, Mariagrazia Graziano, Giovanna Turvani, Robert Wille:
A Predictive Approach for Selecting the Best Quantum Solver for an Optimization Problem. CoRR abs/2408.03613 (2024) - [i68]Tom Peham, Ludwig Schmid, Lucas Berent, Markus Müller, Robert Wille:
Automated Synthesis of Fault-Tolerant State Preparation Circuits for Quantum Error Correction Codes. CoRR abs/2408.11894 (2024) - [i67]Nils Quetschlich, Tobias Forster, Adrian Osterwind, Domenik Helms, Robert Wille:
Towards Equivalence Checking of Classical Circuits Using Quantum Computing. CoRR abs/2408.14539 (2024) - [i66]Huawei Sun, Zixu Wang, Hao Feng, Julius Ott, Lorenzo Servadei, Robert Wille:
GET-UP: GEomeTric-aware Depth Estimation with Radar Points UPsampling. CoRR abs/2409.02720 (2024) - [i65]Kevin Mato, Martin Ringbauer, Lukas Burgholzer, Robert Wille:
MQT Qudits: A Software Framework for Mixed-Dimensional Quantum Computing. CoRR abs/2410.02854 (2024) - [i64]Aaron Sander, Lukas Burgholzer, Robert Wille:
Equivalence Checking of Quantum Circuits via Intermediary Matrix Product Operator. CoRR abs/2410.10946 (2024) - [i63]Sarah Seifi, Tobias Sukianto, Cecilia Carbonelli, Lorenzo Servadei, Robert Wille:
Interpretable Rule-Based System for Radar-Based Gesture Sensing: Enhancing Transparency and Personalization in AI. CoRR abs/2410.12806 (2024) - 2023
- [j97]Gianfranco Mauro, Ignacio Martinez-Rodriguez, Julius Ott, Lorenzo Servadei, Robert Wille, Manuel P. Cuéllar, Diego P. Morales-Santos:
Context-adaptable radar-based people counting via few-shot learning. Appl. Intell. 53(21): 25359-25387 (2023) - [j96]Lorenzo Servadei, Jin Hwa Lee, José Antonio Arjona-Medina, Michael Werner, Sepp Hochreiter, Wolfgang Ecker, Robert Wille:
Deep Reinforcement Learning for Optimization at Early Design Stages. IEEE Des. Test 40(1): 43-51 (2023) - [j95]Ian O'Connor, Robert Wille, Andy D. Pimentel, Valeria Bertacco:
Postpandemic Conferences: The DATE 2023 Experience. IEEE Des. Test 40(5): 104-112 (2023) - [j94]Nils Quetschlich, Lukas Burgholzer, Robert Wille:
MQT Bench: Benchmarking Software and Design Automation Tools for Quantum Computing. Quantum 7: 1062 (2023) - [j93]Atif Mashkoor, Alexander Egyed, Robert Wille, Sebastian Stock:
Model-driven engineering of safety and security software systems: A systematic mapping study and future research directions. J. Softw. Evol. Process. 35(7) (2023) - [j92]Xing Huang, Youlin Pan, Zhen Chen, Wenzhong Guo, Lu Wang, Qingshan Li, Robert Wille, Tsung-Yi Ho, Ulf Schlichtmann:
Design Automation for Continuous-Flow Lab-on-a-Chip Systems: A One-Pass Paradigm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1): 327-331 (2023) - [j91]Philipp Ebner, Gerold Fink, Robert Wille:
Channel Routing for Microfluidic Devices: A Comprehensive and Accessible Design Tool. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(2): 533-543 (2023) - [j90]Thomas Grurl, Jürgen Fuß, Robert Wille:
Noise-Aware Quantum Circuit Simulation With Decision Diagrams. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(3): 860-873 (2023) - [j89]Lukas Burgholzer, Alexander Ploier, Robert Wille:
Simulation Paths for Quantum Circuit Simulation With Decision Diagrams What to Learn From Tensor Networks, and What Not. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4): 1113-1122 (2023) - [j88]Daniela Sánchez, Lorenzo Servadei, Gamze Naz Kiprit, Robert Wille, Wolfgang Ecker:
A Comprehensive Survey on Electronic Design Automation and Graph Neural Networks: Theory and Applications. ACM Trans. Design Autom. Electr. Syst. 28(2): 15:1-15:27 (2023) - [c335]Sarah Schneider, Lukas Burgholzer, Robert Wille:
A SAT Encoding for Optimal Clifford Circuit Synthesis. ASP-DAC 2023: 190-195 - [c334]Kevin Mato, Martin Ringbauer, Stefan Hillmich, Robert Wille:
Compilation of Entangling Gates for High-Dimensional Quantum Systems. ASP-DAC 2023: 202-208 - [c333]Lukas Burgholzer, Robert Wille:
Exploiting Reversible Computing for Verification: Potential, Possible Paths, and Consequences. ASP-DAC 2023: 429-435 - [c332]Tom Peham, Lukas Burgholzer, Robert Wille:
Equivalence Checking of Parameterized Quantum Circuits: Verifying the Compilation of Variational Quantum Algorithms. ASP-DAC 2023: 702-708 - [c331]Lucas Berent, Lukas Burgholzer, Robert Wille:
Software Tools for Decoding Quantum Low-Density Parity-Check Codes. ASP-DAC 2023: 709-714 - [c330]Stefan Engels, Tom Peham, Robert Wille:
A Symbolic Design Method for ETCS Hybrid Level 3 at Different Degrees of Accuracy. ATMOS 2023: 6:1-6:17 - [c329]Carla Piazza, Riccardo Romanello, Robert Wille:
An ASP Approach for the Synthesis of CNOT Minimal Quantum Circuits. CILC 2023 - [c328]Simon Toni Hofmann, Marcel Walter, Lorenzo Servadei, Robert Wille:
Late Breaking Results From Hybrid Design Automation for Field-coupled Nanotechnologies. DAC 2023: 1-2 - [c327]Nils Quetschlich, Lukas Burgholzer, Robert Wille:
Compiler Optimization for Quantum Computing Using Reinforcement Learning. DAC 2023: 1-6 - [c326]Victor M. van Santen, Marcel Walter, Florian Klemme, Shivendra Singh Parihar, Girish Pahwa, Yogesh Singh Chauhan, Robert Wille, Hussam Amrouch:
Design Automation for Cryogenic CMOS Circuits. DAC 2023: 1-6 - [c325]Gerold Fink, Florina Costamoling, Philipp Ebner, Robert Wille:
Efficient Simulation of Droplet Merging in Channel-Based Microfluidic Devices. DSD 2023: 539-544 - [c324]Philipp Ebner, Robert Wille:
CFD for Microfluidics: A Workflow for Setting Up the Simulation of Microfluidic Devices. DSD 2023: 770-775 - [c323]Michael Artner, Guenter Wallner, Robert Wille:
Introducing QRogue: Teaching Quantum Computing Using a Rogue-like Game Concept. FDG 2023: 42:1-42:4 - [c322]Julius Ott, Lorenzo Servadei, Jose A. Arjona-Medina, Enrico Rinaldi, Gianfranco Mauro, Daniela Sanchez Lopera, Michael Stephan, Thomas Stadelmayer, Avik Santra, Robert Wille:
MEET: A Monte Carlo Exploration-Exploitation Trade-Off for Buffer Sampling. ICASSP 2023: 1-5 - [c321]Tina Mitteramskogler, Rafael Ecker, Andreas Fuchsluger, Thomas Wilfinger, Robert Wille, Bernhard Jakoby:
Analysis of Liquid Morphologies in Curved Open Microchannels. SENSORS 2023: 1-4 - [c320]Nils Quetschlich, Lukas Burgholzer, Robert Wille:
Towards an Automated Framework for Realizing Quantum Computing Solutions. ISMVL 2023: 134-140 - [c319]Thomas Grurl, Jürgen Fuß, Robert Wille:
Optimized Density Matrix Representations : Improving the Basis for Noise-Aware Quantum Circuit Design Tools. ISMVL 2023: 141-146 - [c318]Robert Wille, Lukas Burgholzer:
MQT QMAP: Efficient Quantum Circuit Mapping. ISPD 2023: 198-204 - [c317]Marcel Walter, Benjamin Hien, Robert Wille:
Versatile Signal Distribution Networks for Scalable Placement and Routing of Field-coupled Nanocomputing Technologies. ISVLSI 2023: 1-6 - [c316]Huawei Sun, Hao Feng, Georg Stettinger, Lorenzo Servadei, Robert Wille:
Multi-Task Cross-Modality Attention-Fusion for 2D Object Detection. ITSC 2023: 3619-3626 - [c315]Sebastian A. Schober, Cecilia Carbonelli, Robert Wille:
An IoT-Based Anomaly Detection and Identification Approach for Gas Sensor Networks. MetroInd4.0&IoT 2023: 415-420 - [c314]Jan Drewniok, Marcel Walter, Robert Wille:
Minimal Design of SiDB Gates: An Optimal Basis for Circuits Based on Silicon Dangling Bonds. NANOARCH 2023: 5:1-5:6 - [c313]Marcel Walter, Jan Drewniok, Samuel Sze Hang Ng, Konrad Walus, Robert Wille:
Reducing the Complexity of Operational Domain Computation in Silicon Dangling Bond Logic. NANOARCH 2023: 9:1-9:6 - [c312]Simon Toni Hofmann, Marcel Walter, Robert Wille:
Post-Layout Optimization for Field-coupled Nanotechnologies. NANOARCH 2023: 10:1-10:6 - [c311]Aaron Sander, Lukas Burgholzer, Robert Wille:
Towards Hamiltonian Simulation with Decision Diagrams. QCE 2023: 283-294 - [c310]Martin Schulz, Laura Brandon Schulz, Martin Ruefenacht, Robert Wille:
Towards the Munich Quantum Software Stack: Enabling Efficient Access and Tool Support for Quantum Computers. QCE 2023: 399-400 - [c309]Nils Quetschlich, Vincent Koch, Lukas Burgholzer, Robert Wille:
A Hybrid Classical Quantum Computing Approach to the Satellite Mission Planning Problem. QCE 2023: 642-647 - [c308]Nils Quetschlich, Lukas Burgholzer, Robert Wille:
Reducing the Compilation Time of Quantum Circuits Using Pre-Compilation on the Gate Level. QCE 2023: 757-767 - [c307]Tom Peham, Nina Brandl, Richard Kueng, Robert Wille, Lukas Burgholzer:
Depth-Optimal Synthesis of Clifford Circuits with SAT Solvers. QCE 2023: 802-813 - [c306]Kevin Mato, Stefan Hillmich, Robert Wille:
Mixed-Dimensional Quantum Circuit Simulation with Decision Diagrams. QCE 2023: 978-989 - [c305]Nils Quetschlich, Lukas Burgholzer, Robert Wille:
Predicting Good Quantum Circuit Compilation Options. QSW 2023: 43-53 - [c304]Benedikt Poggel, Nils Quetschlich, Lukas Burgholzer, Robert Wille, Jeanette Miriam Lorenz:
Recommending Solution Paths for Solving Optimization Problems with Quantum Computing. QSW 2023: 60-67 - [c303]Kevin Mato, Stefan Hillmich, Robert Wille:
Compression of Qubit Circuits: Mapping to Mixed-Dimensional Quantum Systems. QSW 2023: 155-161 - [c302]Lieuwe Vinkhuijzen, Thomas Grurl, Stefan Hillmich, Sebastiaan Brand, Robert Wille, Alfons Laarman:
Efficient Implementation of LIMDDs for Quantum Circuit Simulation. SPIN 2023: 3-21 - [c301]Thomas Grurl, Christoph Pichler, Jürgen Fuß, Robert Wille:
Automatic Implementation and Evaluation of Error-Correcting Codes for Quantum Computing: An Open-Source Framework for Quantum Error Correction. VLSID 2023: 301-306 - [d6]Lucas Berent, Lukas Burgholzer, Peter-Jan H. S. Derks, Jens Eisert, Robert Wille:
Dataset containing raw threshold and runtime simulation data for a paper evaluation on decoding quantum color codes. Version 1. Zenodo, 2023 [all versions] - [d5]Lucas Berent, Timo Hillmann, Jens Eisert, Robert Wille, Joschka Roffe:
Dataset containing raw simulation data for a paper on decoding bosonic quantum LDPC codes. Zenodo, 2023 - [d4]Ludwig Schmid, David F. Locher, Sebastian Blatt, Johannes Zeiher, Markus Müller, Robert Wille, Manuel Rispler:
Evaluation data for "Computational Capabilities and Compiler Development for Neutral Atom Quantum Processors - Connecting Tool Developers and Hardware Experts". Version 1. Zenodo, 2023 [all versions] - [d3]Ludwig Schmid, David F. Locher, Sebastian Blatt, Johannes Zeiher, Markus Müller, Robert Wille, Manuel Rispler:
Evaluation data for "Computational Capabilities and Compiler Development for Neutral Atom Quantum Processors - Connecting Tool Developers and Hardware Experts". Version 2. Zenodo, 2023 [all versions] - [i62]Robert Wille, Lukas Burgholzer, Stefan Hillmich, Thomas Grurl, Alexander Ploier, Tom Peham:
The Basis of Design Tools for Quantum Computing: Arrays, Decision Diagrams, Tensor Networks, and ZX-Calculus. CoRR abs/2301.04147 (2023) - [i61]Robert Wille, Lukas Burgholzer:
MQT QMAP: Efficient Quantum Circuit Mapping. CoRR abs/2301.11935 (2023) - [i60]Lukas Burgholzer, Alexander Ploier, Robert Wille:
Tensor Networks or Decision Diagrams? Guidelines for Classical Quantum Circuit Simulation. CoRR abs/2302.06616 (2023) - [i59]Tom Peham, Nina Brandl, Richard Kueng, Robert Wille, Lukas Burgholzer:
Depth-Optimal Synthesis of Clifford Circuits with SAT Solvers. CoRR abs/2305.01674 (2023) - [i58]Aaron Sander, Lukas Burgholzer, Robert Wille:
Towards Hamiltonian Simulation with Decision Diagrams. CoRR abs/2305.02337 (2023) - [i57]Jagatheesan Kunasaikaran, Kevin Mato, Robert Wille:
A Framework for the Design and Realization of Alternative Superconducting Quantum Architectures. CoRR abs/2305.07052 (2023) - [i56]Sarah Seifi, Sebastian A. Schober, Cecilia Carbonelli, Lorenzo Servadei, Robert Wille:
Detection of Sensor-To-Sensor Variations using Explainable AI. CoRR abs/2306.10850 (2023) - [i55]Huawei Sun, Hao Feng, Georg Stettinger, Lorenzo Servadei, Robert Wille:
Multi-Task Cross-Modality Attention-Fusion for 2D Object Detection. CoRR abs/2307.08339 (2023) - [i54]Stefan Engels, Tom Peham, Judith Przigoda, Nils Przigoda, Robert Wille:
Design Tasks and Their Complexity for Hybrid Level 3 of the European Train Control System. CoRR abs/2308.02572 (2023) - [i53]Max Sponner, Julius Ott, Lorenzo Servadei, Bernd Waschneck, Robert Wille, Akash Kumar:
Temporal Patience: Efficient Adaptive Deep Learning for Embedded Radar Data Processing. CoRR abs/2309.05686 (2023) - [i52]Ludwig Schmid, David F. Locher, Manuel Rispler, Sebastian Blatt, Johannes Zeiher, Markus Müller, Robert Wille:
Computational Capabilities and Compiler Development for Neutral Atom Quantum Processors: Connecting Tool Developers and Hardware Experts. CoRR abs/2309.08656 (2023) - [i51]Michel Takken, Robert Wille:
Accelerating CFD Simulations of Microfluidic Devices by Exploiting Higher Levels of Abstraction. CoRR abs/2310.05557 (2023) - [i50]Lucas Berent, Timo Hillmann, Jens Eisert, Robert Wille, Joschka Roffe:
Analog information decoding of bosonic quantum LDPC codes. CoRR abs/2311.01328 (2023) - [i49]Marcel Walter, Jeremiah Croshaw, Samuel Sze Hang Ng, Konrad Walus, Robert A. Wolkow, Robert Wille:
Atomic Defect-Aware Physical Design of Silicon Dangling Bond Logic on the H-Si(100)2x1 Surface. CoRR abs/2311.12042 (2023) - [i48]Ludwig Schmid, Sunghye Park, Seokhyeong Kang, Robert Wille:
Hybrid Circuit Mapping: Leveraging the Full Spectrum of Computational Capabilities of Neutral Atom Quantum Computers. CoRR abs/2311.14164 (2023) - 2022
- [j87]Gerold Fink, Tina Mitteramskogler, Marcus A. Hintermüller, Bernhard Jakoby, Robert Wille:
Automatic Design of Microfluidic Gradient Generators. IEEE Access 10: 28155-28164 (2022) - [j86]Lukas Burgholzer, Robert Wille, Richard Kueng:
Characteristics of reversible circuits for error detection. Array 14: 100165 (2022) - [j85]Maria D. Vieira, Samuel S. H. Ng, Marcel Walter, Robert Wille, Konrad Walus, Ricardo S. Ferreira, Omar P. Vilela Neto, José Augusto Miranda Nacif:
Three-Input NPN Class Gate Library for Atomic Silicon Quantum Dots. IEEE Des. Test 39(6): 147-155 (2022) - [j84]Tom Peham, Lukas Burgholzer, Robert Wille:
Equivalence Checking of Quantum Circuits With the ZX-Calculus. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(3): 662-675 (2022) - [j83]Robert Wille, Rolf Drechsler:
Introduction to the Special Issue on Design Automation for Quantum Computing. ACM J. Emerg. Technol. Comput. Syst. 18(1): 10:1-10:2 (2022) - [j82]Michel Takken, Robert Wille:
Simulation of Pressure-Driven and Channel-Based Microfluidics on Different Abstract Levels: A Case Study. Sensors 22(14): 5392 (2022) - [j81]Gerold Fink, Florina Costamoling, Robert Wille:
MMFT Droplet Simulator: Efficient Simulation of Droplet-based Microfluidic Devices. Softw. Impacts 14: 100440 (2022) - [j80]Smaran Adarsh, Lukas Burgholzer, Tanmay Manjunath, Robert Wille:
SyReC Synthesizer: An MQT tool for synthesis of reversible circuits. Softw. Impacts 14: 100451 (2022) - [j79]Rana Elnaggar, Lorenzo Servadei, Shubham Mathur, Robert Wille, Wolfgang Ecker, Krishnendu Chakrabarty:
Accurate and Robust Malware Detection: Running XGBoost on Runtime Data From Performance Counters. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2066-2079 (2022) - [j78]Sudip Poddar, Gerold Fink, Werner Haselmayr, Robert Wille:
A Generic Sample Preparation Approach for Different Microfluidic Labs-on-Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4612-4625 (2022) - [c300]Gerold Fink, Philipp Ebner, Sudip Poddar, Robert Wille:
Improving the Robustness of Microfluidic Networks. ASP-DAC 2022: 68-73 - [c299]Lukas Burgholzer, Sarah Schneider, Robert Wille:
Limiting the Search Space in Optimal Quantum Circuit Mapping. ASP-DAC 2022: 466-471 - [c298]Sebastian A. Schober, Cecilia Carbonelli, Robert Wille:
Gas Discrimination Analysis of Neural Network Algorithms for a Graphene-Based Electronic Nose. CIVEMSA 2022: 1-6 - [c297]Tom Peham, Lukas Burgholzer, Robert Wille:
Equivalence checking paradigms in quantum circuit design: a case study. DAC 2022: 517-522 - [c296]Lukas Burgholzer, Robert Wille:
Handling non-unitaries in quantum circuit equivalence checking. DAC 2022: 529-534 - [c295]Marcel Walter, Samuel Sze Hang Ng, Konrad Walus, Robert Wille:
Hexagons are the bestagons: design automation for silicon dangling bond logic. DAC 2022: 739-744 - [c294]Robert Wille, Lukas Burgholzer, Stefan Hillmich, Thomas Grurl, Alexander Ploier, Tom Peham:
The basis of design tools for quantum computing: arrays, decision diagrams, tensor networks, and ZX-calculus. DAC 2022: 1367-1370 - [c293]Gerold Fink, Philipp Ebner, Robert Wille:
Comprehensive and Accessible Channel Routing for Microfluidic Devices. DATE 2022: 44-47 - [c292]Lukas Burgholzer, Alexander Ploier, Robert Wille:
Exploiting Arbitrary Paths for the Simulation of Quantum Circuits with Decision Diagrams. DATE 2022: 64-67 - [c291]Gerold Fink, Medina Hamidovic, Werner Haselmayr, Robert Wille:
A Concept Towards Pressure-Controlled Microfluidic Networks. DDECS 2022: 118-123 - [c290]Katja Bühler, Cornelia Travnicek, Veronika Nowak, Edgar R. Weippl, Lukas Fischer, Rudolf Ramler, Robert Wille:
Twenty Years of Successful Translational Research: A Case Study of Three COMET Centers. DEXA Workshops 2022: 155-166 - [c289]Lorenzo Servadei, Huawei Sun, Julius Ott, Michael Stephan, Souvik Hazra, Thomas Stadelmayer, Daniela Sanchez Lopera, Robert Wille, Avik Santra:
Label-Aware Ranked Loss for Robust People Counting Using Automotive In-Cabin Radar. ICASSP 2022: 3883-3887 - [c288]Julius Ott, Lorenzo Servadei, Gianfranco Mauro, Thomas Stadelmayer, Avik Santra, Robert Wille:
Uncertainty-based Meta-Reinforcement Learning for Robust Radar Tracking. ICMLA 2022: 1476-1483 - [c287]Huawei Sun, Lorenzo Servadei, Hao Feng, Michael Stephan, Avik Santra, Robert Wille:
Utilizing Explainable AI for improving the Performance of Neural Networks. ICMLA 2022: 1775-1782 - [c286]Souvik Hazra, Hao Feng, Gamze Naz Kiprit, Michael Stephan, Lorenzo Servadei, Robert Wille, Robert Weigel, Avik Santra:
Cross-modal Learning of Graph Representations using Radar Point Cloud for Long-Range Gesture Recognition. SAM 2022: 350-354 - [c285]Somu Goswami, Christian Bretthauer, Andreas Bogner, Abhiraj Basavanna, Sebastian Anzinger, Marco Haubold, Gunar Lorenz, Johann Strasser, Daniel Weber, Lorenzo Servadei, Robert Wille:
Compact High-Performance Vibration Sensor Based on Single-Backplate MEMS Technology. IEEE SENSORS 2022: 1-4 - [c284]Amirmohammad Biuki, Naser Mohammadzadeh, Robert Wille, Sahar Sargaran:
Exact Mapping of Quantum Circuit Partitions to Building Blocks of the SAQIP Architecture. ISVLSI 2022: 402-405 - [c283]Marcel Walter, Robert Wille:
Efficient Multi-Path Signal Routing for Field-coupled Nanotechnologies. NANOARCH 2022: 7:1-7:6 - [c282]Willem Lambooy, Marcel Walter, Robert Wille:
Exploiting the Third Dimension: Stackable Quantum-dot Cellular Automata. NANOARCH 2022: 9:1-9:6 - [c281]Kevin Mato, Martin Ringbauer, Stefan Hillmich, Robert Wille:
Adaptive Compilation of Multi-Level Quantum Operations. QCE 2022: 484-491 - [c280]Stefan Hillmich, Lukas Burgholzer, Florian Stögmüller, Robert Wille:
Reordering Decision Diagrams for Quantum Computing Is Harder Than You Might Think. RC 2022: 93-107 - [c279]Tom Peham, Judith Przigoda, Nils Przigoda, Robert Wille:
Optimal Railway Routing Using Virtual Subsections. RSSRail 2022: 63-79 - [c278]Lucas Berent, Lukas Burgholzer, Robert Wille:
Towards a SAT Encoding for Quantum Circuits: A Journey From Classical Circuits to Clifford Circuits and Beyond. SAT 2022: 18:1-18:17 - [i47]Lucas Berent, Lukas Burgholzer, Robert Wille:
Towards a SAT Encoding for Quantum Circuits: A Journey From Classical Circuits to Clifford Circuits and Beyond. CoRR abs/2203.00698 (2022) - [i46]Lukas Burgholzer, Alexander Ploier, Robert Wille:
Simulation Paths for Quantum Circuit Simulation with Decision Diagrams. CoRR abs/2203.00703 (2022) - [i45]Souvik Hazra, Hao Feng, Gamze Naz Kiprit, Michael Stephan, Lorenzo Servadei, Robert Wille, Robert Weigel, Avik Santra:
Cross-modal Learning of Graph Representations using Radar Point Cloud for Long-Range Gesture Recognition. CoRR abs/2203.17066 (2022) - [i44]Nils Quetschlich, Lukas Burgholzer, Robert Wille:
MQT Bench: Benchmarking Software and Design Automation Tools for Quantum Computing. CoRR abs/2204.13719 (2022) - [i43]Sarah Schneider, Lukas Burgholzer, Robert Wille:
A SAT Encoding for Optimal Clifford Circuit Synthesis. CoRR abs/2208.11713 (2022) - [i42]Tom Peham, Lukas Burgholzer, Robert Wille:
Equivalence Checking of Quantum Circuits with the ZX-Calculus. CoRR abs/2208.12820 (2022) - [i41]Lucas Berent, Lukas Burgholzer, Robert Wille:
Software Tools for Decoding Quantum Low-Density Parity Check Codes. CoRR abs/2209.01180 (2022) - [i40]Huawei Sun, Lorenzo Servadei, Hao Feng, Michael Stephan, Robert Wille, Avik Santra:
Utilizing Explainable AI for improving the Performance of Neural Networks. CoRR abs/2210.04686 (2022) - [i39]Nils Quetschlich, Lukas Burgholzer, Robert Wille:
Predicting Good Quantum Circuit Compilation Options. CoRR abs/2210.08027 (2022) - [i38]Tom Peham, Lukas Burgholzer, Robert Wille:
On Optimal Subarchitectures for Quantum Circuit Mapping. CoRR abs/2210.09321 (2022) - [i37]Tom Peham, Lukas Burgholzer, Robert Wille:
Equivalence Checking of Parameterized Quantum Circuits: Verifying the Compilation of Variational Quantum Algorithms. CoRR abs/2210.12166 (2022) - [i36]Julius Ott, Lorenzo Servadei, Jose A. Arjona-Medina, Enrico Rinaldi, Gianfranco Mauro, Daniela Sanchez Lopera, Michael Stephan, Thomas Stadelmayer, Avik Santra, Robert Wille:
MEET: A Monte Carlo Exploration-Exploitation Trade-off for Buffer Sampling. CoRR abs/2210.13545 (2022) - [i35]Julius Ott, Lorenzo Servadei, Gianfranco Mauro, Thomas Stadelmayer, Avik Santra, Robert Wille:
Uncertainty-based Meta-Reinforcement Learning for Robust Radar Tracking. CoRR abs/2210.14532 (2022) - [i34]Nils Quetschlich, Lukas Burgholzer, Robert Wille:
Towards an Automated Framework for Realizing Quantum Computing Solutions. CoRR abs/2210.14928 (2022) - [i33]Nils Quetschlich, Lukas Burgholzer, Robert Wille:
Compiler Optimization for Quantum Computing Using Reinforcement Learning. CoRR abs/2212.04508 (2022) - [i32]Smaran Adarsh, Lukas Burgholzer, Tanmay Manjunath, Robert Wille:
SyReC Synthesizer: An MQT tool for synthesis of reversible circuits. CoRR abs/2212.05903 (2022) - 2021
- [j77]Anirban Bhattacharjee, Chandan Bandyopadhyay, Angshu Mukherjee, Robert Wille, Rolf Drechsler, Hafizur Rahaman:
An ant colony based mapping of quantum circuits to nearest neighbor architectures. Integr. 78: 11-24 (2021) - [j76]Felix Gemeinhardt, Robert Wille, Manuel Wimmer:
Quantum k-community detection: algorithm proposals and cross-architectural evaluation. Quantum Inf. Process. 20(9): 302 (2021) - [j75]Lukas Burgholzer, Robert Wille:
QCEC: A JKQ tool for quantum circuit equivalence checking. Softw. Impacts 7: 100051 (2021) - [j74]Mohammed Shayan, Sukanta Bhattacharjee, Robert Wille, Krishnendu Chakrabarty, Ramesh Karri:
How Secure Are Checkpoint-Based Defenses in Digital Microfluidic Biochips? IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(1): 143-156 (2021) - [j73]Gerold Fink, Medina Hamidovic, Werner Haselmayr, Robert Wille:
Automatic Design of Droplet-Based Microfluidic Ring Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(2): 339-349 (2021) - [j72]Lukas Burgholzer, Robert Wille:
Advanced Equivalence Checking for Quantum Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(9): 1810-1824 (2021) - [j71]Arighna Deb, Gerhard W. Dueck, Robert Wille:
Exploring the Potential Benefits of Alternative Quantum Computing Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(9): 1825-1835 (2021) - [j70]Sudip Poddar, Tapalina Banerjee, Robert Wille, Bhargab B. Bhattacharya:
Robust Multi-Target Sample Preparation on MEDA Biochips Obviating Waste Production. ACM Trans. Design Autom. Electr. Syst. 26(1): 7:1-7:29 (2021) - [j69]Naser Mohammadzadeh, Robert Wille, Oliver Keszöcze:
Efficient One-pass Synthesis for Digital Microfluidic Biochips. ACM Trans. Design Autom. Electr. Syst. 26(4): 27:1-27:21 (2021) - [c277]Gerold Fink, Philipp Ebner, Medina Hamidovic, Werner Haselmayr, Robert Wille:
Accurate and Efficient Simulation of Microfluidic Networks. ASP-DAC 2021: 85-90 - [c276]Marcel Walter, Winston Haaswijk, Robert Wille, Frank Sill Torres, Rolf Drechsler:
One-pass Synthesis for Field-coupled Nanocomputing Technologies. ASP-DAC 2021: 574-580 - [c275]Lukas Burgholzer, Richard Kueng, Robert Wille:
Random Stimuli Generation for the Verification of Quantum Circuits. ASP-DAC 2021: 767-772 - [c274]Stefan Hillmich, Alwin Zulehner, Robert Wille:
Exploiting Quantum Teleportation in Quantum Circuit Mapping. ASP-DAC 2021: 792-797 - [c273]Stefan Hillmich, Richard Kueng, Igor L. Markov, Robert Wille:
As Accurate as Needed, as Efficient as Possible: Approximations in DD-based Quantum Circuit Simulation. DATE 2021: 188-193 - [c272]Thomas Grurl, Richard Kueng, Jürgen Fuß, Robert Wille:
Stochastic Quantum Circuit Simulation Using Decision Diagrams. DATE 2021: 194-199 - [c271]Sudip Poddar, Gerold Fink, Werner Haselmayr, Robert Wille:
Generic Sample Preparation for Different Microfluidic Platforms. DATE 2021: 336-339 - [c270]Oliver Keszöcze, Naser Mohammadzadeh, Robert Wille:
Exact Physical Design of Quantum Circuits for Ion-Trap-based Quantum Architectures. DATE 2021: 344-349 - [c269]Robert Wille, Lukas Burgholzer, Michael Artner:
Visualizing Decision Diagrams for Quantum Computing (Special Session Summary). DATE 2021: 768-773 - [c268]Robert Wille, Tom Peham, Judith Przigoda, Nils Przigoda:
Towards Automatic Design and Verification for Level 3 of the European Train Control System. DATE 2021: 974-979 - [c267]Xing Huang, Youlin Pan, Zhen Chen, Wenzhong Guo, Robert Wille, Tsung-Yi Ho, Ulf Schlichtmann:
BigIntegr: One-Pass Architectural Synthesis for Continuous-Flow Microfluidic Lab-on-a-Chip Systems. ICCAD 2021: 1-8 - [c266]Sebastian Pointner, Sven Wenzek, Robert Wille:
SMT-Based Placement for System-on-Chip Design. ISCAS 2021: 1-5 - [c265]Thomas Grurl, Jürgen Fuß, Robert Wille:
Lessons Learnt in the Implementation of Quantum Circuit Simulation Using Decision Diagrams. ISMVL 2021: 87-92 - [c264]Daniela Sanchez Lopera, Lorenzo Servadei, Gamze Naz Kiprit, Souvik Hazra, Robert Wille, Wolfgang Ecker:
A Survey of Graph Neural Networks for Electronic Design Automation. MLCAD 2021: 1-6 - [c263]Fritjof Bornebusch, Christoph Lüth, Robert Wille, Rolf Drechsler:
Performance Aspects of Correctness-oriented Synthesis Flows. MODELSWARD 2021: 76-86 - [c262]Medina Hamidovic, Gerold Fink, Robert Wille, Andreas Springer, Werner Haselmayr:
Practical Assessment of Payload- Header Switching in Microfluidic Networks. NANOCOM 2021: 12:1-12:6 - [c261]Stefan Hillmich, Charles Hadfield, Rudy Raymond, Antonio Mezzacapo, Robert Wille:
Decision Diagrams for Quantum Measurements with Shallow Circuits. QCE 2021: 24-34 - [c260]Lukas Burgholzer, Hartwig Bauer, Robert Wille:
Hybrid Schrödinger-Feynman Simulation of Quantum Circuits With Decision Diagrams. QCE 2021: 199-206 - [c259]Lukas Burgholzer, Rudy Raymond, Indranil Sengupta, Robert Wille:
Efficient Construction of Functional Representations for Quantum Algorithms. RC 2021: 227-241 - [d2]Atif Mashkoor, Robert Wille, Alexander Egyed, Sebastian Stock:
Data for a mapping study about the usage of MDE in Safety and Security Domain. Version 2. Zenodo, 2021 [all versions] - [d1]Atif Mashkoor, Robert Wille, Alexander Egyed, Sebastian Stock:
Data for a mapping study about the usage of MDE in Safety and Security Domain. Version 1. Zenodo, 2021 [all versions] - [i31]Lukas Burgholzer, Rudy Raymond, Indranil Sengupta, Robert Wille:
Efficient Construction of Functional Representations for Quantum Algorithms. CoRR abs/2103.08281 (2021) - [i30]Stefan Hillmich, Charles Hadfield, Rudy Raymond, Antonio Mezzacapo, Robert Wille:
Decision Diagrams for Quantum Measurements with Shallow Circuits. CoRR abs/2105.06932 (2021) - [i29]Lukas Burgholzer, Hartwig Bauer, Robert Wille:
Hybrid Schrödinger-Feynman Simulation of Quantum Circuits With Decision Diagrams. CoRR abs/2105.07045 (2021) - [i28]Lukas Burgholzer, Robert Wille:
Towards Verification of Dynamic Quantum Circuits. CoRR abs/2106.01099 (2021) - [i27]Lorenzo Servadei, Huawei Sun, Julius Ott, Michael Stephan, Souvik Hazra, Thomas Stadelmayer, Daniela Sanchez Lopera, Robert Wille, Avik Santra:
Label-Aware Ranked Loss for robust People Counting using Automotive in-cabin Radar. CoRR abs/2110.05876 (2021) - [i26]Lukas Burgholzer, Sarah Schneider, Robert Wille:
Limiting the Search Space in Optimal Quantum Circuit Mapping. CoRR abs/2112.00045 (2021) - 2020
- [j68]Gerold Fink, Medina Hamidovic, Andreas Springer, Robert Wille, Werner Haselmayr:
Design and realization of flexible droplet-based lab-on-a-chip devices. Elektrotech. Informationstechnik 137(3): 113-120 (2020) - [j67]Kevin Verma, Christopher McCabe, Chong Peng, Robert Wille:
A PCISPH implementation using distributed multi-GPU acceleration for simulating industrial engineering applications. Int. J. High Perform. Comput. Appl. 34(4) (2020) - [j66]Phrangboklang Lyngton Thangkhiew, Alwin Zulehner, Robert Wille, Kamalika Datta, Indranil Sengupta:
An efficient memristor crossbar architecture for mapping Boolean functions using Binary Decision Diagrams (BDD). Integr. 71: 125-133 (2020) - [j65]Frank Sill Torres, Philipp Niemann, Robert Wille, Rolf Drechsler:
Near Zero-Energy Computation Using Quantum-Dot Cellular Automata. ACM J. Emerg. Technol. Comput. Syst. 16(1): 11:1-11:16 (2020) - [j64]Kevin Verma, Hui Cao, Prithvi Mandapalli, Robert Wille:
Modeling and simulation of electrophoretic deposition coatings. J. Comput. Sci. 41: 101075 (2020) - [j63]Frank Sill Torres, Pedro Arthur Silva, Geraldo Fontes, Marcel Walter, José Augusto Miranda Nacif, Ricardo Santos Ferreira, Omar Paranaiba Vilela Neto, Jeferson F. Chaves, Robert Wille, Philipp Niemann, Daniel Große, Rolf Drechsler:
On the impact of the synchronization constraint and interconnections in quantum-dot cellular automata. Microprocess. Microsystems 76: 103109 (2020) - [j62]Philipp Niemann, Robert Wille, Rolf Drechsler:
Advanced exact synthesis of Clifford+T circuits. Quantum Inf. Process. 19(1) (2020) - [j61]Lorenzo Servadei, Edoardo Mosca, Elena Zennaro, Keerthikumara Devarajegowda, Michael Werner, Wolfgang Ecker, Robert Wille:
Accurate Cost Estimation of Memory Systems Utilizing Machine Learning and Solutions from Computer Vision for Design Automation. IEEE Trans. Computers 69(6): 856-867 (2020) - [j60]Andreas Grimmer, Werner Haselmayr, Robert Wille:
Automatic Droplet Sequence Generation for Microfluidic Networks With Passive Droplet Routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(2): 387-396 (2020) - [j59]Sukanta Bhattacharjee, Robert Wille, Juinn-Dar Huang, Bhargab B. Bhattacharya:
Storage-Aware Algorithms for Dilution and Mixture Preparation With Flow-Based Lab-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(4): 816-829 (2020) - [j58]Abhoy Kole, Stefan Hillmich, Kamalika Datta, Robert Wille, Indranil Sengupta:
Improved Mapping of Quantum Circuits to IBM QX Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2375-2383 (2020) - [j57]Ying Zhu, Xing Huang, Bing Li, Tsung-Yi Ho, Qin Wang, Hailong Yao, Robert Wille, Ulf Schlichtmann:
Multicontrol: Advanced Control-Logic Synthesis for Flow-Based Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2489-2502 (2020) - [j56]Gerold Fink, Andreas Grimmer, Medina Hamidovic, Werner Haselmayr, Robert Wille:
Robustness Analysis for Droplet-Based Microfluidic Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2696-2707 (2020) - [j55]Philipp Niemann, Alwin Zulehner, Rolf Drechsler, Robert Wille:
Overcoming the Tradeoff Between Accuracy and Compactness in Decision Diagrams for Quantum Computation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4657-4668 (2020) - [j54]Xiaotong Cui, Samah Mohamed Saeed, Alwin Zulehner, Robert Wille, Kaijie Wu, Rolf Drechsler, Ramesh Karri:
On the Difficulty of Inserting Trojans in Reversible Computing Architectures. IEEE Trans. Emerg. Top. Comput. 8(4): 960-972 (2020) - [j53]Pushpita Roy, Ansuman Banerjee, Robert Wille, Bhargab B. Bhattacharya:
Harnessing the Granularity of Micro-Electrode-Dot-Array Architectures for Optimizing Droplet Routing in Biochips. ACM Trans. Design Autom. Electr. Syst. 25(1): 10:1-10:37 (2020) - [c258]Stefan Hillmich, Alwin Zulehner, Robert Wille:
Concurrency in DD-based Quantum Circuit Simulation. ASP-DAC 2020: 115-120 - [c257]Alwin Zulehner, Stefan Hillmich, Igor L. Markov, Robert Wille:
Approximation of Quantum States Using Decision Diagrams. ASP-DAC 2020: 121-126 - [c256]Lukas Burgholzer, Robert Wille:
Improved DD-based Equivalence Checking of Quantum Circuits. ASP-DAC 2020: 127-132 - [c255]Fritjof Bornebusch, Christoph Lüth, Robert Wille, Rolf Drechsler:
Towards Automatic Hardware Synthesis from Formal Specification to Implementation. ASP-DAC 2020: 375-380 - [c254]Lukas Burgholzer, Robert Wille:
The Power of Simulation for Equivalence Checking in Quantum Computing. DAC 2020: 1-6 - [c253]Stefan Hillmich, Igor L. Markov, Robert Wille:
Just Like the Real Thing: Fast Weak Simulation of Quantum Computation. DAC 2020: 1-6 - [c252]Marcel Walter, Robert Wille, Frank Sill Torres, Daniel Große, Rolf Drechsler:
Verification for Field-coupled Nanocomputing Circuits. DAC 2020: 1-6 - [c251]Arighna Deb, Gerhard W. Dueck, Robert Wille:
Towards Exploring the Potential of Alternative Quantum Computing Architectures. DATE 2020: 682-685 - [c250]Carmen G. Almudéver, Lingling Lao, Robert Wille, Gian Giacomo Guerreschi:
Realizing Quantum Algorithms on Real Quantum Computing Devices. DATE 2020: 864-872 - [c249]Martin Ring, Fritjof Bornebusch, Christoph Lüth, Robert Wille, Rolf Drechsler:
Verification Runtime Analysis: Get the Most Out of Partial Verification. DATE 2020: 873-878 - [c248]Sebastian Pointner, Pablo González de Aledo, Robert Wille:
YASSi: Yet Another Symbolic Simulator Large (Tool Demo). DEXA Workshops 2020: 25-31 - [c247]Umberto Garlando, Marcel Walter, Robert Wille, Fabrizio Riente, Frank Sill Torres, Rolf Drechsler:
ToPoliNano and fiction: Design Tools for Field-coupled Nanocomputing. DSD 2020: 408-415 - [c246]Lorenzo Servadei, Edoardo Mosca, Keerthikumara Devarajegowda, Michael Werner, Wolfgang Ecker, Robert Wille:
Cost Estimation for Configurable Model-Driven SoC Designs Using Machine Learning. ACM Great Lakes Symposium on VLSI 2020: 405-410 - [c245]Thomas Grurl, Jürgen Fuß, Robert Wille:
Considering Decoherence Errors in the Simulation of Quantum Circuits Using Decision Diagrams. ICCAD 2020: 140:1-140:7 - [c244]Robert Wille, Stefan Hillmich, Lukas Burgholzer:
JKQ: JKU Tools for Quantum Computing. ICCAD 2020: 154:1-154:5 - [c243]Sebastian A. Schober, Cecilia Carbonelli, Alexandra Roth, Alexander Zoepfl, Robert Wille:
Towards Drift Modeling of Graphene-Based Gas Sensors Using Stochastic Simulation Techniques. IEEE SENSORS 2020: 1-4 - [c242]Robert Wille, Stefan Hillmich, Lukas Burgholzer:
Efficient and Correct Compilation of Quantum Circuits. ISCAS 2020: 1-5 - [c241]Oliver Keszöcze, Robert Wille, Rolf Drechsler:
One-pass Synthesis for Digital Microfluidic Biochips: A Survey. ISDCS 2020: 1-6 - [c240]Anirban Bhattacharjee, Chandan Bandyopadhyay, Angshu Mukherjee, Robert Wille, Rolf Drechsler, Hafizur Rahaman:
Efficient Implementation of Nearest Neighbor Quantum Circuits Using Clustering with Genetic Algorithm. ISMVL 2020: 40-45 - [c239]Thomas Grurl, Jürgen Fuß, Stefan Hillmich, Lukas Burgholzer, Robert Wille:
Arrays vs. Decision Diagrams: A Case Study on Quantum Circuit Simulators. ISMVL 2020: 176-181 - [c238]Marcel Walter, Robert Wille, Frank Sill Torres, Rolf Drechsler:
Bail on Balancing: An Alternative Approach to the Physical Design of Field-Coupled Nanocomputing Circuits. ISVLSI 2020: 66-71 - [c237]Lorenzo Servadei, Jiapeng Zheng, Jose A. Arjona-Medina, Michael Werner, Volkan Esen, Sepp Hochreiter, Wolfgang Ecker, Robert Wille:
Cost Optimization at Early Stages of Design Using Deep Reinforcement Learning. MLCAD 2020: 37-42 - [c236]Michael Werner, Lorenzo Servadei, Robert Wille, Wolfgang Ecker:
Automatic compiler optimization on embedded software through k-means clustering. MLCAD 2020: 157-162 - [c235]Fritjof Bornebusch, Christoph Lüth, Robert Wille, Rolf Drechsler:
Safety First: About the Detection of Arithmetic Overflows in Hardware Design Specifications. MODELSWARD (Revised Selected Papers) 2020: 26-48 - [c234]Fritjof Bornebusch, Christoph Lüth, Robert Wille, Rolf Drechsler:
Integer Overflow Detection in Hardware Designs at the Specification Level. MODELSWARD 2020: 41-48 - [c233]Lukas Burgholzer, Rudy Raymond, Robert Wille:
Verifying Results of the IBM Qiskit Quantum Circuit Compilation Flow. QCE 2020: 356-365 - [c232]Chandan Bandyopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman:
Post Synthesis-Optimization of Reversible Circuit using Template Matching. VDAT 2020: 1-4 - [p3]Alwin Zulehner, Robert Wille:
Simulation and Design of Quantum Circuits. Selected Results of the COST Action IC1405 2020: 60-82 - [i25]Lukas Burgholzer, Robert Wille:
Advanced Equivalence Checking for Quantum Circuits. CoRR abs/2004.08420 (2020) - [i24]Atif Mashkoor, Alexander Egyed, Robert Wille:
Model-driven Engineering of Safety and Security Systems: A Systematic Mapping Study. CoRR abs/2004.08471 (2020) - [i23]Carmen G. Almudéver, Lingling Lao, Robert Wille, Gian Giacomo Guerreschi:
Realizing Quantum Algorithms on Real Quantum Computing Devices. CoRR abs/2007.01000 (2020) - [i22]Lukas Burgholzer, Richard Kueng, Robert Wille:
Random Stimuli Generation for the Verification of Quantum Circuits. CoRR abs/2011.07288 (2020) - [i21]Lukas Burgholzer, Robert Wille, Richard Kueng:
Characteristics of Reversible Circuits for Error Detection. CoRR abs/2012.02037 (2020)
2010 – 2019
- 2019
- [j52]Samah Mohamed Saeed, Nithin Mahendran, Alwin Zulehner, Robert Wille, Ramesh Karri:
Identification of Synthesis Approaches for IP/IC Piracy of Reversible Circuits. ACM J. Emerg. Technol. Comput. Syst. 15(3): 23:1-23:17 (2019) - [j51]Andreas Grimmer, Medina Hamidovic, Werner Haselmayr, Robert Wille:
Advanced Simulation of Droplet Microfluidics. ACM J. Emerg. Technol. Comput. Syst. 15(3): 26:1-26:16 (2019) - [j50]Marcel Walter, Robert Wille, Daniel Große, Frank Sill Torres, Rolf Drechsler:
Placement and Routing for Tile-based Field-coupled Nanocomputing Circuits Is NP-complete (Research Note). ACM J. Emerg. Technol. Comput. Syst. 15(3): 29:1-29:10 (2019) - [j49]Alexandru Paler, Austin G. Fowler, Robert Wille:
Faster manipulation of large quantum circuits using wire label reference diagrams. Microprocess. Microsystems 66: 55-66 (2019) - [j48]Lorenzo Servadei, Elena Zennaro, Tobias Fritz, Keerthikumara Devarajegowda, Wolfgang Ecker, Robert Wille:
Using Machine Learning for predicting area and Firmware metrics of hardware designs from abstract specifications. Microprocess. Microsystems 71 (2019) - [j47]Medina Hamidovic, Werner Haselmayr, Andreas Grimmer, Robert Wille, Andreas Springer:
Passive droplet control in microfluidic networks: A survey and new perspectives on their practical realization. Nano Commun. Networks 19: 33-46 (2019) - [j46]Alwin Zulehner, Robert Wille:
Advanced Simulation of Quantum Computations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(5): 848-859 (2019) - [j45]Andreas Grimmer, Werner Haselmayr, Robert Wille:
Automated Dimensioning of Networked Labs-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(7): 1216-1225 (2019) - [j44]Alwin Zulehner, Alexandru Paler, Robert Wille:
An Efficient Methodology for Mapping Quantum Circuits to the IBM QX Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(7): 1226-1236 (2019) - [j43]Sudip Poddar, Robert Wille, Hafizur Rahaman, Bhargab B. Bhattacharya:
Error-Oblivious Sample Preparation With Digital Microfluidic Lab-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(10): 1886-1899 (2019) - [j42]Samah Mohamed Saeed, Robert Wille, Ramesh Karri:
Locking the Design of Building Blocks for Quantum Circuits. ACM Trans. Embed. Comput. Syst. 18(5s): 60:1-60:15 (2019) - [j41]Gerold Fink, Medina Hamidovic, Robert Wille, Werner Haselmayr:
Passive Droplet Control in Two-Dimensional Microfluidic Networks. IEEE Trans. Mol. Biol. Multi Scale Commun. 5(3): 189-206 (2019) - [j40]Sebastian Huhn, Stefan Frehse, Robert Wille, Rolf Drechsler:
Determining Application-Specific Knowledge for Improving Robustness of Sequential Circuits. IEEE Trans. Very Large Scale Integr. Syst. 27(4): 875-887 (2019) - [j39]Samah Mohamed Saeed, Alwin Zulehner, Robert Wille, Rolf Drechsler, Ramesh Karri:
Reversible Circuits: IC/IP Piracy Attacks and Countermeasures. IEEE Trans. Very Large Scale Integr. Syst. 27(11): 2523-2535 (2019) - [c231]Sudip Poddar, Robert Wille, Hafizur Rahaman, Bhargab B. Bhattacharya:
Effect of Volumetric Split-Errors on Reactant-Concentration During Sample Preparation with Microfluidic Biochips. ACSS (2) 2019: 159-165 - [c230]Alwin Zulehner, Robert Wille:
Compiling SU(4) quantum circuits to IBM QX architectures. ASP-DAC 2019: 185-190 - [c229]Marcel Walter, Robert Wille, Frank Sill Torres, Daniel Große, Rolf Drechsler:
Scalable design for field-coupled nanocomputing circuits. ASP-DAC 2019: 197-202 - [c228]Alwin Zulehner, Kamalika Datta, Indranil Sengupta, Robert Wille:
A staircase structure for scalable and efficient synthesis of memristor-aided logic. ASP-DAC 2019: 237-242 - [c227]Zhanwei Zhong, Robert Wille, Krishnendu Chakrabarty:
Robust sample preparation on digital microfluidic biochips. ASP-DAC 2019: 474-480 - [c226]Alwin Zulehner, Michael P. Frank, Robert Wille:
Design automation for adiabatic circuits. ASP-DAC 2019: 669-674 - [c225]Robert Wille, Lukas Burgholzer, Alwin Zulehner:
Mapping Quantum Circuits to IBM QX Architectures Using the Minimal Number of SWAP and H Operations. DAC 2019: 142 - [c224]Alwin Zulehner, Robert Wille:
Matrix-Vector vs. Matrix-Matrix Multiplication: Potential in DD-based Simulation of Quantum Computations. DATE 2019: 90-95 - [c223]Alwin Zulehner, Philipp Niemann, Rolf Drechsler, Robert Wille:
Accuracy and Compactness in Decision Diagrams for Quantum Computation. DATE 2019: 280-283 - [c222]Martin Ring, Fritjof Bornebusch, Christoph Lüth, Robert Wille, Rolf Drechsler:
Better Late Than Never : Verification of Embedded Systems After Deployment. DATE 2019: 890-895 - [c221]Robert Wille, Rod Van Meter, Yehuda Naveh:
IBM's Qiskit Tool Chain: Working with and Developing for Real Quantum Computers. DATE 2019: 1234-1240 - [c220]Lorenzo Servadei, Elena Zennaro, Keerthikumara Devarajegowda, Martin Manzinger, Wolfgang Ecker, Robert Wille:
Accurate Cost Estimation of Memory Systems Inspired by Machine Learning for Computer Vision. DATE 2019: 1277-1280 - [c219]Sebastian Pointner, Pablo González de Aledo, Robert Wille:
Generic Error Localization for the Electronic System Level. DDECS 2019: 1-4 - [c218]Robert Wille, Majid Haghparast, Smaran Adarsh, Tanmay Tanmay:
Towards HDL-based Synthesis of Reversible Circuits with No Additional Lines. ICCAD 2019: 1-7 - [c217]Alwin Zulehner, Stefan Hillmich, Robert Wille:
How to Efficiently Handle Complex Values? Implementing Decision Diagrams for Quantum Computing. ICCAD 2019: 1-7 - [c216]Sebastian Pointner, Andreas Grimmer, Robert Wille:
Exact Stimuli Minimization for Simulation-Based Verification. ISCAS 2019: 1-5 - [c215]Tapalina Banerjee, Sudip Poddar, Robert Wille, Bhargab B. Bhattacharya:
Flow-Based Passive Microfluidic Architecture for Homogeneous Mixing. ISED 2019: 8138-8143 - [c214]Alwin Zulehner, Philipp Niemann, Rolf Drechsler, Robert Wille:
One Additional Qubit is Enough: Encoded Embeddings for Boolean Components in Quantum Circuits. ISMVL 2019: 1-6 - [c213]Nils Przigoda, Judith Przigoda, Robert Wille:
Four-Valued Logic in UML/OCL Models: A "Playground" for the MVL Community. ISMVL 2019: 61-66 - [c212]Sebastian Pointner, Oliver Frank, Christoph Hazott, Robert Wille:
Test Your Test Programs Pre-Silicon: A Virtual Test Methodology for Industrial Design Flows. ISVLSI 2019: 241-246 - [c211]Fatemeh Serajeh-hassani, Mohammad Sadrosadati, Sebastian Pointner, Robert Wille, Hamid Sarbazi-Azad:
Focus on What is Needed: Area and Power Efficient FPGAs Using Turn-Restricted Switch Boxes. ISVLSI 2019: 615-620 - [c210]Robert Wille, Marcel Walter, Frank Sill Torres, Daniel Große, Rolf Drechsler:
Ignore Clocking Constraints: An Alternative Physical Design Methodology for Field-Coupled Nanotechnologies. ISVLSI 2019: 651-656 - [c209]Sebastian Pointner, Robert Wille:
Did We Test Enough? Functional Coverage for Post-Silicon Validation. ITC-Asia 2019: 31-36 - [c208]Medina Hamidovic, Uli Marta, Gerold Fink, Robert Wille, Andreas Springer, Werner Haselmayr:
Information Encoding in Droplet-Based Microfluidic Systems: First Practical Study. NANOCOM 2019: 26:1-26:6 - [c207]Kevin Verma, Johannes Oder, Robert Wille:
Simulating Industrial Electrophoretic Deposition on Distributed Memory Architectures. PDP 2019: 414-421 - [c206]Alwin Zulehner, Hartwig Bauer, Robert Wille:
Evaluating the Flexibility of A* for Mapping Quantum Circuits. RC 2019: 171-190 - [c205]Anirban Bhattacharjee, Chandan Bandyopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman:
Improved Look-Ahead Approaches for Nearest Neighbor Synthesis of 1D Quantum Circuits. VLSID 2019: 203-208 - [i20]Sudip Poddar, Robert Wille, Hafizur Rahaman, Bhargab B. Bhattacharya:
Dilution with Digital Microfluidic Biochips: How Unbalanced Splits Corrupt Target-Concentration. CoRR abs/1901.00353 (2019) - [i19]Alexandru Paler, Austin G. Fowler, Robert Wille:
Reliable quantum circuits have defects. CoRR abs/1902.03698 (2019) - [i18]Marcel Walter, Robert Wille, Frank Sill Torres, Daniel Große, Rolf Drechsler:
fiction: An Open Source Framework for the Design of Field-coupled Nanocomputing Circuits. CoRR abs/1905.02477 (2019) - [i17]Alwin Zulehner, Philipp Niemann, Rolf Drechsler, Robert Wille:
One Additional Qubit is Enough: Encoded Embeddings for Boolean Components in Quantum Circuits. CoRR abs/1906.02352 (2019) - [i16]Alwin Zulehner, Stefan Hillmich, Robert Wille:
How to Efficiently Handle Complex Values? Implementing Decision Diagrams for Quantum Computing. CoRR abs/1911.12691 (2019) - 2018
- [b3]Nils Przigoda, Robert Wille, Judith Przigoda, Rolf Drechsler:
Automated Validation & Verification of UML/OCL Models Using Satisfiability Solvers. Springer 2018, ISBN 978-3-319-72813-1 - [j38]Nils Przigoda, Philipp Niemann, Jonas Gomes Filho, Robert Wille, Rolf Drechsler:
Frame conditions in the automatic validation and verification of UML/OCL models: A symbolic formulation of modifies only statements. Comput. Lang. Syst. Struct. 54: 512-527 (2018) - [j37]Robert Wille, Martin Lukac:
Preface to the Special Issue of the 48th IEEE International Symposium on Multiple Valued Logic. FLAP 5(9): 1777-1778 (2018) - [j36]Chandan Bandyopadhyay, Rakesh Das, Robert Wille, Rolf Drechsler, Hafizur Rahaman:
Synthesis of circuits based on all-optical Mach-Zehnder Interferometers using Binary Decision Diagrams. Microelectron. J. 71: 19-29 (2018) - [j35]Andreas Grimmer, Werner Haselmayr, Andreas Springer, Robert Wille:
Design of Application-Specific Architectures for Networked Labs-on-Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(1): 193-202 (2018) - [j34]Alwin Zulehner, Robert Wille:
One-Pass Design of Reversible Circuits: Combining Embedding and Synthesis for Reversible Logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(5): 996-1008 (2018) - [j33]Qin Wang, Hao Zou, Hailong Yao, Tsung-Yi Ho, Robert Wille, Yici Cai:
Physical Co-Design of Flow and Control Layers for Flow-Based Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(6): 1157-1170 (2018) - [j32]Frank Sill Torres, Robert Wille, Philipp Niemann, Rolf Drechsler:
An Energy-Aware Model for the Logic Synthesis of Quantum-Dot Cellular Automata. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(12): 3031-3041 (2018) - [c204]Andreas Grimmer, Berislav Klepic, Tsung-Yi Ho, Robert Wille:
Sound valve-control for programmable microfluidic devices. ASP-DAC 2018: 40-45 - [c203]Alwin Zulehner, Robert Wille:
Exploiting coding techniques for logic synthesis of reversible circuits. ASP-DAC 2018: 670-675 - [c202]Marcel Walter, Robert Wille, Daniel Große, Frank Sill Torres, Rolf Drechsler:
An exact method for design exploration of quantum-dot cellular automata. DATE 2018: 503-508 - [c201]Philipp Niemann, Robert Wille, Rolf Drechsler:
Improved synthesis of Clifford+T quantum functionality. DATE 2018: 597-600 - [c200]Alwin Zulehner, Alexandru Paler, Robert Wille:
Efficient mapping of quantum circuits to the IBM QX architectures. DATE 2018: 1135-1138 - [c199]Alwin Zulehner, Robert Wille:
Pushing the number of qubits below the "minimum": Realizing compact boolean components for quantum logic. DATE 2018: 1179-1182 - [c198]Sukanta Bhattacharjee, Robert Wille, Juinn-Dar Huang, Bhargab B. Bhattacharya:
Storage-aware sample preparation using flow-based microfluidic Labs-on-Chip. DATE 2018: 1399-1404 - [c197]Frank Sill Torres, Robert Wille, Marcel Walter, Philipp Niemann, Daniel Große, Rolf Drechsler:
Evaluating the Impact of Interconnections in Quantum-Dot Cellular Automata. DSD 2018: 649-656 - [c196]Robert Wille, Bing Li, Rolf Drechsler, Ulf Schlichtmann:
Automatic Design of Microfluidic Devices. FDL 2018: 5-16 - [c195]Kevin Verma, Chong Peng, Kamil Szewc, Robert Wille:
AMulti-GPU PCISPH Implementation with Efficient Memory Transfers. HPEC 2018: 1-7 - [c194]Samah Mohamed Saeed, Xiaotong Cui, Alwin Zulehner, Robert Wille, Rolf Drechsler, Kaijie Wu, Ramesh Karri:
IC/IP piracy assessment of reversible logic. ICCAD 2018: 5 - [c193]Ying Zhu, Bing Li, Tsung-Yi Ho, Qin Wang, Hailong Yao, Robert Wille, Ulf Schlichtmann:
Multi-channel and fault-tolerant control multiplexing for flow-based microfluidic biochips. ICCAD 2018: 123 - [c192]Robert Wille, Austin G. Fowler, Yehuda Naveh:
Computer-aided design for quantum computation. ICCAD 2018: 128 - [c191]Lorenzo Servadei, Elena Zennaro, Keerthikumara Devarajegowda, Wolfgang Ecker, Robert Wille:
Quality Assessment of Generated Hardware Designs Using Statistical Analysis and Machine Learning. CIMA@ICTAI 2018: 14-27 - [c190]Kevin Verma, Luis Ayuso, Robert Wille:
Parallel Simulation of Electrophoretic Deposition for Industrial Automotive Applications. HPCS 2018: 468-475 - [c189]Zaid Al-Wardi, Robert Wille, Rolf Drechsler:
Synthesis of Reversible Circuits Using Conventional Hardware Description Languages. ISMVL 2018: 97-102 - [c188]Alwin Zulehner, P. Mercy Nesa Rani, Kamalika Datta, Indranil Sengupta, Robert Wille:
Generalizing the Concept of Scalable Reversible Circuit Synthesis for Multiple-Valued Logic. ISMVL 2018: 115-120 - [c187]Anirban Bhattacharjee, Chandan Bandyopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman:
A Novel Approach for Nearest Neighbor Realization of 2D Quantum Circuits. ISVLSI 2018: 305-310 - [c186]Philipp Niemann, Nils Przigoda, Robert Wille, Rolf Drechsler:
Analyzing Frame Conditions in UML/OCL Models - Consistency Equivalence and Independence. MODELSWARD 2018: 139-151 - [c185]Philipp Niemann, Nils Przigoda, Robert Wille, Rolf Drechsler:
Generation and Validation of Frame Conditions in Formal Models. MODELSWARD (Revised Selected Papers) 2018: 259-283 - [c184]Medina Hamidovic, Werner Haselmayr, Andreas Grimmer, Robert Wille, Andreas Springer:
Comparison of switching principles in microfluidic bus networks. NANOCOM 2018: 23:1-23:6 - [c183]Alwin Zulehner, Robert Wille:
QMDD-Based One-Pass Design of Reversible Logic: Exploring the Available Degree of Freedom (Work-in-Progress Report). RC 2018: 244-250 - [c182]Oliver Keszöcze, Mohamed Ibrahim, Robert Wille, Krishnendu Chakrabarty, Rolf Drechsler:
Exact Synthesis of Biomolecular Protocols for Multiple Sample Pathways on Digital Microfluidic Biochips. VLSID 2018: 121-126 - [p2]Robert Wille, Krishnendu Chakrabarty, Rolf Drechsler, Priyank Kalla:
Emerging Circuit Technologies: An Overview on the Next Generation of Circuits. Advanced Logic Synthesis 2018: 43-67 - [i15]Alexandru Paler, Alwin Zulehner, Robert Wille:
NISQ circuit compilers: search space structure and heuristics. CoRR abs/1806.07241 (2018) - [i14]Alwin Zulehner, Michael P. Frank, Robert Wille:
Design Automation for Adiabatic Circuits. CoRR abs/1809.02421 (2018) - [i13]Andreas Grimmer, Medina Hamidovic, Werner Haselmayr, Robert Wille:
Advanced Simulation of Droplet Microfluidics. CoRR abs/1810.01164 (2018) - [i12]Frank Sill Torres, Philipp Niemann, Robert Wille, Rolf Drechsler:
Breaking Landauer's Limit\\Using Quantum-dot Cellular Automata. CoRR abs/1811.03894 (2018) - [i11]Alexandru Paler, Austin G. Fowler, Robert Wille:
Faster manipulation of large quantum circuits using wire label reference diagrams. CoRR abs/1811.06011 (2018) - 2017
- [j31]Andreas Grimmer, Joachim Clemens, Robert Wille:
Formal methods for reasoning and uncertainty reduction in evidential grid maps. Int. J. Approx. Reason. 87: 23-39 (2017) - [j30]Arighna Deb, Robert Wille, Oliver Keszöcze, Saeideh Shirinzadeh, Rolf Drechsler:
Synthesis of optical circuits using binary decision diagrams. Integr. 59: 42-51 (2017) - [j29]Robert Wille, Oliver Keszöcze, Lars Othmer, Michael Kirkedal Thomsen, Rolf Drechsler:
An Automated Approach for Generating and Checking Control Logic for Reversible Hardware Description Language-Based Designs. J. Low Power Electron. 13(4): 633-641 (2017) - [j28]Alexandru Paler, Austin G. Fowler, Robert Wille:
Online scheduled execution of quantum circuits protected by surface codes. Quantum Inf. Comput. 17(15&16): 1335-1348 (2017) - [j27]Majid Haghparast, Robert Wille, Asma Taheri Monfared:
Towards quantum reversible ternary coded decimal adder. Quantum Inf. Process. 16(11): 284 (2017) - [j26]Pablo González de Aledo, Nils Przigoda, Robert Wille, Rolf Drechsler, Pablo Sánchez Espeso:
Towards a Verification Flow Across Abstraction Levels Verifying Implementations Against Their Formal Specification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(3): 475-488 (2017) - [c181]Sebastian Huhn, Stefan Frehse, Robert Wille, Rolf Drechsler:
Enhancing robustness of sequential circuits using application-specific knowledge and formal methods. ASP-DAC 2017: 182-187 - [c180]Andreas Grimmer, Qin Wang, Hailong Yao, Tsung-Yi Ho, Robert Wille:
Close-to-optimal placement and routing for continuous-flow microfluidic biochips. ASP-DAC 2017: 530-535 - [c179]Oliver Keszöcze, Zipeng Li, Andreas Grimmer, Robert Wille, Krishnendu Chakrabarty, Rolf Drechsler:
Exact routing for micro-electrode-dot-array digital microfluidic biochips. ASP-DAC 2017: 708-713 - [c178]Andreas Grimmer, Werner Haselmayr, Andreas Springer, Robert Wille:
A Discrete Model for Networked Labs-on-Chips: Linking the Physical World to Design Automation. DAC 2017: 50:1-50:6 - [c177]Alwin Zulehner, Robert Wille:
Make it reversible: Efficient embedding of non-reversible functions. DATE 2017: 458-463 - [c176]Alwin Zulehner, Robert Wille:
Taking one-to-one mappings for granted: Advanced logic design of encoder circuits. DATE 2017: 818-823 - [c175]Andreas Grimmer, Werner Haselmayr, Andreas Springer, Robert Wille:
Verification of networked Labs-on-Chip architectures. DATE 2017: 1679-1684 - [c174]Andreas Rauchenecker, Robert Wille:
An efficient physical design of fully-testable BDD-based circuits. DDECS 2017: 6-11 - [c173]Martin Gogolla, Frank Hilken, Philipp Niemann, Robert Wille:
Formulating Model Verification Tasks Prover-Independently as UML Diagrams. ECMFA 2017: 232-247 - [c172]Werner Haselmayr, Andreas Grimmer, Robert Wille:
Stochastic Computing Using Droplet-Based Microfluidics. EUROCAST (2) 2017: 204-211 - [c171]Tom van Dijk, Robert Wille, Robert Meolic:
Tagged BDDs: Combining reduction rules from different decision diagram types. FMCAD 2017: 108-115 - [c170]Kevin Verma, Kamil Szewc, Robert Wille:
Advanced load balancing for SPH simulations on multi-GPU architectures. HPEC 2017: 1-7 - [c169]Werner Haselmayr, Andrea Biral, Andreas Grimmer, Andrea Zanella, Andreas Springer, Robert Wille:
Addressing multiple nodes in networked labs-on-chips without payload re-injection. ICC 2017: 1-6 - [c168]Arighna Deb, Robert Wille, Rolf Drechsler:
Dedicated synthesis for MZI-based optical circuits based on AND-inverter graphs. ICCAD 2017: 233-238 - [c167]Samah Mohamed Saeed, Nithin Mahendran, Alwin Zulehner, Robert Wille, Ramesh Karri:
Identifying Reversible Circuit Synthesis Approaches to Enable IP Piracy Attacks. ICCD 2017: 537-540 - [c166]Fritjof Bornebusch, Robert Wille, Rolf Drechsler:
Towards lightweight satisfiability solvers for self-verification. ISED 2017: 1-5 - [c165]Alwin Zulehner, Robert Wille:
Skipping Embedding in the Design of Reversible Circuits. ISMVL 2017: 173-178 - [c164]Zaid Al-Wardi, Robert Wille, Rolf Drechsler:
Extensions to the Reversible Hardware Description Language SyReC. ISMVL 2017: 185-190 - [c163]Arighna Deb, Robert Wille, Rolf Drechsler:
OR-Inverter Graphs for the Synthesis of Optical Circuits. ISMVL 2017: 278-283 - [c162]Jannis Stoppe, Oliver Keszöcze, Maximilian Luenert, Robert Wille, Rolf Drechsler:
BioViz: An Interactive Visualization Engine for the Design of Digital Microfluidic Biochips. ISVLSI 2017: 170-175 - [c161]Andreas Grimmer, Werner Haselmayr, Andreas Springer, Robert Wille:
Verifikation von Networked Labs-on-Chip Architekturen. MBMV 2017: 41-42 - [c160]Nils Przigoda, Philipp Niemann, Judith Peters, Frank Hilken, Robert Wille, Rolf Drechsler:
More than true or false: native support of irregular values in the automatic validation & verification of UML/OCL models. MEMOCODE 2017: 77-86 - [c159]Andreas Rauchenecker, Timm Ostermann, Robert Wille:
Exploiting reversible logic design for implementing adiabatic circuits. MIXDES 2017: 264-270 - [c158]Zaid Al-Wardi, Robert Wille, Rolf Drechsler:
Towards VHDL-Based Design of Reversible Circuits - Work in Progress Report. RC 2017: 102-108 - [c157]Abhoy Kole, Robert Wille, Kamalika Datta, Indranil Sengupta:
Test Pattern Generation Effort Evaluation of Reversible Circuits. RC 2017: 162-175 - [c156]Anmol Prakash Surhonne, Anupam Chattopadhyay, Robert Wille:
Automatic Test Pattern Generation for Multiple Missing Gate Faults in Reversible Circuits - Work in Progress Report. RC 2017: 176-182 - [c155]Alwin Zulehner, Stefan Gasser, Robert Wille:
Exact Global Reordering for Nearest Neighbor Quantum Circuits Using A ^* ∗. RC 2017: 185-201 - [c154]Philipp Niemann, Alwin Zulehner, Robert Wille, Rolf Drechsler:
Efficient Construction of QMDDs for Irreversible, Reversible, and Quantum Functions. RC 2017: 214-231 - [c153]Alwin Zulehner, Robert Wille:
Improving Synthesis of Reversible Circuits: Exploiting Redundancies in Paths and Nodes of QMDDs. RC 2017: 232-247 - [c152]Robert Wille, Bing Li:
Design automation for Labs-on-Chip: A new "playground" for SoC designers. SoCC 2017: 1-2 - [i10]Samah Mohamed Saeed, Xiaotong Cui, Robert Wille, Alwin Zulehner, Kaijie Wu, Rolf Drechsler, Ramesh Karri:
Towards Reverse Engineering Reversible Logic. CoRR abs/1704.08397 (2017) - [i9]Xiaotong Cui, Samah Mohamed Saeed, Alwin Zulehner, Robert Wille, Rolf Drechsler, Kaijie Wu, Ramesh Karri:
On the Difficulty of Inserting Trojans in Reversible Computing Architectures. CoRR abs/1705.00767 (2017) - [i8]Alwin Zulehner, Robert Wille:
Advanced Simulation of Quantum Computations: Compact Representation Rather than Hardware Power. CoRR abs/1707.00865 (2017) - [i7]Shigeru Yamashita, Tsung-Yi Ho, Robert Wille, Krishnendu Chakrabarty:
Microfluidic Biochips: Bridging Biochemistry with Computer Science and Engineering (NII Shonan Meeting 2017-1). NII Shonan Meet. Rep. 2017 (2017) - 2016
- [j25]Alexandru Paler, Austin G. Fowler, Robert Wille:
Reliable quantum circuits have defects. XRDS 23(1): 34-38 (2016) - [j24]Vincent C. Gaudet, Jon T. Butler, Robert Wille, Naofumi Homma:
Guest Editorial Emerging Topics in Multiple-Valued Logic and Its Applications. IEEE J. Emerg. Sel. Topics Circuits Syst. 6(1): 1-4 (2016) - [j23]Nils Przigoda, Mathias Soeken, Robert Wille, Rolf Drechsler:
Verifying the structure and behavior in UML/OCL models using satisfiability solvers. IET Cyper-Phys. Syst.: Theory & Appl. 1(1): 49-59 (2016) - [j22]Robert Wille, Eleonora Schönborn, Mathias Soeken, Rolf Drechsler:
SyReC: A hardware description language for the specification and synthesis of reversible circuits. Integr. 53: 39-53 (2016) - [j21]Nils Przigoda, Robert Wille, Rolf Drechsler:
Analyzing Inconsistencies in UML/OCL Models. J. Circuits Syst. Comput. 25(3): 1640021:1-1640021:21 (2016) - [j20]Arighna Deb, Debesh K. Das, Hafizur Rahaman, Robert Wille, Rolf Drechsler, Bhargab B. Bhattacharya:
Reversible Synthesis of Symmetric Functions with a Simple Regular Structure and Easy Testability. ACM J. Emerg. Technol. Comput. Syst. 12(4): 34:1-34:29 (2016) - [j19]Mathias Soeken, Robert Wille, Oliver Keszöcze, D. Michael Miller, Rolf Drechsler:
Embedding of Large Boolean Functions for Reversible Logic. ACM J. Emerg. Technol. Comput. Syst. 12(4): 41:1-41:26 (2016) - [j18]Arighna Deb, Robert Wille, Oliver Keszöcze, Stefan Hillmich, Rolf Drechsler:
Gates vs. Splitters: Contradictory Optimization Objectives in the Synthesis of Optical Circuits. ACM J. Emerg. Technol. Comput. Syst. 13(1): 11:1-11:13 (2016) - [j17]Philipp Niemann, Robert Wille, D. Michael Miller, Mitchell A. Thornton, Rolf Drechsler:
QMDDs: Efficient Quantum Function Representation and Manipulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(1): 86-99 (2016) - [c151]Robert Wille, Oliver Keszöcze, Marcel Walter, Patrick Rohrs, Anupam Chattopadhyay, Rolf Drechsler:
Look-ahead schemes for nearest neighbor optimization of 1D and 2D quantum circuits. ASP-DAC 2016: 292-297 - [c150]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Robert Wille, Giovanni De Micheli:
Exploiting inherent characteristics of reversible circuits for faster combinational equivalence checking. DATE 2016: 175-180 - [c149]Robert Wille, Oliver Keszöcze, Stefan Hillmich, Marcel Walter, Alberto García Ortiz:
Synthesis of approximate coders for on-chip interconnects using reversible logic. DATE 2016: 1140-1143 - [c148]Robert Wille, Bing Li, Ulf Schlichtmann, Rolf Drechsler:
From biochips to quantum circuits: computer-aided design for emerging technologies. ICCAD 2016: 132 - [c147]Shuchishman Burman, Kamalika Datta, Robert Wille, Indranil Sengupta, Rolf Drechsler:
An improved gate library for logic synthesis of optical circuits. ISED 2016: 1-6 - [c146]Robert Wille, Oliver Keszöcze, Lars Othmer, Michael Kirkedal Thomsen, Rolf Drechsler:
Generating and checking control logic in the HDL-based design of reversible circuits. ISED 2016: 7-12 - [c145]Jonas Gomes Filho, Nils Przigoda, Robert Wille, Rolf Drechsler:
Towards a model-based verification methodology for Complex Swarm Systems (Invited paper). ISED 2016: 18-23 - [c144]Zaid Al-Wardi, Robert Wille, Rolf Drechsler:
Re-Writing HDL Descriptions for Line-Aware Synthesis of Reversible Circuits. ISMVL 2016: 31-36 - [c143]Nils Przigoda, Gerhard W. Dueck, Robert Wille, Rolf Drechsler:
Fault Detection in Parity Preserving Reversible Circuits. ISMVL 2016: 44-49 - [c142]Md. Mazder Rahman, Gerhard W. Dueck, Anupam Chattopadhyay, Robert Wille:
Integrated Synthesis of Linear Nearest Neighbor Ancilla-Free MCT Circuits. ISMVL 2016: 144-149 - [c141]Laxmidhar Biswal, Chandan Bandyopadhyay, Anupam Chattopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman:
Nearest-Neighbor and Fault-Tolerant Quantum Circuit Implementation. ISMVL 2016: 156-161 - [c140]Philipp Niemann, Rhitam Datta, Robert Wille:
Logic Synthesis for Quantum State Generation. ISMVL 2016: 247-252 - [c139]Nils Przigoda, Jonas Gomes Filho, Philipp Niemann, Robert Wille, Rolf Drechsler:
Frame conditions in symbolic representations of UML/OCL models. MEMOCODE 2016: 65-70 - [c138]Judith Peters, Nils Przigoda, Robert Wille, Rolf Drechsler:
Clocks vs. instants relations: Verifying CCSL time constraints in UML/MARTE models. MEMOCODE 2016: 78-84 - [c137]Frank Hilken, Philipp Niemann, Martin Gogolla, Robert Wille:
Towards a Catalog of Structural and Behavioral Verification Tasks for UML/OCL Models. Modellierung 2016: 117-124 - [c136]Nils Przigoda, Frank Hilken, Judith Peters, Robert Wille, Martin Gogolla, Rolf Drechsler:
Integrating an SMT-Based ModelFinder into USE. MoDeVVa@MoDELS 2016: 40-45 - [c135]Nils Przigoda, Robert Wille, Rolf Drechsler:
Ground setting properties for an efficient translation of OCL in SMT-based model finding. MoDELS 2016: 261-271 - [c134]Robert Wille, Oliver Keszöcze, Lars Othmer, Michael Kirkedal Thomsen, Rolf Drechsler:
Initial Ideas for Automatic Design and Verification of Control Logic in Reversible HDLs - Work in Progress Report. RC 2016: 160-166 - [c133]Robert Wille, Nils Quetschlich, Yuma Inoue, Norihito Yasuda, Shin-ichi Minato:
Using \pi DDs for Nearest Neighbor Optimization of Quantum Circuits. RC 2016: 181-196 - [c132]Robert Wille, Aaron Lye, Philipp Niemann:
Checking Reversibility of Boolean Functions. RC 2016: 322-337 - [c131]Robert Wille, Anupam Chattopadhyay, Rolf Drechsler:
From reversible logic to quantum circuits: Logic design for an emerging technology. SAMOS 2016: 268-274 - [c130]Philipp Niemann, Frank Hilken, Martin Gogolla, Robert Wille:
Extracting frame conditions from operation contracts. Software Engineering 2016: 89-90 - [c129]Laxmidhar Biswal, Chandan Bandyopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman:
Improving the Realization of Multiple-Control Toffoli Gates Using the NCVW Quantum Gate Library. VLSID 2016: 573-574 - [e2]Rolf Drechsler, Robert Wille:
2016 Forum on Specification and Design Languages, FDL 2016, Bremen, Germany, September 14-16, 2016. IEEE 2016, ISBN 979-10-92279-17-7 [contents] - 2015
- [j16]Robert Wille, Oliver Keszöcze, Rolf Drechsler, Tobias Boehnisch, Alexander Kroker:
Scalable One-Pass Synthesis for Digital Microfluidic Biochips. IEEE Des. Test 32(6): 41-50 (2015) - [c128]Robert Wille, Oliver Keszöcze, Clemens Hopfmuller, Rolf Drechsler:
Reverse BDD-based synthesis for splitter-free optical circuits. ASP-DAC 2015: 172-177 - [c127]Aaron Lye, Robert Wille, Rolf Drechsler:
Determining the minimal number of swap gates for multi-dimensional nearest neighbor quantum circuits. ASP-DAC 2015: 178-183 - [c126]Judith Peters, Robert Wille, Nils Przigoda, Ulrich Kühne, Rolf Drechsler:
A generic representation of CCSL time constraints for UML/MARTE models. DAC 2015: 122:1-122:6 - [c125]Jannis Stoppe, Robert Wille, Rolf Drechsler:
Automated feature localization for dynamically generated SystemC designs. DATE 2015: 277-280 - [c124]Philipp Niemann, Frank Hilken, Martin Gogolla, Robert Wille:
Assisted generation of frame conditions for formal models. DATE 2015: 309-312 - [c123]Nils Przigoda, Robert Wille, Rolf Drechsler:
Contradiction Analysis for Inconsistent Formal Models. DDECS 2015: 171-176 - [c122]Nils Przigoda, Robert Wille, Rolf Drechsler:
Leveraging the Analysis for Invariant Independence in Formal System Models. DSD 2015: 359-366 - [c121]Nils Przigoda, Jannis Stoppe, Julia Seiter, Robert Wille, Rolf Drechsler:
Verification-Driven Design Across Abstraction Levels: A Case Study. DSD 2015: 375-382 - [c120]Rolf Drechsler, Robert Wille:
Reversible computation. IGSC 2015: 1-5 - [c119]Robert Wille, Rolf Drechsler:
Formal Methods for Emerging Technologies. ICCAD 2015: 65-70 - [c118]Oliver Keszöcze, Robert Wille, Krishnendu Chakrabarty, Rolf Drechsler:
A General and Exact Routing Methodology for Digital Microfluidic Biochips. ICCAD 2015: 874-881 - [c117]Frank Hilken, Philipp Niemann, Martin Gogolla, Robert Wille:
From UML/OCL to Base Models: Transformation Concepts for Generic Validation and Verification. ICMT 2015: 149-165 - [c116]Arighna Deb, Robert Wille, Rolf Drechsler, Debesh K. Das:
An Efficient Reduction of Common Control Lines for Reversible Circuit Optimization. ISMVL 2015: 14-19 - [c115]Arman Allahyari-Abhari, Robert Wille, Rolf Drechsler:
An Examination of the NCV-|u1 > Quantum Library Based on Minimal Circuits. ISMVL 2015: 42-47 - [c114]Nils Przigoda, Robert Wille, Rolf Drechsler:
Verbesserung der Fehlersuche in inkonsistenten formalen Modellen (Erweiterte Zusammenfassung). MBMV 2015: 165-172 - [c113]Nils Przigoda, Judith Peters, Mathias Soeken, Robert Wille, Rolf Drechsler:
Towards an Automatic Approach for Restricting UML/OCL Invariability Clauses. MoDeVVa@MoDELS 2015: 44-47 - [c112]Nils Przigoda, Christoph Hilken, Robert Wille, Jan Peleska, Rolf Drechsler:
Checking concurrent behavior in UML/OCL models. MoDELS 2015: 176-185 - [c111]Philipp Niemann, Frank Hilken, Martin Gogolla, Robert Wille:
Extracting frame conditions from operation contracts. MoDELS 2015: 266-275 - [c110]Christoph Hilken, Jan Peleska, Robert Wille:
A Unified Formulation of Behavioral Semantics for SysML Models. MODELSWARD 2015: 263-271 - [c109]Zaid Al-Wardi, Robert Wille, Rolf Drechsler:
Towards Line-Aware Realizations of Expressions for HDL-Based Synthesis of Reversible Circuits. RC 2015: 233-247 - [c108]Philipp Niemann, Saikat Basu, Amlan Chakrabarti, Niraj K. Jha, Robert Wille:
Synthesis of Quantum Circuits for Dedicated Physical Machine Descriptions. RC 2015: 248-264 - [c107]Abhoy Kole, Kamalika Datta, Indranil Sengupta, Robert Wille:
Towards a Cost Metric for Nearest Neighbor Constraints in Reversible Circuits. RC 2015: 273-278 - [c106]Rolf Drechsler, Martin Fränzle, Robert Wille:
Envisioning self-verification of electronic systems. ReCoSoC 2015: 1-6 - [c105]Eleonora Schönborn, Kamalika Datta, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler:
BDD-Based Synthesis for All-Optical Mach-Zehnder Interferometer Circuits. VLSID 2015: 435-440 - [i6]Krishnendu Chakrabarty, Tsung-Yi Ho, Robert Wille:
Design of Microfluidic Biochips (Dagstuhl Seminar 15352). Dagstuhl Reports 5(8): 34-53 (2015) - 2014
- [j15]Robert Wille, Mathias Soeken, D. Michael Miller, Rolf Drechsler:
Trading off circuit lines and gate costs in the synthesis of reversible logic. Integr. 47(2): 284-294 (2014) - [j14]Robert Wille, Rolf Drechsler, Mehdi Baradaran Tahoori:
Introduction to the Special Issue on Reversible Computation. ACM J. Emerg. Technol. Comput. Syst. 11(2): 8:1-8:2 (2014) - [j13]Robert Wille, Aaron Lye, Rolf Drechsler:
Considering nearest neighbor constraints of quantum circuits at the reversible circuit level. Quantum Inf. Process. 13(2): 185-199 (2014) - [j12]Robert Wille, Aaron Lye, Rolf Drechsler:
Exact Reordering of Circuit Lines for Nearest Neighbor Quantum Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(12): 1818-1831 (2014) - [c104]Philipp Niemann, Robert Wille, Rolf Drechsler:
Efficient synthesis of quantum circuits implementing clifford group operations. ASP-DAC 2014: 483-488 - [c103]Robert Wille, Aaron Lye, Rolf Drechsler:
Optimal SWAP gate insertion for nearest neighbor quantum circuits. ASP-DAC 2014: 489-494 - [c102]Oliver Keszöcze, Robert Wille, Tsung-Yi Ho, Rolf Drechsler:
Exact One-pass Synthesis of Digital Microfluidic Biochips. DAC 2014: 142:1-142:6 - [c101]Eleonora Schönborn, Kamalika Datta, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler:
Optimizing DD-based synthesis of reversible circuits using negative control lines. DDECS 2014: 129-134 - [c100]Shuo Yang, Robert Wille, Rolf Drechsler:
Improving Coverage of Simulation-Based Verification by Dedicated Stimuli Generation. DSD 2014: 599-606 - [c99]Christoph Hilken, Julia Seiter, Robert Wille, Ulrich Kühne, Rolf Drechsler:
Verifying consistency between activity diagrams and their corresponding OCL contracts. FDL 2014: 1-7 - [c98]Julia Seiter, Robert Wille, Ulrich Kühne, Rolf Drechsler:
Automatic refinement checking for formal system models. FDL 2014: 1-8 - [c97]Oliver Keszöcze, Robert Wille, Rolf Drechsler:
Exact routing for digital microfluidic biochips with temporary blockages. ICCAD 2014: 405-410 - [c96]Rolf Drechsler, Mathias Soeken, Robert Wille:
Automated and quality-driven requirements engineering. ICCAD 2014: 586-590 - [c95]Judith Peters, Robert Wille, Rolf Drechsler:
Generating SystemC Implementations for Clock Constraints Specified in UML/MARTE CCSL. ICECCS 2014: 116-125 - [c94]Frank Hilken, Philipp Niemann, Robert Wille, Martin Gogolla:
Towards a Base Model for UML and OCL Verification. MoDeVVa@MoDELS 2014: 59-68 - [c93]Robert Wille, Jannis Stoppe, Eleonora Schönborn, Kamalika Datta, Rolf Drechsler:
RevVis: Visualization of Structures and Properties in Reversible Circuits. RC 2014: 111-124 - [c92]Philipp Niemann, Robert Wille, Rolf Drechsler:
Equivalence Checking in Multi-level Quantum Systems. RC 2014: 201-215 - [c91]Shuo Yang, Robert Wille, Rolf Drechsler:
Determining Cases of Scenarios to Improve Coverage in Simulation-based Verification. SBCCI 2014: 11:1-11:7 - [c90]Jannis Stoppe, Robert Wille, Rolf Drechsler:
Validating SystemC Implementations Against Their Formal Specifications. SBCCI 2014: 13:1-13:8 - [c89]Frank Hilken, Philipp Niemann, Martin Gogolla, Robert Wille:
Filmstripping and Unrolling: A Comparison of Verification Approaches for UML and OCL Behavioral Models. TAP@STAF 2014: 99-116 - [i5]Mathias Soeken, Robert Wille, Oliver Keszöcze, D. Michael Miller, Rolf Drechsler:
Embedding of Large Boolean Functions for Reversible Logic. CoRR abs/1408.3586 (2014) - 2013
- [j11]Robert Wille, Mathias Soeken, Nils Przigoda, Rolf Drechsler:
Effect of Negative Control Lines on the Exact Synthesis of Reversible Circuits. J. Multiple Valued Log. Soft Comput. 21(5-6): 627-640 (2013) - [c88]Robert Wille, Nils Przigoda, Rolf Drechsler:
A compact and efficient SAT encoding for quantum circuits. AFRICON 2013: 1-6 - [c87]Robert Wille, Simon Stelter, Rolf Drechsler:
Exploiting reversibility in the complete simulation of reversible circuits. AFRICON 2013: 1-6 - [c86]Robert Wille, Mathias Soeken, Christian Otterstedt, Rolf Drechsler:
Improving the mapping of reversible circuits to quantum circuits using multiple target lines. ASP-DAC 2013: 145-150 - [c85]Julia Seiter, Robert Wille, Mathias Soeken, Rolf Drechsler:
Determining relevant model elements for the verification of UML/OCL specifications. DATE 2013: 1189-1192 - [c84]Robert Wille, Martin Gogolla, Mathias Soeken, Mirco Kuhlmann, Rolf Drechsler:
Towards a generic verification methodology for system models. DATE 2013: 1193-1196 - [c83]Shuo Yang, Robert Wille, Daniel Große, Rolf Drechsler:
Minimal Stimuli Generation in Simulation-Based Verification. DSD 2013: 439-444 - [c82]Jannis Stoppe, Robert Wille, Rolf Drechsler:
Cone of Influence Analysis at the Electronic System Level Using Machine Learning. DSD 2013: 582-587 - [c81]Rolf Drechsler, Mathias Soeken, Robert Wille:
Text statt C++: Automatisierung des Systementwurfs mit Hilfe natürlicher Sprachverarbeitung. GI-Jahrestagung 2013: 151 - [c80]Stephan Eggersglüß, Robert Wille, Rolf Drechsler:
Improved SAT-based ATPG: more constraints, better compaction. ICCAD 2013: 85-90 - [c79]Robert Wille, Hongyan Zhang, Rolf Drechsler:
Fault Ordering for Automatic Test Pattern Generation of Reversible Circuits. ISMVL 2013: 29-34 - [c78]Nabila Abdessaied, Mathias Soeken, Robert Wille, Rolf Drechsler:
Exact Template Matching Using Boolean Satisfiability. ISMVL 2013: 328-333 - [c77]Jannis Stoppe, Robert Wille, Rolf Drechsler:
Data extraction from SystemC designs using debug symbols and the SystemC API. ISVLSI 2013: 26-31 - [c76]Rolf Drechsler, Melanie Diepenbeck, Stephan Eggersglüß, Robert Wille:
PASSAT 2.0: A multi-functional SAT-based testing framework. LATW 2013: 1 - [c75]Mathias Soeken, Robert Wille, Eugen Kuksa, Rolf Drechsler:
Generierung von OCL-Ausdrücken aus natürlichsprachlichen Beschreibungen. MBMV 2013: 99-103 - [c74]Robert Wille, Rolf Drechsler:
The SyReC hardware description language: Enabling scalable synthesis of reversible circuits. MWSCAS 2013: 1063-1066 - [c73]Philipp Niemann, Robert Wille, Rolf Drechsler:
On the "Q" in QMDDs: Efficient Representation of Quantum Functionality in the QMDD Data-Structure. RC 2013: 125-140 - [c72]Arighna Deb, Debesh K. Das, Hafizur Rahaman, Bhargab B. Bhattacharya, Robert Wille, Rolf Drechsler:
Reversible Circuit Synthesis of Symmetric Functions Using a Simple Regular Structure. RC 2013: 182-195 - [c71]Kamalika Datta, Gaurav Rathi, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler:
Exploiting Negative Control Lines in the Optimization of Reversible Circuits. RC 2013: 209-220 - [c70]Nabila Abdessaied, Robert Wille, Mathias Soeken, Rolf Drechsler:
Reducing the Depth of Quantum Circuits Using Additional Circuit Lines. RC 2013: 221-233 - [i4]Zahra Sasanian, Robert Wille, D. Michael Miller:
Clarification on the Mapping of Reversible Circuits to the NCV-v1 Library. CoRR abs/1309.1419 (2013) - 2012
- [j10]Rolf Drechsler, Irek Ulidowski, Robert Wille:
Foreword: Special Issue on Reversible Computation. J. Multiple Valued Log. Soft Comput. 18(1): 1-3 (2012) - [j9]Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler:
RevKit: A Toolkit for Reversible Circuit Design. J. Multiple Valued Log. Soft Comput. 18(1): 55-65 (2012) - [j8]D. Michael Miller, Robert Wille, Rolf Drechsler:
Reducing Reversible Circuit Cost by Adding Lines. J. Multiple Valued Log. Soft Comput. 19(1-3): 185-201 (2012) - [j7]Robert Wille, Daniel Große, D. Michael Miller, Rolf Drechsler:
Equivalence Checking of Reversible Circuits. J. Multiple Valued Log. Soft Comput. 19(4): 361-378 (2012) - [c69]Mathias Soeken, Robert Wille, Christoph Hilken, Nils Przigoda, Rolf Drechsler:
Synthesis of reversible circuits with minimal lines for large functions. ASP-DAC 2012: 85-92 - [c68]Zahra Sasanian, Robert Wille, D. Michael Miller:
Realizing reversible circuits using a new class of quantum gates. DAC 2012: 36-41 - [c67]Robert Wille, Rolf Drechsler, Christof Osewold, Alberto García Ortiz:
Automatic design of low-power encoders using reversible circuit synthesis. DATE 2012: 1036-1041 - [c66]Robert Wille, Mathias Soeken, Rolf Drechsler:
Debugging of inconsistent UML/OCL models. DATE 2012: 1078-1083 - [c65]Mathias Soeken, Robert Wille, Rolf Drechsler:
Eliminating invariants in UML/OCL models. DATE 2012: 1142-1145 - [c64]Shuo Yang, Robert Wille, Daniel Große, Rolf Drechsler:
Coverage-Driven Stimuli Generation. DSD 2012: 525-528 - [c63]Rolf Drechsler, Mathias Soeken, Robert Wille:
Formal Specification Level. FDL (Selected Papers) 2012: 37-52 - [c62]Rolf Drechsler, Mathias Soeken, Robert Wille:
Formal Specification Level: Towards verification-driven design based on natural language processing. FDL 2012: 53-58 - [c61]Rolf Drechsler, Melanie Diepenbeck, Daniel Große, Ulrich Kühne, Hoang Minh Le, Julia Seiter, Mathias Soeken, Robert Wille:
Completeness-Driven Development. ICGT 2012: 38-50 - [c60]Rolf Drechsler, Ian G. Harris, Robert Wille:
Generating formal system models from natural language descriptions. HLDVT 2012: 164-165 - [c59]Rolf Drechsler, Robert Wille:
Synthesis of Reversible Circuits Using Decision Diagrams. ISED 2012: 1-5 - [c58]Robert Wille, Mathias Soeken, Nils Przigoda, Rolf Drechsler:
Exact Synthesis of Toffoli Gate Circuits with Negative Control Lines. ISMVL 2012: 69-74 - [c57]Mathias Soeken, Zahra Sasanian, Robert Wille, D. Michael Miller, Rolf Drechsler:
Optimizing the Mapping of Reversible Circuits to Four-Valued Quantum Gate Circuits. ISMVL 2012: 173-178 - [c56]Mathias Soeken, Robert Wille, Christian Otterstedt, Rolf Drechsler:
A Synthesis Flow for Sequential Reversible Circuits. ISMVL 2012: 299-304 - [c55]Robert Wille, Mathias Soeken, Eleonora Schönborn, Rolf Drechsler:
Circuit Line Minimization in the HDL-Based Synthesis of Reversible Logic. ISVLSI 2012: 213-218 - [c54]Julia Seiter, Mathias Soeken, Robert Wille, Rolf Drechsler:
Property Checking of Quantum Circuits Using Quantum Multiple-Valued Decision Diagrams. RC 2012: 183-196 - [c53]Mathias Soeken, Robert Wille, Shin-ichi Minato, Rolf Drechsler:
Using πDDs in the Design of Reversible Circuits. RC 2012: 197-203 - [c52]Mathias Soeken, Robert Wille, Rolf Drechsler:
Assisted Behavior Driven Development Using Natural Language Processing. TOOLS (50) 2012: 269-287 - [c51]Rolf Drechsler, Robert Wille:
Reversible Circuits: Recent Accomplishments and Future Challenges for an Emerging Technology - (Invited Paper). VDAT 2012: 383-392 - [e1]Alexis De Vos, Robert Wille:
Reversible Computation - Third International Workshop, RC 2011, Gent, Belgium, July 4-5, 2011. Revised Papers. Lecture Notes in Computer Science 7165, Springer 2012, ISBN 978-3-642-29516-4 [contents] - 2011
- [j6]Robert Wille, Daniel Große, Stefan Frehse, Gerhard W. Dueck, Rolf Drechsler:
Debugging reversible circuits. Integr. 44(1): 51-61 (2011) - [j5]Mehdi Saeedi, Robert Wille, Rolf Drechsler:
Synthesis of quantum circuits for linear nearest neighbor architectures. Quantum Inf. Process. 10(3): 355-377 (2011) - [c50]Hongyan Zhang, Stefan Frehse, Robert Wille, Rolf Drechsler:
Determining minimal testsets for reversible circuits using Boolean satisfiability. AFRICON 2011: 1-6 - [c49]Hongyan Zhang, Robert Wille, Rolf Drechsler:
Improved Fault Diagnosis for Reversible Circuits. Asian Test Symposium 2011: 207-212 - [c48]Mathias Soeken, Robert Wille, Rolf Drechsler:
Verifying dynamic aspects of UML models. DATE 2011: 1077-1082 - [c47]Robert Wille, Oliver Keszöcze, Rolf Drechsler:
Determining the minimal number of lines for large reversible circuits. DATE 2011: 1204-1207 - [c46]Rolf Drechsler, Alexander Finder, Robert Wille:
Improving ESOP-Based Synthesis of Reversible Logic Using Evolutionary Algorithms. EvoApplications (2) 2011: 151-161 - [c45]Sebastian Offermann, Robert Wille, Rolf Drechsler:
Efficient realization of control logic in reversible circuits. FDL 2011: 1-7 - [c44]Rolf Drechsler, Robert Wille:
From Truth Tables to Programming Languages: Progress in the Design of Reversible Circuits. ISMVL 2011: 78-85 - [c43]Robert Wille, Mathias Soeken, Daniel Große, Eleonora Schönborn, Rolf Drechsler:
Designing a RISC CPU in Reversible Logic. ISMVL 2011: 170-175 - [c42]D. Michael Miller, Robert Wille, Zahra Sasanian:
Elementary Quantum Gate Realizations for Multiple-Control Toffoli Gates. ISMVL 2011: 288-293 - [c41]Robert Wille, Hongyan Zhang, Rolf Drechsler:
ATPG for Reversible Circuits Using Simulation, Boolean Satisfiability, and Pseudo Boolean Optimization. ISVLSI 2011: 120-125 - [c40]Robert Wille, Mathias Soeken, Daniel Große, Eleonora Schönborn, Rolf Drechsler:
Designing a RISC CPU in Reversible Logic. MBMV 2011: 249-258 - [c39]Mathias Soeken, Robert Wille, Rolf Drechsler:
Towards automatic determination of problem bounds for object instantiation in static model verification. MoDeVVa@MoDELS 2011: 2:1-2:4 - [c38]Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler:
RevKit: An Open Source Toolkit for the Design of Reversible Circuits. RC 2011: 64-76 - [c37]Mathias Soeken, Robert Wille, Rolf Drechsler:
Encoding OCL Data Types for SAT-Based Verification of UML/OCL Models. TAP@TOOLS 2011: 152-170 - [i3]Mehdi Saeedi, Robert Wille, Rolf Drechsler:
Synthesis of Quantum Circuits for Linear Nearest Neighbor Architectures. CoRR abs/1110.6412 (2011) - [i2]Kenichi Morita, Robert Wille:
Design of Reversible and Quantum Circuits (Dagstuhl Seminar 11502). Dagstuhl Reports 1(12): 47-61 (2011) - 2010
- [b2]Robert Wille, Rolf Drechsler:
Towards a Design Flow for Reversible Logic. Springer 2010, ISBN 978-90-481-9578-7, pp. I-XIII, 1-184 - [j4]Robert Wille, Rolf Drechsler:
BDD-Based Synthesis of Reversible Logic. Int. J. Appl. Metaheuristic Comput. 1(4): 25-41 (2010) - [j3]Robert Wille, Rolf Drechsler:
Synthese reversibler Logik (Synthesizing Reversible Logic). it Inf. Technol. 52(1): 30-38 (2010) - [c36]Robert Wille, Mathias Soeken, Rolf Drechsler:
Reducing the number of lines in reversible circuits. DAC 2010: 647-652 - [c35]Mathias Soeken, Robert Wille, Mirco Kuhlmann, Martin Gogolla, Rolf Drechsler:
Verifying UML/OCL models using Boolean satisfiability. DATE 2010: 1341-1344 - [c34]Sebastian Offermann, Robert Wille, Gerhard W. Dueck, Rolf Drechsler:
Synthesizing multiplier in reversible logic. DDECS 2010: 335-340 - [c33]Mathias Soeken, Robert Wille, Gerhard W. Dueck, Rolf Drechsler:
Window optimization of reversible and quantum circuits. DDECS 2010: 341-345 - [c32]Robert Wille, Sebastian Offermann, Rolf Drechsler:
SyReC: A Programming Language for Synthesis of Reversible Circuits. FDL 2010: 184-189 - [c31]Hans-Jörg Kreowski, Sabine Kuske, Robert Wille:
Graph Transformation Units Guided by a SAT Solver. ICGT 2010: 27-42 - [c30]Jean Christoph Jung, Stefan Frehse, Robert Wille, Rolf Drechsler:
Enhancing debugging of multiple missing control errors in reversible logic. ACM Great Lakes Symposium on VLSI 2010: 465-470 - [c29]Mathias Soeken, Robert Wille, Rolf Drechsler:
Hierarchical synthesis of reversible circuits using positive and negative Davio decomposition. IDT 2010: 143-148 - [c28]Hongyan Zhang, Robert Wille, Rolf Drechsler:
SAT-based ATPG for reversible circuits. IDT 2010: 149-154 - [c27]Stefan Frehse, Robert Wille, Rolf Drechsler:
Efficient Simulation-Based Debugging of Reversible Logic. ISMVL 2010: 156-161 - [c26]D. Michael Miller, Robert Wille, Rolf Drechsler:
Reducing Reversible Circuit Cost by Adding Lines. ISMVL 2010: 217-222 - [c25]Robert Wille, Sebastian Offermann, Rolf Drechsler:
SyReC: A Programming Language for Synthesis of Reversible Circuits. MBMV 2010: 21-30 - [c24]Mathias Soeken, Robert Wille, Mirco Kuhlmann, Martin Gogolla, Rolf Drechsler:
Verifying UML/OCL Models Using Boolean Satisfiability. MBMV 2010: 57-66
2000 – 2009
- 2009
- [b1]Robert Wille:
Towards a design flow for reversible logic. University of Bremen, 2009, pp. 1-158 - [j2]Daniel Große, Robert Wille, Gerhard W. Dueck, Rolf Drechsler:
Exact Synthesis of Elementary Quantum Gate Circuits. J. Multiple Valued Log. Soft Comput. 15(4): 283-300 (2009) - [j1]Daniel Große, Robert Wille, Gerhard W. Dueck, Rolf Drechsler:
Exact Multiple-Control Toffoli Network Synthesis With SAT Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(5): 703-715 (2009) - [c23]Robert Wille, Rolf Drechsler:
BDD-based synthesis of reversible logic for large functions. DAC 2009: 270-275 - [c22]Robert Wille, Daniel Große, Stefan Frehse, Gerhard W. Dueck, Rolf Drechsler:
Debugging of Toffoli networks. DATE 2009: 1284-1289 - [c21]D. Michael Miller, Robert Wille, Gerhard W. Dueck:
Synthesizing Reversible Circuits for Irreversible Functions. DSD 2009: 749-756 - [c20]Robert Wille, Daniel Große, Finn Haedicke, Rolf Drechsler:
SMT-based stimuli generation in the SystemC Verification library. FDL 2009: 1-6 - [c19]Daniel Große, Robert Wille, Ulrich Kühne, Rolf Drechsler:
Contradictory antecedent debugging in bounded model checking. ACM Great Lakes Symposium on VLSI 2009: 173-176 - [c18]André Sülflow, Robert Wille, Görschwin Fey, Rolf Drechsler:
Evaluation of Cardinality Constraints on SMT-Based Debugging. ISMVL 2009: 298-303 - [c17]Robert Wille, Daniel Große, D. Michael Miller, Rolf Drechsler:
Equivalence Checking of Reversible Circuits. ISMVL 2009: 324-330 - [c16]Robert Wille, Daniel Große, D. Michael Miller, Rolf Drechsler:
Equivalence Checking of Reversible Circuits. MBMV 2009: 67-76 - [c15]Robert Wille, Daniel Große, Gerhard W. Dueck, Rolf Drechsler:
Reversible Logic Synthesis with Output Permutation. VLSI Design 2009: 189-194 - [c14]Robert Wille, Rolf Drechsler:
Effect of BDD Optimization on Synthesis of Reversible and Quantum Logic. RC@ETAPS 2009: 57-70 - [p1]Robert Wille:
Ein Entwurfsablauf für Reversible Schaltkreise. Ausgezeichnete Informatikdissertationen 2009: 291-300 - [i1]Robert Wille, Jean Christoph Jung, André Sülflow, Rolf Drechsler:
SWORD - Module-based SAT Solving. Algorithms and Applications for Next Generation SAT Solvers 2009 - 2008
- [c13]Robert Wille, Hoang Minh Le, Gerhard W. Dueck, Daniel Große:
Quantified Synthesis of Reversible Logic. DATE 2008: 1015-1020 - [c12]Robert Wille, Görschwin Fey, Marc Messing, Gerhard Angst, Lothar Linhard, Rolf Drechsler:
Identifying a Subset of System Verilog Assertions for Efficient Bounded Model Checking. DSD 2008: 542-549 - [c11]Daniel Große, Robert Wille, Robert Siegmund, Rolf Drechsler:
Contradiction Analysis for Constraint-based Random Simulation. FDL 2008: 130-135 - [c10]Daniel Große, Robert Wille, Robert Siegmund, Rolf Drechsler:
Debugging Contradictory Constraints in Constraint-Based Random Simulation. FDL (Selected Papers) 2008: 273-290 - [c9]Daniel Große, Robert Wille, Gerhard W. Dueck, Rolf Drechsler:
Exact Synthesis of Elementary Quantum Gate Circuits for Reversible Functions with Don't Cares. ISMVL 2008: 214-219 - [c8]Robert Wille, Daniel Große, Lisa Teuber, Gerhard W. Dueck, Rolf Drechsler:
RevLib: An Online Resource for Reversible Functions and Reversible Circuits. ISMVL 2008: 220-225 - [c7]Robert Wille, Daniel Große, Mathias Soeken, Rolf Drechsler:
Using Higher Levels of Abstraction for Solving Optimization Problems by Boolean Satisfiability. ISVLSI 2008: 411-416 - [c6]Daniel Große, Robert Wille, Ulrich Kühne, Rolf Drechsler:
Using Contradiction Analysis for Antecedent Debugging in Bounded Model Checking. MBMV 2008: 169-178 - 2007
- [c5]Robert Wille, Daniel Große:
Fast exact Toffoli network synthesis of reversible logic. ICCAD 2007: 60-64 - [c4]Görschwin Fey, Daniel Große, Stephan Eggersglüß, Robert Wille, Rolf Drechsler:
Formal Verification on the Word Level using SAT-like Proof Techniques. MBMV 2007: 81-90 - [c3]Robert Wille, Görschwin Fey, Daniel Große, Stephan Eggersglüß, Rolf Drechsler:
SWORD: A SAT like Prover Using Word Level Information. VLSI-SoC (Selected Papers) 2007: 1-17 - [c2]Robert Wille, Görschwin Fey, Daniel Große, Stephan Eggersglüß, Rolf Drechsler:
SWORD: A SAT like prover using word level information. VLSI-SoC 2007: 88-93
1990 – 1999
- 1993
- [c1]Kevin Bolding, Sen-Ching S. Cheung, Sung-Eun Choi, Carl Ebeling, Soha Hassoun, Ton Anh Ngo, Robert Wille:
The chaos router chip: design and implementation of an adaptive router. VLSI 1993: 311-320
Coauthor Index
aka: Frank Sill Torres
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