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ORCIDRaphaël David
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Other persons with a similar name
- David Raphael M. Daza
- Raphaël-David Lasseri
![[0000-0003-3591-629X]](https://dblp.org/img/orcid-mark.12x12.png "0000-0003-3591-629X")
— Université Paris-Saclay, Orsay, France - Raphael David Schilling
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2010 – 2019
- 2014
[j6]Yves Lhuillier, Maroun Ojail, Alexandre Guerre, Jean-Marc Philippe, Karim Ben Chehida, Farhat Thabet, Caaliph Andriamisaina, Chafic Jaber, Raphaël David:
HARS: A hardware-assisted runtime software for embedded many-core architectures. ACM Trans. Embed. Comput. Syst. 13(3s): 102:1-102:25 (2014)- 2013
- [c24]Farhat Thabet, Yves Lhuillier, Caaliph Andriamisaina, Jean-Marc Philippe, Raphaël David:
An efficient and flexible hardware support for accelerating synchronization operations on the STHORM many-core architecture. DATE 2013: 531-534 - [c23]Erwan Piriou, Raphaël David, Fahim Rahim, Solaiman Rahim:
A fast and accurate methodology for power estimation and reduction of programmable architectures. DATE 2013: 1054-1055 - [c22]Maroun Ojail, Raphaël David, Yves Lhuillier, Alexandre Guerre:
ARTM: a lightweight fork-join framework for many-core embedded systems. DATE 2013: 1510-1515 - [c21]Chiara Sandionigi, Olivier Héron, Clement Bertolini, Raphaël David:
When processors get old: Evaluation of BTI and HCI effects on performance and reliability. IOLTS 2013: 185-186 - 2011
- [c20]M. Alexandre Carbon, Olivier Héron, Karim Ben Chehida, Raphaël David:
Impact of power management on temperature and reliability evolution for an embedded many-core architecture. ARCS Workshops 2011 - [c19]Maroun Ojail, Raphaël David, Karim Ben Chehida, Yves Lhuillier, Luca Benini:
Synchronous Reactive Fine Grain Tasks Management for Homogeneous Many-Core Architectures. ARCS Workshops 2011 - [c18]Matthieu Texier, Raphaël David, Karim Ben Chehida, Olivier Sentieys:
Graphic rendering application profiling on a shared memory MPSOC architecture. DASIP 2011: 115-121 - [c17]Matthieu Texier, Erwan Piriou, Mathieu Thevenin, Raphaël David:
Designing processors using MAsS, a modular and lightweight instruction-level exploration tool. DASIP 2011: 150-155 - [c16]Charly Bechara, Aurelien Berhault, Nicolas Ventroux, Stéphane Chevobbe, Yves Lhuillier, Raphaël David, Daniel Etiemble:
A small footprint interleaved multithreaded processor for embedded systems. ICECS 2011: 685-690 - 2010
- [j5]Nicolas Ventroux, Raphaël David:
Les architectures parallèles sur puce. Synthèse des architectures multitâches pour les systèmes embarqués. Tech. Sci. Informatiques 29(3): 345-378 (2010) - [c15]Nicolas Ventroux, Alexandre Guerre, Tanguy Sassolas, L. Moutaoukil, Guillaume Blanc, Charly Bechara, Raphaël David:
SESAM: An MPSoC Simulation Environment for Dynamic Application Processing. CIT 2010: 1880-1886 - [c14]Céline Azar, Maroun Ojail, Stéphane Chevobbe, Raphaël David:
CERA: A Channel Estimation Reconfigurable Architecture. ICT 2010: 957-964 - [c13]Nicolas Ventroux, Raphaël David:
SCMP architecture: an asymmetric multiprocessor system-on-chip for dynamic applications. IFMT 2010: 6:1-6:12 - [c12]Alexandre Guerre, Nicolas Ventroux, Raphaël David, Alain Mérigot:
Hierarchical Network-on-Chip for Embedded Many-Core Architectures. NOCS 2010: 189-196 - [c11]Nicolas Ventroux, Tanguy Sassolas, Raphaël David, Guillaume Blanc, Alexandre Guerre, Charly Bechara:
SESAM extension for fast MPSoC architectural exploration and dynamic streaming applications. VLSI-SoC 2010: 341-346
2000 – 2009
- 2009
- [c10]Daniel Ménard, Emmanuel Casseau, Shafqat Khan, Olivier Sentieys, Stéphane Chevobbe, Stéphane Guyetant, Raphaël David:
Reconfigurable Operator Based Multimedia Embedded Processor. ARC 2009: 39-49 - [c9]Alexandre Guerre, Nicolas Ventroux, Raphaël David, Alain Mérigot:
Approximate-Timed Transactional Level Modeling for MPSoC Exploration: A Network-on-Chip Case Study. DSD 2009: 390-397 - [c8]Maroun Ojail, Raphaël David, Stéphane Chevobbe, Didier Demigny:
Reconfiguration Level Analysis of FFT / FIR Units in Wireless Telecommunication Systems. DSD 2009: 575-581 - [c7]Maroun Ojail, Raphaël David, Stéphane Chevobbe, Didier Demigny:
A reconfigurable FIR/FFT unit for wireless telecommunication systems. FPL 2009: 645-648 - 2008
- [j4]Sébastien Pillement, Olivier Sentieys, Raphaël David:
DART: A Functional-Level Reconfigurable Architecture for High Energy Efficiency. EURASIP J. Embed. Syst. 2008 (2008) - [j3]Daniel Chillet, Raphaël David, Erwan Grâce, Olivier Sentieys:
Structure mémoire reconfigurable. Vers une structure de stockage faible consommation. Tech. Sci. Informatiques 27(1-2): 181-202 (2008) - 2007
- [j2]Sébastien Pillement, Raphaël David:
Architectures reconfigurable et faible consommation. Réalité ou prospective ? Tech. Sci. Informatiques 26(5): 595-621 (2007) - 2006
- [c6]Stéphane Chevobbe, Raphaël David, Frédéric Blanc, Thierry Collette, Olivier Sentieys:
Control Unit for Parallel Embedded System. ReCoSoC 2006: 168-176 - 2005
- [j1]Raphaël David, Dominique Lavenier, Sébastien Pillement:
Du microprocesseur au circuit FPGA. Une analyse sous l'angle de la reconfiguration. Tech. Sci. Informatiques 24(4): 395-422 (2005) - 2002
- [c5]Raphaël David, Daniel Chillet, Sébastien Pillement, Olivier Sentieys:
A Compilation Framework for a Dynamically Reconfigurable Architecture. FPL 2002: 1058-1067 - [c4]Raphaël David, Daniel Chillet, Sébastien Pillement, Olivier Sentieys:
Mapping future generation mobile telecommunication applications on a dynamically reconfigurable arcidtecture. ICASSP 2002: 4194 - [c3]Raphaël David, Daniel Chillet, Sébastien Pillement, Olivier Sentieys:
DART: A Dynamically Reconfigurable Architecture Dealing with Future Mobile Telecommunications Constraints. IPDPS 2002 - 2001
- [c2]Raphaël David, Daniel Chillet, Sébastien Pillement, Olivier Sentieys:
A Dynamically Reconfigurable Architecture for Low-Power Multimedia Terminals. VLSI-SOC 2001: 51-62
1990 – 1999
Coauthor Index
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