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ORCIDZhiyuan Zhang 0005
Person information
- affiliation: University of Melbourne, VIC, Australia
- affiliation (former): University of Adelaide, SA, Australia
Other persons with the same name
- Zhiyuan Zhang — disambiguation page
- Zhiyuan Zhang 0001
![[0000-0001-5550-8897]](https://dblp.org/img/orcid-mark.12x12.png "0000-0001-5550-8897")
— Peking University, School of Computer Science, MOE Key Laboratory of Computational Linguistics, Beijing, China - Zhiyuan Zhang 0002 — Northwestern Polytechnical University, School of Electronics and Information, Xi'an, China
- Zhiyuan Zhang 0003 — Beijing Jiaotong University, Beijing Municipal Commission of Education, School of Communication and Information Engineering, China
- Zhiyuan Zhang 0004 — Singapore Management University, School of Computing and Information Systems, Singapore (and 2 more)
- Zhiyuan Zhang 0006 — Stony Brook University, Computer Science Department, NY, USA
- Zhiyuan Zhang 0007 — Georgia Institute of Technology, Atlanta, GA, USA
- Zhiyuan Zhang 0008 — Shandong University, Qingdao, China
Other persons with a similar name
- Katherine Zhiyuan Zhang — Warren Weaver Hall, New York, NY, USA
- Zhi-Yuan Zhang
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2020 – today
- 2025
[i4]Santiago Arranz Olmos, Gilles Barthe, Lionel Blatter, Sören van der Wall, Zhiyuan Zhang:
Transparent Decompilation for Timing Side-Channel Analyses. CoRR abs/2501.04183 (2025)- 2024
- [j2]Florian Sieck, Zhiyuan Zhang, Sebastian Berndt, Chitchanok Chuengsatiansup, Thomas Eisenbarth, Yuval Yarom:
TeeJam: Sub-Cache-Line Leakages Strike Back. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(1): 457-500 (2024) - [j1]Shing Hing William Cheng, Chitchanok Chuengsatiansup, Daniel Genkin, Dallas McNeil, Toby Murray, Yuval Yarom, Zhiyuan Zhang:
Evict+Spec+Time: Exploiting Out-of-Order Execution to Improve Cache-Timing Attacks. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(3): 224-248 (2024) - [i3]Shing Hing William Cheng, Chitchanok Chuengsatiansup, Daniel Genkin, Dallas McNeil, Toby Murray, Yuval Yarom, Zhiyuan Zhang:
Evict+Spec+Time: Exploiting Out-of-Order Execution to Improve Cache-Timing Attacks. IACR Cryptol. ePrint Arch. 2024: 149 (2024) - [i2]Santiago Arranz Olmos, Gilles Barthe, Chitchanok Chuengsatiansup, Benjamin Grégoire, Vincent Laporte, Tiago Oliveira, Peter Schwabe, Yuval Yarom, Zhiyuan Zhang:
Protecting cryptographic code against Spectre-RSB. IACR Cryptol. ePrint Arch. 2024: 1070 (2024) - 2023
- [c3]Zhiyuan Zhang, Gilles Barthe, Chitchanok Chuengsatiansup, Peter Schwabe, Yuval Yarom:
Ultimate SLH: Taking Speculative Load Hardening to the Next Level. USENIX Security Symposium 2023: 7125-7142 - [c2]Zhiyuan Zhang, Mingtian Tao, Sioli O'Connell, Chitchanok Chuengsatiansup, Daniel Genkin, Yuval Yarom:
BunnyHop: Exploiting the Instruction Prefetcher. USENIX Security Symposium 2023: 7321-7337 - 2022
- [c1]Chitchanok Chuengsatiansup, Daniel Genkin, Yuval Yarom, Zhiyuan Zhang:
Side-Channeling the Kalyna Key Expansion. CT-RSA 2022: 272-296 - [i1]Zhiyuan Zhang, Gilles Barthe, Chitchanok Chuengsatiansup, Peter Schwabe, Yuval Yarom:
Breaking and Fixing Speculative Load Hardening. IACR Cryptol. ePrint Arch. 2022: 715 (2022)
Coauthor Index
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