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Pierre-Henri Horrein
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2020 – today
- 2022
- [j4]Jean Bruant, Pierre-Henri Horrein, Olivier Muller, Tristan Groléat, Frédéric Pétrot:
Toward Agile Hardware Designs With Chisel: A Network Use Case. IEEE Des. Test 39(1): 77-84 (2022) - 2020
- [c14]Jean Bruant, Pierre-Henri Horrein, Olivier Muller, Tristan Groléat, Frédéric Pétrot:
(System)Verilog to Chisel Translation for Faster Hardware Design. RSP 2020: 1-7
2010 – 2019
- 2018
- [j3]Ronan Fablet, Phi Huynh Viet, Redouane Lguensat, Pierre-Henri Horrein, Bertrand Chapron:
Spatio-Temporal Interpolation of Cloudy SST Fields Using Conditional Analog Data Assimilation. Remote. Sens. 10(2): 310 (2018) - 2017
- [c13]Franck Cornevaux-Juignet, Matthieu Arzel, Pierre-Henri Horrein, Tristan Groleat, Christian Person:
Combining FPGAs and processors for high-throughput forensics IEEE CNS 17 poster. CNS 2017: 388-389 - [c12]Franck Cornevaux-Juignet, Matthieu Arzel, Pierre-Henri Horrein, Tristan Groleat, Christian Person:
Open-source flexible packet parser for high data rate agile network probe. CNS 2017: 610-618 - [c11]Max Raphael Sobroza Marques, Ghouthi Boukli Hacene, Carlos Eduardo Rosar Kós Lassance, Pierre-Henri Horrein:
Large-Scale Memory of Sequences Using Binary Sparse Neural Networks on GPU. HPCS 2017: 553-559 - 2016
- [c10]Pierre-Henri Horrein, Philip-Dylan Gleonec, Erwan Libessart, André Lalevee, Matthieu Arzel:
Ouessant: Flexible integration of dedicated coprocessors in Systems on Chip. DATE 2016: 1493-1496 - [c9]André Lalevee, Pierre-Henri Horrein, Matthieu Arzel, Michael Hübner, Sandrine Vaton:
AutoReloc: Automated Design Flow for Bitstream Relocation on Xilinx FPGAs. DSD 2016: 14-21 - [c8]Pierre-Henri Horrein, Benoit Porteboeuf, André Lalevee:
Ouessant: Microcontroller approach for flexible accelerator integration and control in System-on-Chip. FPL 2016: 1-4 - [c7]Philippe Tigreat, Pierre-Henri Horrein, Vincent Gripon:
Massively parallel implementation of sparse message retrieval algorithms in Clustered Clique Networks. HPCS 2016: 935-939 - 2015
- [c6]Valentin Mena Morales, Yahia Brakni, Pierre-Henri Horrein, Amer Baghdadi:
Caasper: providing accessible FPGA-acceleration over the network. RSP 2015: 68-74 - 2014
- [c5]Valentin Mena Morales, Pierre-Henri Horrein, Amer Baghdadi, Erik Hochapfel, Sandrine Vaton:
Energy-efficient FPGA implementation for binomial option pricing using OpenCL. DATE 2014: 1-6 - [c4]Houcine Chougrani, Jean Schwoerer, Pierre-Henri Horrein, Amer Baghdadi, Francois Dehmas:
UWB-IR digital baseband architecture for IEEE 802.15.6 wireless BAN. ICECS 2014: 866-869 - 2013
- [j2]Pierre-Henri Horrein, Christine Hennebert, Frédéric Pétrot:
An environment for (re)configuration and execution management of heterogeneous flexible radio platforms. Microprocess. Microsystems 37(6-7): 701-712 (2013) - 2012
- [b1]Pierre-Henri Horrein:
Architectures logicielles pour la radio flexible : intégration d'unités de calcul hétérogènes. (Software design for flexible radio : integration of heterogeneous computing units). Grenoble Alpes University, France, 2012 - [j1]Pierre-Henri Horrein, Christine Hennebert, Frédéric Pétrot:
Integration of GPU Computing in a Software Radio Environment. J. Signal Process. Syst. 69(1): 55-65 (2012) - [c3]Yan Xu, Olivier Muller, Pierre-Henri Horrein, Frédéric Pétrot:
HCM: An abstraction layer for seamless programming of DPR FPGA. FPL 2012: 583-586 - 2011
- [c2]Pierre-Henri Horrein, Christine Hennebert, Frédéric Pétrot:
An Environment for (re)configuration and Execution Managenment of Flexible Radio Platforms. DSD 2011: 327-334
2000 – 2009
- 2009
- [c1]Damien Hedde, Pierre-Henri Horrein, Frédéric Pétrot, Robin Rolland, Franck Rousseau:
A MPSoC Prototyping Platform for Flexible Radio Applications. DSD 2009: 559-566
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