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2010 – 2019
- 2016
[c56]Shinsuke Hara, Takunori Shimazaki, Hiroyuki Okuhata, Isao Shirakawa, Hiroyuki Yomo:
A real-time vital sensing system for persons during exercises. ICCE-Berlin 2016: 20-23- 2014
- [c55]Lei Lin, N. Kawarabayashi, Masahiro Fukui, Isao Shirakawa:
Live demonstration: A battery smart sensor for smart grid. APCCAS 2014: 173-174 - [c54]Hiroyuki Okuhata, Rintaro Imai, Masanao Ise, Roberto Yusi Omaki, Hajime Nakamura, Shinsuke Hara, Isao Shirakawa:
Implementation of dynamic-range enhancement and super-resolution algorithms for medical image processing. ICCE 2014: 181-184 - 2013
- [c53]Hiroyuki Okuhata, Masanao Ise, Roberto Yusi Omaki, Isao Shirakawa:
Implementation of super-resolution scaler for Full HD and 4K video. ICCE-Berlin 2013: 1-5 - 2011
- [c52]Shohei Asakawa, Shuji Tsukiyama, Isao Shirakawa, Shuji Nishi, Tadashi Takeda, Tomoyuki Nagai, Yasushi Kubota:
An automatic layout method for timing pulse generator of small LCD driver. ECCTD 2011: 697-700
2000 – 2009
- 2008
- [j36]Yukio Mitsuyama, Kazuma Takahashi, Rintaro Imai, Masanori Hashimoto
, Takao Onoye, Isao Shirakawa:
Area-Efficient Reconfigurable Architecture for Media Processing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(12): 3651-3662 (2008) - 2007
- [j35]Masanori Hashimoto, Takahito Ijichi, Shingo Takahashi, Shuji Tsukiyama, Isao Shirakawa:
Transistor Sizing of LCD Driver Circuit for Technology Migration. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(12): 2712-2717 (2007) - 2006
- [j34]Masanao Ise, Yasuhiro Ogasahara, Takao Onoye, Isao Shirakawa:
W-CDMA Channel Codec by Configurable Processors. Intell. Autom. Soft Comput. 12(3): 317-329 (2006) - [j33]Gen Fujita, Takaaki Imanaka, Hyunh Van Nhat, Takao Onoye, Isao Shirakawa:
Real-Time Human Object Extraction Method for Mobile Systems Based on Color Space Segmentation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(4): 941-949 (2006) - [j32]Shingo Takahashi, Shuji Tsukiyama, Masanori Hashimoto, Isao Shirakawa:
A Sampling Switch Design Procedure for Active Matrix Liquid Crystal Displays. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(12): 3538-3545 (2006) - [j31]Zhaohui Guo, Yuuki Nishikawa, Roberto Yusi Omaki, Takao Onoye, Isao Shirakawa:
A low-complexity FEC assignment scheme for motion JPEG2000 over wireless network. IEEE Trans. Consumer Electron. 52(1): 81-86 (2006) - 2005
- [j30]Yukio Mitsuyama, Motoki Kimura, Takao Onoye, Isao Shirakawa:
Architecture of IEEE802.11i Cipher Algorithms for Embedded Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(4): 899-906 (2005) - [j29]Atsushi Kosaka, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa:
Design of Ogg Vorbis Decoder System for Embedded Platform. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(8): 2124-2130 (2005) - [j28]Tomoya Matsumura, Nobuyuki Iwanaga, Wataru Kobayashi, Takao Onoye, Isao Shirakawa:
Embedded 3D sound movement system based on feature extraction of head-related transfer function. IEEE Trans. Consumer Electron. 51(1): 262-267 (2005) - [c51]Shingo Takahashi, Akira Taji, Shuji Tsukiyama, Masanori Hashimoto, Isao Shirakawa:
A design scheme for sampling switch in active matrix LCD. ECCTD 2005: 31-34 - [c50]Yoshihiro Uchida, Sadahiro Tani, Masanori Hashimoto, Shuji Tsukiyama, Isao Shirakawa:
Interconnect capacitance extraction for system LCD circuits. ACM Great Lakes Symposium on VLSI 2005: 160-163 - [c49]Tomoya Matsumura, Nobuyuki Iwanaga, Takao Onoye, Wataru Kobayashi, Isao Shirakawa, Itthichai Arungsrisangchai:
3D sound movement system for embedded applications. ISCAS (5) 2005: 5345-5348 - 2004
- [c48]Atsushi Kosaka, Satoshi Yamaguchi, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa:
SoC design of Ogg Vorbis decoder using embedded processor. Conf. Computing Frontiers 2004: 481-487 - [c47]Shinichi Maeta, Atsushi Kosaka, Akihisa Yamada, Takao Onoye, Toru Chiba, Isao Shirakawa:
C-based hardware design of IMDCT accelerator for Ogg Vorbis decoder. EUSIPCO 2004: 1361-1364 - 2003
- [j27]Katsuya Nakagawa, Masaru Kawakita, Koji Sato, Mitsuru Minakuchi, Takao Onoye, Toru Chiba, Isao Shirakawa:
Object Sharing Scheme for Heterogeneous Environment. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(4): 813-821 (2003) - [j26]Sadahiro Tani, Yoshihiro Uchida, Makoto Furuie, Shuji Tsukiyama, BuYeol Lee, Shuji Nishi, Yasushi Kubota, Isao Shirakawa, Shigeki Imai:
Parasitic Capacitance Modeling for Non-Planar Interconnects in Liquid Crystal Displays. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(12): 2923-2932 (2003) - [j25]Motoki Kimura, Morgan Hirosuke Miki, Takao Onoye, Isao Shirakawa:
Implementation of Java Accelerator for High-Performance Embedded Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(12): 3079-3088 (2003) - [j24]Noriaki Sakamoto, Wataru Kobayashi, Takao Onoye, Isao Shirakawa:
Single DSP Implementation of Realtime 3D Sound Synthesis Algorithm. J. Circuits Syst. Comput. 12(1): 55-74 (2003) - [j23]Nobuyuki Iwanaga, Wataru Kobayashi, Kazuhiko Furuya, Takao Onoye, Isao Shirakawa:
Embedded implementation of acoustic field enhancement for stereo sound sources. IEEE Trans. Consumer Electron. 49(3): 737-741 (2003) - [c46]Kenji Hontani, Takaaki Imanaka, Gen Fujita, Takao Onoye, Isao Shirakawa:
Real-time face object extraction for video phone. ICIP (3) 2003: 873-876 - [c45]Shinya Komata, Ablonczy Pal, Noriaki Sakamoto, Wataru Kobayashi, Takao Onoye, Isao Shirakawa:
Interactive interface of realtime 3D sound movement for embedded applications. ISCAS (2) 2003: 520-523 - 2002
- [j22]Roberto Yusi Omaki, Gen Fujita, Takao Onoye, Isao Shirakawa:
An Embedded Zerotree Wavelet Video Coding Algorithm with Reduced Memory Bandwidth. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(3): 703-713 (2002) - [j21]Morgan Hirosuke Miki, Mamoru Sakamoto, Shingo Miyamoto, Yoshinori Takeuchi, Toyohiko Yoshida, Isao Shirakawa:
Code Efficiency Evaluation for Embedded Processors. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(4): 811-818 (2002) - [j20]Hiroyuki Okada, Altan-Erdene Shiitev, Hak-Sop Song, Gen Fujita, Takao Onoye, Isao Shirakawa:
Error Detection by Digital Watermarking for MPEG-4 Video Coding. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(6): 1281-1288 (2002) - [j19]Hiroshi Mizuno, Hiroyuki Kobayashi, Takao Onoye, Isao Shirakawa:
Performance Estimation at Architecture Level for Embedded Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(12): 2636-2644 (2002) - [c44]Kenji Hontani, Takaaki Imanaka, Gen Fujita, Takao Onoye, Isao Shirakawa:
Realtime face object extraction algorithm for video phone. APCCAS (1) 2002: 35-38 - [c43]Nobuyuki Iwanaga, Wataru Kobayashi, Kazuhiko Furuya, Mamoru Sakamoto, Takao Onoye, Isao Shirakawa:
Embedded implementation of acoustic field enhancement for stereo headphones. APCCAS (1) 2002: 51-54 - [c42]Sadahiro Tani, Yoshihiro Uchida, Makoto Furuie, Shuji Tsukiyama, BuYeol Lee, Shuji Nishi, Yasushi Kubota, Isao Shirakawa, Shigeki Imai:
Parasitic capacitance modeling for multilevel interconnects. APCCAS (1) 2002: 59-64 - [c41]Yukio Mitsuyama, Zaldy Andales, Takao Onoye, Isao Shirakawa:
Burst mode: a new acceleration mode for 128-bit block ciphers. CICC 2002: 151-154 - [c40]Katsuya Nakagawa, Masaru Kawakita, Koji Sato, Mitsuru Minakuchi, Osamu Tsumori, Keitaro Hanada, Toru Chiba, Isao Shirakawa:
OCEAN: Object Communication Environment for Arbitrary Network. ICDCS Workshops 2002: 162-168 - [c39]Yoshihiro Uchida, Masanao Ise, Takao Onoye, Isao Shirakawa, Itthichai Arungsrisangchai:
VLSI architecture of digital matched filter and prime interleaver for W-CDMA. ISCAS (3) 2002: 269-272 - [c38]Yoshihiro Ohtani, N. Kawahara, T. Tomaru, K. Maruyama, Takao Onoye, Isao Shirakawa, Toru Chiba:
Error correction block based ARQ protocol for wireless digital video transmission. ISCAS (1) 2002: 605-608 - [c37]Toshiyuki Kaya, Isao Shirakawa, Ryusuke Miyamoto, Takao Onoye:
Design of Embedded System for Video Coding with Logic-Enhanced DRAM and Configurable Process. MTDT 2002 - 2001
- [j18]Jianping Fan, Jun Yu, Gen Fujita, Takao Onoye, Lide Wu, Isao Shirakawa:
Spatiotemporal segmentation for compact video representation. Signal Process. Image Commun. 16(6): 553-566 (2001) - [c36]Yukio Mitsuyama, Zaldy Andales, Takao Onoye, Isao Shirakawa:
A dynamically reconfigurable hardware-based cipher chip. ASP-DAC 2001: 11-12 - [c35]Roberto Yusi Omaki, Yu Dong, Morgan Hirosuke Miki, Makoto Furuie, Daisuke Taki, Masaya Tarui, Gen Fujita, Takao Onoye, Isao Shirakawa:
Realtime wavelet video coder based on reduced memory accessing. ASP-DAC 2001: 15-16 - [c34]Makoto Furuie, Takao Onoye, Shuji Tsukiyama, Isao Shirakawa:
Two-dimensional array layout for NMOS 4-phase dynamic logic. ICECS 2001: 589-592 - [c33]Noriaki Sakamoto, Wataru Kobayashi, Takao Onoye, Isao Shirakawa:
DSP implementation of 3D sound localization algorithm for monaural sound source. ICECS 2001: 1061-1064 - [c32]Morgan Hirosuke Miki, Mamoru Sakamoto, Shingo Miyamoto, Yoshinori Takeuchi, Toyohiko Yoshida, Isao Shirakawa:
Evaluation of processor code efficiency for embedded systems. ICS 2001: 229-235 - [c31]Morgan Hirosuke Miki, Motoki Kimura, Takao Onoye, Isao Shirakawa:
High Performance Java Hardware Engine and Software Kernel for Embedded Systems. VLSI-SOC 2001: 109-120 - [c30]Yukio Mitsuyama, Zaldy Andales, Takao Onoye, Isao Shirakawa:
VLSI architecture of dynamically reconfigurable hardware-based cipher. ISCAS (4) 2001: 734-737 - 2000
- [c29]Makoto Furuie, Bao-Yu Song, Yukihiro Yoshida, Takao Onoye, Isao Shirakawa:
Layout generation of array cell for NMOS 4-phase dynamic logic (short paper). ASP-DAC 2000: 529-532 - [c28]Roberto Yusi Omaki, Yu Dong, M. Horgan Miki, Makoto Furuie, Shohei Yamada, Daisuke Taki, Masaya Tarui, Gen Fujita, Takao Onoye, Isao Shirakawa:
VLSI implementation of a realtime wavelet video coder. CICC 2000: 543-546 - [c27]Yu Dong, Roberto Yusi Omaki, Takao Onoye, Isao Shirakawa:
VLSI Implementation of a Reduced Memory Bandwidth Realtime EZW Video Coder. ICIP 2000: 126-129
1990 – 1999
- 1999
- [j17]Hideyuki Fujishima, Yusuke Takemoto, Takao Onoye, Isao Shirakawa:
An architecture of a matrix-vector multiplier dedicated to video decoding and three-dimensional computer graphics. IEEE Trans. Circuits Syst. Video Technol. 9(2): 306-314 (1999) - [c26]Koji Asari, Yukio Mitsuyama, Takao Onoye, Isao Shirakawa, Hiroshige Hirano, Toshiyuki Honda, Tatsuo Otsuki, Takaaki Baba, Teresa H. Meng:
FeRAM Circuit Technology for System on a Chip. Evolvable Hardware 1999: 193- - [c25]Hideyuki Fujishima, Yusuke Takemoto, T. Yoneda, Takao Onoye, Isao Shirakawa:
Hybrid media-processor core for natural and synthetic video decoding. ISCAS (4) 1999: 275-278 - [c24]Morgan Hirosuke Miki, Daisuke Taki, Gen Fujita, Takao Onoye, Isao Shirakawa, Toru Fujiwara, Tadao Kasami:
Recursive maximum likelihood decoder for high-speed satellite communication. ISCAS (4) 1999: 572-575 - [c23]Kenji Matsumura, Gen Fujita, Toshihiro Masaki, Isao Shirakawa, Hiroshi Inada:
A wireless data processing system constructed of SAW-devices and its applications to medical cares. NSIP 1999: 803-805 - 1998
- [j16]Akira Nagao, Isao Shirakawa, Takashi Kambe:
A layout approach to monolithic microwave IC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(12): 1262-1272 (1998) - [c22]Takao Onoye, Gen Fujita, Hiroyuki Okuhata, Morgan Hirosuke Miki, Isao Shirakawa:
Low-Power Implementation of H.324 Audiovisual Codec Dedicated to Mobile Computing. ASP-DAC 1998: 589-594 - [c21]Gen Fujita, Hiroyuki Okuhata, Morgan Hirosuke Miki, Takao Onoye, Isao Shirakawa:
Implementation of H.324 audiovisual codec for mobile computing. CICC 1998: 193-196 - [c20]Lijun Luo, Cairong Zou, Zhenya He, Isao Shirakawa:
An adaptive quantization algorithm for MPEG-2 video coding. ICASSP 1998: 2841-2844 - [c19]Hiroyuki Okuhata, Morgan Hirosuke Miki, Takao Onoye, Isao Shirakawa:
A low-power DSP core architecture for low bitrate speech codec. ICASSP 1998: 3121-3124 - [c18]Akira Nagao, Takashi Kambe, Isao Shirakawa:
A layout approach to monolithic microwave IC. ISPD 1998: 65-72 - 1997
- [j15]Koji Miyanohana, Gen Fujita, Kazuhiro Yanagida, Takao Onoye, Isao Shirakawa:
Single Chip Implementation of Encoder-Decoder for Low Bit Rate Visual Communication. J. Circuits Syst. Comput. 7(5): 441-458 (1997) - [j14]Hiroyuki Okuhata, Hiroshi Uno, Keiji Kumatani, Isao Shirakawa, Toru Chiba:
A Low Power Receiver Architecture for 4 Mbps Infrared Wireless Communication. J. Circuits Syst. Comput. 7(5): 483-494 (1997) - [j13]Hiroshi Uno, Keiji Kumatani, Hiroyuki Okuhata, Isao Shirakawa, Toru Chiba:
ASK digital demodulation scheme for noise immune infrared data communication. Wirel. Networks 3(2): 121-129 (1997) - [c17]Shun Morikawa, Keisuke Okada, Sumitaka Takeuchi, Isao Shirakawa:
A high performance FIR filter dedicated to digital video transmission. ASP-DAC 1997: 77-82 - [c16]Morgan Hirosuke Miki, Gen Fujita, Takao Onoye, Isao Shirakawa:
Low-power H.263 video CoDec dedicated to mobile computing. ISLPED 1997: 80-83 - [c15]Hiroshi Uno, Keiji Kumatani, Hiroyuki Okuhata, Isao Shirakawa, Toru Chiba:
Low power architecture for high speed infrared wireless communication system. ISLPED 1997: 255-258 - [c14]Yukihiro Yoshida, Bao-Yu Song, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa:
An object code compression approach to embedded processors. ISLPED 1997: 265-268 - 1996
- [j12]Yuji Shigehiro, Takashi Nagata, Isao Shirakawa, Itthichai Arungsrisangchai, Hiromitsu Takahashi:
Automatic layout recycling based on layout description and linear programming. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(8): 959-967 (1996) - 1995
- [j11]Toshihiro Masaki, Yasuo Morimoto, Takao Onoye, Isao Shirakawa:
VLSI implementation of inverse discrete cosine transformer and motion compensator for MPEG2 HDTV video decoding. IEEE Trans. Circuits Syst. Video Technol. 5(5): 387-395 (1995) - [c13]Akira Nagao, Chiyoshi Yoshioka, Takashi Kambe, Isao Shirakawa:
A layout approach to Monolithic Microwave IC. ASP-DAC 1995 - [c12]Keisuke Okada, Shun Morikawa, Isao Shirakawa, Sumitaka Takeuchi:
A design of high-performance multiplier for digital video transmission. ASP-DAC 1995 - [c11]Hiroshi Uno, Toru Chiba, Keiji Kumatani, Isao Shirakawa:
Synthesis and simulation of digital demodulator for infrared data communication. ASP-DAC 1995 - [c10]Akihisa Yamada, Satoru Nakamura, Nagisa Ishiura, Isao Shirakawa, Takashi Kambe:
Optimal Scheduling for Conditional Recource Sharing. ISCAS 1995: 2297-2300 - [e1]Isao Shirakawa:
Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29 - September 1, 1995. ACM 1995, ISBN 0-89791-766-9 [contents] - 1994
- [c9]Masahiko Toyonaga, Shih-Tsung Yang, Toshiro Akino, Isao Shirakawa:
A New Approach of Fractional-Dimension Based Module Clustering for VLSI Layout. ISCAS 1994: 185-188 - [c8]Takayuki Sagishima, Kozo Kimura, Hiroaki Hirata, Tokuzo Kiyohara, Shigeo Asahara, Takao Onoye, Isao Shirakawa:
Multi-Threaded Processor for Image Generation. ISCAS 1994: 231-234 - 1993
- [c7]Yuji Shigehiro, Takashi Nagata, Isao Shirakawa, Takashi Kambe:
Optimal layout recycling based on graph theoretic linear programming approach. VLSI 1993: 25-34 - [p1]Shuji Tsukiyama, Keiichi Koike, Isao Shirakawa:
An Algorithm to Eliminate All Complex Triangles in a Maximal Planar Graph for Use in VLSI floorplan. Algorithmic Aspects of VLSI Layout 1993: 321-335 - 1992
- [c6]Takashi Shimamoto, Hidetaka Hane, Isao Shirakawa, Shuji Tsukiyama, Shoji Shinoda, Nobuyasu Yui, Nobuyuki Nishiguchi:
A distributed routing system for multilayer SOG. EURO-DAC 1992: 298-303 - 1991
- [j10]Katsunori Tani, Shuji Tsukiyama, Shoji Shinoda, Isao Shirakawa:
On area-efficient drawings of rectangular duals for VLSI floor-plan. Math. Program. 52: 29-43 (1991)
1980 – 1989
- 1986
- [j9]Hiroshi Deguchi, Isao Shirakawa, Koichi Omura, Masato Nishida, Hitoshi Nishimura, Toru Kawata:
A tree-structured parallel processing system for image generation by ray tracing. Syst. Comput. Jpn. 17(12): 51-62 (1986) - 1983
- [j8]Shuji Tsukiyama, Ernest S. Kuh, Isao Shirakawa:
On the Layering Problem of Multilayer PWB Wiring. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2(1): 30-38 (1983) - [j7]Isao Shirakawa, Shin Futagami:
A Rerouting Scheme for Single-Layer Printed Wiring Boards. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2(4): 267-271 (1983) - [j6]Shuji Tsukiyama, Ikuo Harada, Masahiro Fukui, Isao Shirakawa:
A New Global Router for Gate Array LSIsi. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2(4): 313-321 (1983) - [c5]Hitoshi Nishimura, Hiroshi Ohno, Toru Kawata, Isao Shirakawa, Koichi Omura:
LINKS-1: A Parallel Pipelined Multimicrocomputer System for Image Creation. ISCA 1983: 387-394 - 1981
- [j5]Isao Shirakawa, Noboru Okuda, Takashi Harada, Sadahiro Tani, Hiroshi Ozaki:
A Layout System for the Random Logic Portion of an MOS LSI Chip. IEEE Trans. Computers 30(8): 572-581 (1981) - [c4]Shuji Tsukiyama, Ernest S. Kuh, Isao Shirakawa:
On the layering problem of multilayer PWB wiring. DAC 1981: 738-745 - 1980
- [j4]Shuji Tsukiyama, Isao Shirakawa, Hiroshi Ozaki, Hiromu Ariyoshi:
An Algorithm to Enumerate All Cutsets of a Graph in Linear Time per Cutset. J. ACM 27(4): 619-632 (1980) - [j3]Isao Shirakawa:
Some comments on permutation layout. Networks 10(2): 179-182 (1980) - [j2]Ikuo Nishioka, Takuji Kurimoto, Seiji Yamamoto, Toru Chiba, Isao Shirakawa, Hiroshi Ozaki:
An Approach to Gate Assignment and Module Placement for Printed Wiring Boards. IEEE Trans. Computers 29(8): 681-688 (1980) - [c3]Isao Shirakawa, Noboru Okuda, Takashi Harada, Sadahiro Tani, Hiroshi Ozaki:
A layout system for the random logic portion of MOS LSI. DAC 1980: 92-99 - [c2]Shuji Tsukiyama, Ernest S. Kuh, Isao Shirakawa:
On the layering problem of multilayer PWB wiring. Graph Theory and Algorithms 1980: 20-37
1970 – 1979
- 1978
- [c1]Ikuo Nishioka, Takuji Kurimoto, Seiji Yamamoto, Isao Shirakawa, Hiroshi Ozaki:
An approach to gate assignment and module placement for printed wiring boards. DAC 1978: 60-69 - 1977
- [j1]Shuji Tsukiyama, Mikio Ide, Hiromu Ariyoshi, Isao Shirakawa:
A New Algorithm for Generating All the Maximal Independent Sets. SIAM J. Comput. 6(3): 505-517 (1977)
Coauthor Index
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