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2000 – 2009
- 2006
[j1]Manan Syal, Michael S. Hsiao:
New techniques for untestable fault identification in sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(6): 1117-1131 (2006)- [c9]Manan Syal, Kameshwar Chandrasekar, Vishnu C. Vimjam, Michael S. Hsiao, Yi-Shing Chang, Sreejit Chakravarty:
A Study of Implication Based Pseudo Functional Testing. ITC 2006: 1-10 - 2005
- [b1]Manan Syal:
Static Learning for Problems in VLSI Test and Verification. Virginia Tech, Blacksburg, VA, USA, 2005 - [c8]Manan Syal, Michael S. Hsiao, Suriyaprakash Natarajan, Sreejit Chakravarty:
Untestable Multi-Cycle Path Delay Faults in Industrial Designs. Asian Test Symposium 2005: 194-201 - [c7]Vishnu C. Vimjam, Manan Syal, Michael S. Hsiao:
Untestable fault identification through enhanced necessary value assignments. ACM Great Lakes Symposium on VLSI 2005: 176-181 - [c6]Manan Syal, Michael S. Hsiao:
VERISEC: verifying equivalence of sequential circuits using SAT. HLDVT 2005: 52-59 - [c5]Manan Syal, Rajat Arora, Michael S. Hsiao:
Extended Forward Implications and Dual Recurrence Relations to Identify Sequentially Untestable Faults. ICCD 2005: 453-460 - 2004
- [c4]Manan Syal, Michael S. Hsiao, Sreejit Chakravarty:
Identifying Untestable Transition Faults in Latch Based Designs with Multiple Clocks. ITC 2004: 1034-1043 - [c3]Manan Syal, Michael S. Hsiao:
Untestable Fault Identification using Recurrence Relations and Impossible Value Assignments. VLSI Design 2004: 481-486 - 2003
- [c2]Manan Syal, Michael S. Hsiao:
A Novel, Low-Cost Algorithm for Sequentially Untestable Fault Identification. DATE 2003: 10316-10321 - [c1]Manan Syal, Michael S. Hsiao, Kiran B. Doreswamy, Sreejit Chakravarty:
Efficient Implication - Based Untestable Bridge Fault Identifier. VTS 2003: 393-402
Coauthor Index
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